AON_TIMER Simulation Results

Friday October 17 2025 17:10:00 UTC

GitHub Revision: 8c9ab41

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	1.380s	575.591us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	3.170s	918.999us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	2.020s	480.873us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	13.490s	13.751ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	2.100s	625.882us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	2.050s	453.914us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	2.020s	480.873us	20	20	100.00
		aon_timer_csr_aliasing	2.100s	625.882us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.850s	404.660us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.980s	442.475us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.625m	62.015ms	15	15	100.00
V2	jump	aon_timer_jump	1.670s	600.240us	5	5	100.00
V2	stress_all	aon_timer_stress_all	1.710m	154.942ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	2.060s	467.169us	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.110s	487.937us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	3.800s	628.943us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	3.800s	628.943us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	3.170s	918.999us	5	5	100.00
		aon_timer_csr_rw	2.020s	480.873us	20	20	100.00
		aon_timer_csr_aliasing	2.100s	625.882us	5	5	100.00
		aon_timer_same_csr_outstanding	5.570s	1.199ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	3.170s	918.999us	5	5	100.00
		aon_timer_csr_rw	2.020s	480.873us	20	20	100.00
		aon_timer_csr_aliasing	2.100s	625.882us	5	5	100.00
		aon_timer_same_csr_outstanding	5.570s	1.199ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	14.160s	7.543ms	5	5	100.00
		aon_timer_tl_intg_err	19.060s	8.408ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	19.060s	8.408ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	2.230s	534.773us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	1.920s	500.826us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	9.190s	3.695ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	2.610s	658.447us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	15.740s	4.320ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	40.530s	23.213ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.89	99.09	99.05	100.00	--	98.56	96.67	100.00