ENTROPY_SRC/RNG_16BITS Simulation Results

Friday October 17 2025 17:10:00 UTC

GitHub Revision: 8c9ab41

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 4.000s 27.601us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 31.000s 21.195us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 28.000s 35.326us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 32.000s 156.177us 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 34.000s 1.316ms 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 4.000s 227.524us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 28.000s 35.326us 20 20 100.00
entropy_src_csr_aliasing 34.000s 1.316ms 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 4.000s 27.601us 50 50 100.00
entropy_src_rng 14.467m 20.084ms 300 300 100.00
entropy_src_fw_ov 14.800m 20.105ms 298 300 99.33
V2 firmware_mode entropy_src_fw_ov 14.800m 20.105ms 298 300 99.33
V2 rng_mode entropy_src_rng 14.467m 20.084ms 300 300 100.00
V2 rng_max_rate entropy_src_rng_max_rate 22.800m 20.021ms 384 400 96.00
V2 health_checks entropy_src_rng 14.467m 20.084ms 300 300 100.00
V2 conditioning entropy_src_rng 14.467m 20.084ms 300 300 100.00
V2 interrupts entropy_src_rng 14.467m 20.084ms 300 300 100.00
entropy_src_intr 55.000s 11.977ms 49 50 98.00
V2 alerts entropy_src_rng 14.467m 20.084ms 300 300 100.00
entropy_src_functional_alerts 11.000s 175.753us 50 50 100.00
V2 stress_all entropy_src_stress_all 10.300m 16.131ms 47 50 94.00
V2 functional_errors entropy_src_functional_errors 8.167m 10.007ms 992 1000 99.20
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 41.000s 1.354ms 49 50 98.00
V2 intr_test entropy_src_intr_test 31.000s 22.961us 50 50 100.00
V2 alert_test entropy_src_alert_test 3.000s 20.114us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 35.000s 101.432us 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 35.000s 101.432us 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 31.000s 21.195us 5 5 100.00
entropy_src_csr_rw 28.000s 35.326us 20 20 100.00
entropy_src_csr_aliasing 34.000s 1.316ms 5 5 100.00
entropy_src_same_csr_outstanding 23.000s 77.143us 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 31.000s 21.195us 5 5 100.00
entropy_src_csr_rw 28.000s 35.326us 20 20 100.00
entropy_src_csr_aliasing 34.000s 1.316ms 5 5 100.00
entropy_src_same_csr_outstanding 23.000s 77.143us 20 20 100.00
V2 TOTAL 2309 2340 98.68
V2S tl_intg_err entropy_src_sec_cm 4.000s 104.241us 5 5 100.00
entropy_src_tl_intg_err 36.000s 209.073us 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 14.467m 20.084ms 300 300 100.00
entropy_src_cfg_regwen 3.000s 16.584us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 14.467m 20.084ms 300 300 100.00
V2S sec_cm_config_redun entropy_src_rng 14.467m 20.084ms 300 300 100.00
V2S sec_cm_intersig_mubi entropy_src_rng 14.467m 20.084ms 300 300 100.00
entropy_src_fw_ov 14.800m 20.105ms 298 300 99.33
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 8.167m 10.007ms 992 1000 99.20
entropy_src_sec_cm 4.000s 104.241us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 8.167m 10.007ms 992 1000 99.20
entropy_src_sec_cm 4.000s 104.241us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 14.467m 20.084ms 300 300 100.00
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 8.167m 10.007ms 992 1000 99.20
entropy_src_sec_cm 4.000s 104.241us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 8.167m 10.007ms 992 1000 99.20
entropy_src_sec_cm 4.000s 104.241us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 8.167m 10.007ms 992 1000 99.20
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 11.000s 175.753us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 36.000s 209.073us 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 11.717m 17.080ms 50 50 100.00
V3 TOTAL 50 50 100.00
TOTAL 2539 2570 98.79

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
85.55 96.16 90.52 98.73 92.35 57.97 97.92 89.50 93.71

Failure Buckets