MBX Simulation Results

Friday October 17 2025 17:10:00 UTC

GitHub Revision: 8c9ab41

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 1.133m 5.008ms 2 2 100.00
V1 csr_hw_reset mbx_csr_hw_reset 2.000s 42.493us 5 5 100.00
V1 csr_rw mbx_csr_rw 2.000s 24.527us 20 20 100.00
V1 csr_bit_bash mbx_csr_bit_bash 4.000s 478.936us 5 5 100.00
V1 csr_aliasing mbx_csr_aliasing 2.000s 64.571us 5 5 100.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 4.000s 58.739us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 2.000s 24.527us 20 20 100.00
mbx_csr_aliasing 2.000s 64.571us 5 5 100.00
V1 TOTAL 57 57 100.00
V2 mbx_stress mbx_stress 2.400m 7.359ms 1 2 50.00
V2 mbx_max_activity mbx_stress_zero_delays 2.183m 13.085ms 2 2 100.00
V2 mbx_imbx_oob mbx_imbx_oob 53.000s 4.668ms 2 2 100.00
V2 mbx_doe_intr_msg mbx_doe_intr_msg 23.000s 1.089ms 5 5 100.00
V2 alert_test mbx_alert_test 2.000s 42.094us 50 50 100.00
V2 intr_test mbx_intr_test 2.000s 14.462us 50 50 100.00
V2 tl_d_oob_addr_access mbx_tl_errors 6.000s 205.132us 20 20 100.00
V2 tl_d_illegal_access mbx_tl_errors 6.000s 205.132us 20 20 100.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 2.000s 42.493us 5 5 100.00
mbx_csr_rw 2.000s 24.527us 20 20 100.00
mbx_csr_aliasing 2.000s 64.571us 5 5 100.00
mbx_same_csr_outstanding 2.000s 17.729us 20 20 100.00
V2 tl_d_partial_access mbx_csr_hw_reset 2.000s 42.493us 5 5 100.00
mbx_csr_rw 2.000s 24.527us 20 20 100.00
mbx_csr_aliasing 2.000s 64.571us 5 5 100.00
mbx_same_csr_outstanding 2.000s 17.729us 20 20 100.00
V2 TOTAL 150 151 99.34
V2S tl_intg_err mbx_tl_intg_err 3.000s 264.211us 20 20 100.00
mbx_sec_cm 2.000s 19.944us 5 5 100.00
V2S TOTAL 25 25 100.00
TOTAL 232 233 99.57

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
92.57 96.75 92.07 96.71 91.66 79.74 -- 97.01 86.13

Failure Buckets