| V1 |
smoke |
aon_timer_smoke |
1.730s |
612.529us |
5 |
5 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.720s |
934.401us |
5 |
5 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.990s |
460.511us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
21.190s |
11.494ms |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.930s |
499.958us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
2.010s |
530.860us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.990s |
460.511us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.930s |
499.958us |
5 |
5 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.400s |
284.192us |
5 |
5 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.920s |
433.879us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
70 |
70 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.117m |
61.144ms |
15 |
15 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.870s |
673.208us |
5 |
5 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
2.917m |
112.985ms |
15 |
15 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
2.060s |
500.773us |
50 |
50 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
2.050s |
515.818us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
3.010s |
536.291us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
3.010s |
536.291us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.720s |
934.401us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
1.990s |
460.511us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.930s |
499.958us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.650s |
2.181ms |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.720s |
934.401us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
1.990s |
460.511us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.930s |
499.958us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.650s |
2.181ms |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
175 |
175 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
7.200s |
7.624ms |
5 |
5 |
100.00 |
|
|
aon_timer_tl_intg_err |
17.750s |
8.221ms |
20 |
20 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
17.750s |
8.221ms |
20 |
20 |
100.00 |
| V2S |
|
TOTAL |
|
|
25 |
25 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.440s |
600.826us |
5 |
5 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
2.000s |
687.870us |
5 |
5 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
9.980s |
3.778ms |
5 |
5 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.330s |
581.631us |
10 |
10 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
14.450s |
4.108ms |
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
30.830s |
15.047ms |
15 |
15 |
100.00 |
| V3 |
|
TOTAL |
|
|
45 |
45 |
100.00 |
|
|
TOTAL |
|
|
315 |
315 |
100.00 |