KMAC/UNMASKED Simulation Results

Friday October 24 2025 17:04:32 UTC

GitHub Revision: 2bd4e85

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	kmac_smoke	1.142m	4.240ms	50	50	100.00
V1	csr_hw_reset	kmac_csr_hw_reset	1.420s	36.806us	5	5	100.00
V1	csr_rw	kmac_csr_rw	1.360s	18.153us	20	20	100.00
V1	csr_bit_bash	kmac_csr_bit_bash	16.050s	1.491ms	5	5	100.00
V1	csr_aliasing	kmac_csr_aliasing	6.980s	1.600ms	5	5	100.00
V1	csr_mem_rw_with_rand_reset	kmac_csr_mem_rw_with_rand_reset	2.260s	47.694us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	kmac_csr_rw	1.360s	18.153us	20	20	100.00
		kmac_csr_aliasing	6.980s	1.600ms	5	5	100.00
V1	mem_walk	kmac_mem_walk	1.080s	37.809us	5	5	100.00
V1	mem_partial_access	kmac_mem_partial_access	1.640s	28.793us	5	5	100.00
V1		TOTAL			115	115	100.00
V2	long_msg_and_output	kmac_long_msg_and_output	50.217m	131.904ms	50	50	100.00
V2	burst_write	kmac_burst_write	16.224m	67.027ms	50	50	100.00
V2	test_vectors	kmac_test_vectors_sha3_224	27.518m	117.581ms	5	5	100.00
		kmac_test_vectors_sha3_256	28.789m	275.615ms	5	5	100.00
		kmac_test_vectors_sha3_384	24.755m	555.645ms	5	5	100.00
		kmac_test_vectors_sha3_512	15.758m	48.841ms	5	5	100.00
		kmac_test_vectors_shake_128	39.102m	72.760ms	5	5	100.00
		kmac_test_vectors_shake_256	32.758m	87.507ms	5	5	100.00
		kmac_test_vectors_kmac	3.040s	515.344us	5	5	100.00
		kmac_test_vectors_kmac_xof	2.660s	110.881us	5	5	100.00
V2	sideload	kmac_sideload	5.948m	14.605ms	50	50	100.00
V2	app	kmac_app	4.287m	140.305ms	50	50	100.00
V2	app_with_partial_data	kmac_app_with_partial_data	2.923m	8.659ms	10	10	100.00
V2	entropy_refresh	kmac_entropy_refresh	5.702m	55.519ms	50	50	100.00
V2	error	kmac_error	6.525m	24.265ms	49	50	98.00
V2	key_error	kmac_key_error	13.280s	8.564ms	50	50	100.00
V2	sideload_invalid	kmac_sideload_invalid	2.529m	10.008ms	37	50	74.00
V2	edn_timeout_error	kmac_edn_timeout_error	35.170s	18.358ms	20	20	100.00
V2	entropy_mode_error	kmac_entropy_mode_error	53.740s	14.323ms	20	20	100.00
V2	entropy_ready_error	kmac_entropy_ready_error	58.050s	20.396ms	10	10	100.00
V2	lc_escalation	kmac_lc_escalation	21.800s	1.728ms	50	50	100.00
V2	stress_all	kmac_stress_all	28.404m	61.681ms	50	50	100.00
V2	intr_test	kmac_intr_test	1.080s	24.444us	50	50	100.00
V2	alert_test	kmac_alert_test	1.190s	16.997us	50	50	100.00
V2	tl_d_oob_addr_access	kmac_tl_errors	3.490s	594.518us	20	20	100.00
V2	tl_d_illegal_access	kmac_tl_errors	3.490s	594.518us	20	20	100.00
V2	tl_d_outstanding_access	kmac_csr_hw_reset	1.420s	36.806us	5	5	100.00
		kmac_csr_rw	1.360s	18.153us	20	20	100.00
		kmac_csr_aliasing	6.980s	1.600ms	5	5	100.00
		kmac_same_csr_outstanding	2.280s	362.111us	20	20	100.00
V2	tl_d_partial_access	kmac_csr_hw_reset	1.420s	36.806us	5	5	100.00
		kmac_csr_rw	1.360s	18.153us	20	20	100.00
		kmac_csr_aliasing	6.980s	1.600ms	5	5	100.00
		kmac_same_csr_outstanding	2.280s	362.111us	20	20	100.00
V2		TOTAL			726	740	98.11
V2S	shadow_reg_update_error	kmac_shadow_reg_errors	2.320s	80.817us	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	kmac_shadow_reg_errors	2.320s	80.817us	20	20	100.00
V2S	shadow_reg_storage_error	kmac_shadow_reg_errors	2.320s	80.817us	20	20	100.00
V2S	shadowed_reset_glitch	kmac_shadow_reg_errors	2.320s	80.817us	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	kmac_shadow_reg_errors_with_csr_rw	4.300s	867.745us	20	20	100.00
V2S	tl_intg_err	kmac_sec_cm	1.314m	6.760ms	5	5	100.00
		kmac_tl_intg_err	4.030s	404.658us	20	20	100.00
V2S	sec_cm_bus_integrity	kmac_tl_intg_err	4.030s	404.658us	20	20	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	kmac_lc_escalation	21.800s	1.728ms	50	50	100.00
V2S	sec_cm_sw_key_key_masking	kmac_smoke	1.142m	4.240ms	50	50	100.00
V2S	sec_cm_key_sideload	kmac_sideload	5.948m	14.605ms	50	50	100.00
V2S	sec_cm_cfg_shadowed_config_shadow	kmac_shadow_reg_errors	2.320s	80.817us	20	20	100.00
V2S	sec_cm_fsm_sparse	kmac_sec_cm	1.314m	6.760ms	5	5	100.00
V2S	sec_cm_ctr_redun	kmac_sec_cm	1.314m	6.760ms	5	5	100.00
V2S	sec_cm_packer_ctr_redun	kmac_sec_cm	1.314m	6.760ms	5	5	100.00
V2S	sec_cm_cfg_shadowed_config_regwen	kmac_smoke	1.142m	4.240ms	50	50	100.00
V2S	sec_cm_fsm_global_esc	kmac_lc_escalation	21.800s	1.728ms	50	50	100.00
V2S	sec_cm_fsm_local_esc	kmac_sec_cm	1.314m	6.760ms	5	5	100.00
V2S	sec_cm_absorbed_ctrl_mubi	kmac_mubi	3.964m	10.888ms	10	10	100.00
V2S	sec_cm_sw_cmd_ctrl_sparse	kmac_smoke	1.142m	4.240ms	50	50	100.00
V2S		TOTAL			75	75	100.00
V3	stress_all_with_rand_reset	kmac_stress_all_with_rand_reset	5.736m	11.627ms	9	10	90.00
V3		TOTAL			9	10	90.00
		TOTAL			925	940	98.40

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
93.57	97.69	94.37	100.00	72.73	96.04	97.74	96.40

Failure Buckets

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) has 4 failures:

  • Test kmac_sideload_invalid has 4 failures.

    • 8.kmac_sideload_invalid.84742156121787386708607234390701369890055609072680329606846870744242985637644
      Line 78, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/8.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10051600353 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe6d4d000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
        UVM_INFO @ 10051600353 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 11.kmac_sideload_invalid.29902287189049390855733730495636019359615622305997113885356695763662999749558
      Line 78, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/11.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10046064021 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf878d000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
        UVM_INFO @ 10046064021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 2 more failures.

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 2 failures:

  • Test kmac_sideload_invalid has 2 failures.

    • 19.kmac_sideload_invalid.29581266378205796484261904233080262465958871015744491251921313294683092785515
      Line 76, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/19.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10057650937 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xaa535000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
        UVM_INFO @ 10057650937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 49.kmac_sideload_invalid.7856504909838854668710340047454932900748217732630301690947389709373438250872
      Line 76, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/49.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10253033620 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xac9b3000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
        UVM_INFO @ 10253033620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 2 failures:

  • Test kmac_sideload_invalid has 2 failures.

    • 31.kmac_sideload_invalid.16546080482394604073719509416127807115171742423262357761411115049755555989184
      Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/31.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10008072107 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x28528000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
        UVM_INFO @ 10008072107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 38.kmac_sideload_invalid.75694865225284757022658031101217542380678340894829543652776172657003863130937
      Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/38.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10044423817 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x56887000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
        UVM_INFO @ 10044423817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 7.kmac_sideload_invalid.97897079254716779722597560486723780771959375793862345238753338515517713177885
      Line 78, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/7.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10041538075 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x51195000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
        UVM_INFO @ 10041538075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_ERROR (cip_base_vseq.sv:1229) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 1 failures:

  • Test kmac_stress_all_with_rand_reset has 1 failures.

    • 9.kmac_stress_all_with_rand_reset.63715478517453371768009438110422754735527241218853164396770474309918268683762
      Line 151, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/9.kmac_stress_all_with_rand_reset/latest/run.log

        UVM_ERROR @ 6542212159 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
        UVM_INFO @ 6542212159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 1 failures:

  • Test kmac_error has 1 failures.

    • 10.kmac_error.59768331784326325631410360259804091963213988864363498077156736851466841462096
      Line 186, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/10.kmac_error/latest/run.log

        UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
        UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 18.kmac_sideload_invalid.71412473342645247419292216373211825741566543755758936828716892255216581945025
      Line 83, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/18.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10249118029 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x57aad000, Comparison=CompareOpEq, exp_data=0x1, call_count=9)
        UVM_INFO @ 10249118029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=18) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 22.kmac_sideload_invalid.73565817572087596921119535912650846346739175828099277985812661280083137261319
      Line 92, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/22.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10395064933 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x37dac000, Comparison=CompareOpEq, exp_data=0x1, call_count=18)
        UVM_INFO @ 10395064933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 25.kmac_sideload_invalid.113241026624794436945572161518436111265998837346206286866839563740157130213883
      Line 81, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/25.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10226077800 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x70d3000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)
        UVM_INFO @ 10226077800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=17) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 46.kmac_sideload_invalid.115085580178906556466471828293030316975893478098013234073035793511318673713095
      Line 94, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/46.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10715253731 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd587a000, Comparison=CompareOpEq, exp_data=0x1, call_count=17)
        UVM_INFO @ 10715253731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---