I2C Simulation Results

Friday November 07 2025 17:06:22 UTC

GitHub Revision: `98165ca`

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	1.299m	3.923ms	50	50	100.00
V1	target_smoke	i2c_target_smoke	40.490s	12.740ms	50	50	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	1.120s	132.576us	5	5	100.00
V1	csr_rw	i2c_csr_rw	1.150s	19.616us	20	20	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	4.200s	819.782us	5	5	100.00
V1	csr_aliasing	i2c_csr_aliasing	2.240s	436.755us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.520s	27.175us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	1.150s	19.616us	20	20	100.00
		i2c_csr_aliasing	2.240s	436.755us	5	5	100.00
V1		TOTAL			155	155	100.00
V2	host_error_intr	i2c_host_error_intr	9.630s	219.993us	3	50	6.00
V2	host_stress_all	i2c_host_stress_all	39.891m	49.011ms	13	50	26.00
V2	host_maxperf	i2c_host_perf	47.361m	72.182ms	48	50	96.00
V2	host_override	i2c_host_override	1.070s	110.131us	50	50	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	4.973m	21.547ms	50	50	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	2.269m	9.718ms	50	50	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.700s	173.160us	50	50	100.00
		i2c_host_fifo_fmt_empty	29.480s	761.029us	50	50	100.00
		i2c_host_fifo_reset_rx	11.300s	480.185us	50	50	100.00
V2	host_fifo_full	i2c_host_fifo_full	2.699m	23.311ms	50	50	100.00
V2	host_timeout	i2c_host_stretch_timeout	34.110s	2.727ms	50	50	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	7.070s	794.236us	16	50	32.00
V2	target_glitch	i2c_target_glitch	3.860s	481.113us	0	2	0.00
V2	target_stress_all	i2c_target_stress_all	11.423m	51.955ms	50	50	100.00
V2	target_maxperf	i2c_target_perf	9.060s	948.925us	50	50	100.00
V2	target_fifo_empty	i2c_target_stress_rd	1.041m	1.562ms	50	50	100.00
		i2c_target_intr_smoke	9.860s	4.285ms	50	50	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	2.090s	435.111us	50	50	100.00
		i2c_target_fifo_reset_tx	2.350s	321.243us	50	50	100.00
V2	target_fifo_full	i2c_target_stress_wr	21.031m	60.940ms	50	50	100.00
		i2c_target_stress_rd	1.041m	1.562ms	50	50	100.00
		i2c_target_intr_stress_wr	5.505m	21.870ms	49	50	98.00
V2	target_timeout	i2c_target_timeout	9.250s	2.770ms	50	50	100.00
V2	target_clock_stretch	i2c_target_stretch	3.178m	4.006ms	46	50	92.00
V2	bad_address	i2c_target_bad_addr	7.770s	1.191ms	50	50	100.00
V2	target_mode_glitch	i2c_target_hrst	41.120s	10.173ms	24	50	48.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	4.130s	3.189ms	50	50	100.00
		i2c_target_fifo_watermarks_tx	2.070s	2.056ms	48	50	96.00
V2	host_mode_config_perf	i2c_host_perf	47.361m	72.182ms	48	50	96.00
		i2c_host_perf_precise	34.481m	24.189ms	50	50	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	34.110s	2.727ms	50	50	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	34.880s	2.970ms	48	50	96.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	4.060s	1.979ms	50	50	100.00
		i2c_target_nack_acqfull_addr	3.630s	4.260ms	50	50	100.00
		i2c_target_nack_txstretch	2.190s	137.054us	35	50	70.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	24.280s	759.669us	50	50	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	3.300s	532.907us	50	50	100.00
V2	alert_test	i2c_alert_test	1.030s	17.425us	50	50	100.00
V2	intr_test	i2c_intr_test	1.070s	18.333us	50	50	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	2.750s	146.589us	20	20	100.00
V2	tl_d_illegal_access	i2c_tl_errors	2.750s	146.589us	20	20	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	1.120s	132.576us	5	5	100.00
		i2c_csr_rw	1.150s	19.616us	20	20	100.00
		i2c_csr_aliasing	2.240s	436.755us	5	5	100.00
		i2c_same_csr_outstanding	1.650s	54.832us	19	20	95.00
V2	tl_d_partial_access	i2c_csr_hw_reset	1.120s	132.576us	5	5	100.00
		i2c_csr_rw	1.150s	19.616us	20	20	100.00
		i2c_csr_aliasing	2.240s	436.755us	5	5	100.00
		i2c_same_csr_outstanding	1.650s	54.832us	19	20	95.00
V2		TOTAL			1619	1792	90.35
V2S	tl_intg_err	i2c_tl_intg_err	2.850s	148.120us	20	20	100.00
		i2c_sec_cm	1.420s	69.832us	5	5	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	2.850s	148.120us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	23.780s	3.707ms	0	10	0.00
V3	target_error_intr	i2c_target_unexp_stop	2.810s	2.260ms	0	50	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	31.400s	1.938ms	0	10	0.00
V3		TOTAL			0	70	0.00
		TOTAL			1799	2042	88.10

Failure Buckets

UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 88 failures:

Test i2c_host_error_intr has 47 failures.

0.i2c_host_error_intr.114380539785175123264248252966147668619719060410728112954181334024822213278061
Line 115, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 712330319 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 712330319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_error_intr.86806926979609371660776776264105341588684885258468731835298095361999313952196
Line 107, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log

  UVM_ERROR @  34316320 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  34316320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 45 more failures.

Test i2c_host_stress_all has 25 failures.

1.i2c_host_stress_all.30958221840805722622835027722351523597920031061097519386423220130771517666752
Line 114, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 16583201521 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 16583201521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

2.i2c_host_stress_all.106466010364254461535033396044292514461645862458835861262718449055896024756540
Line 87, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_stress_all/latest/run.log

  UVM_ERROR @  44838239 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  44838239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 23 more failures.

Test i2c_target_stress_all_with_rand_reset has 6 failures.

3.i2c_target_stress_all_with_rand_reset.27222775257252865605375221328016643795451088056868535907198379408720174003477
Line 117, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1937778906 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 1937778906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

4.i2c_target_stress_all_with_rand_reset.114259089565894363543441491959895317050503805249367919185061161069730407541856
Line 86, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 292060194 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 292060194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 4 more failures.

Test i2c_host_mode_toggle has 10 failures.

7.i2c_host_mode_toggle.20941088947531317676343680697869336647628762028667122206997771323475929472107
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  57560655 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  57560655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

10.i2c_host_mode_toggle.48018890576060151660826659951903703204766717632804179902712916048493128711346
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/10.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  16047800 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  16047800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 26 failures:
- Test i2c_target_hrst has 26 failures.
  - 1.i2c_target_hrst.39825719030965570516033032329572069467998974055675017604990434601699127816336
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10876738885 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10876738885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.i2c_target_hrst.98678513080049345265519496721061076043301296465606510046976076576836009326965
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10044506499 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10044506499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 24 more failures.
UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 23 failures:
- Test i2c_target_unexp_stop has 23 failures.
  - 1.i2c_target_unexp_stop.34952410575513452421680730039219797763459720185626246619060041758060665993591
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 297512749 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 141 [0x8d])
  UVM_INFO @ 297512749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.i2c_target_unexp_stop.21251278309218711655574912397138113836457708609332885888348562401874599013846
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @  48954880 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 164 [0xa4])
  UVM_INFO @  48954880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 21 more failures.
UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 19 failures:
- Test i2c_target_unexp_stop has 19 failures.
  - 0.i2c_target_unexp_stop.43783752339610470477871212988138853179708458838837447874411875504530642870624
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 847175533 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 847175533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 3.i2c_target_unexp_stop.3150371387601294244506523064445633896608411412758900290566051567080556463869
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 411231949 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 411231949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 17 more failures.

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 17 failures:

Test i2c_host_stress_all has 8 failures.

3.i2c_host_stress_all.48254563169242055773207925121655717757285873720448347598616962318791382737653
Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 240870335500 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @2684891

5.i2c_host_stress_all.62883648657078610199423400065614162530085919578883051578691969147659986395974
Line 130, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 11469954760 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @12266899

... and 6 more failures.

Test i2c_host_mode_toggle has 9 failures.

4.i2c_host_mode_toggle.24146602702375466868615864358903317301173869707756647502695558504456625727226
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 794236172 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @131906

5.i2c_host_mode_toggle.29767954910041213876425917922452249239061269272479006880646079288421645170478
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  69979167 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @8438

... and 7 more failures.

UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 15 failures:
- Test i2c_target_nack_txstretch has 15 failures.
  - 8.i2c_target_nack_txstretch.28437567598983400141451432779659893328063279821792873515738711972534908580284
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 385160432 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 385160432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 13.i2c_target_nack_txstretch.28773773215742036143264077405834064058289643776764250406861946442031703126924
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/13.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 1743977809 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 1743977809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 13 more failures.

UVM_ERROR (cip_base_vseq.sv:1229) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 14 failures:

Test i2c_host_stress_all_with_rand_reset has 10 failures.

0.i2c_host_stress_all_with_rand_reset.45257413959563893585475511755751376497389464722393218700225137049826422086675
Line 99, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 3124376129 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 3124376129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all_with_rand_reset.56328028710268483522978113623743527496522065330427848107088490737515733665110
Line 106, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 934027259 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 934027259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

Test i2c_target_stress_all_with_rand_reset has 4 failures.

0.i2c_target_stress_all_with_rand_reset.12957880612470622516465153482237713806977146649478209113438610439765894943768
Line 102, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 3911416002 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 3911416002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_stress_all_with_rand_reset.85550541423419929009702940358687264374293820185423835387220657829951758524854
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 900904050 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 900904050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 12 failures:

Test i2c_host_mode_toggle has 12 failures.

15.i2c_host_mode_toggle.58310635485245606181301679629874775197986344229973297891062838300661925080836
Line 89, in log /nightly/current_run/scratch/master/i2c-sim-vcs/15.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  69696145 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

16.i2c_host_mode_toggle.32411318436580584115314295569520412766167633401109070484357953075180482563321
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/16.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  56918550 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

... and 10 more failures.

Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 8 failures:

Test i2c_target_unexp_stop has 8 failures.

18.i2c_target_unexp_stop.42694243385654599979060115141906481964906640355299874520532555272811787412921
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/18.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 1379062597 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 1379062597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

20.i2c_target_unexp_stop.7744589129388226975918625884374225044206174076154594623812108111201837686191
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/20.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 609428311 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 609428311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 6 more failures.

Job timed out after * minutes has 5 failures:
- Test i2c_host_perf has 2 failures.
  - 17.i2c_host_perf.69202787935101737773924215349675448300557851518699415330131211040574337599336
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/17.i2c_host_perf/latest/run.log
```
  Job timed out after 60 minutes
```
  - 36.i2c_host_perf.79199738523833948438805624737835952439462419166981994318008225928299823610926
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/36.i2c_host_perf/latest/run.log
```
  Job timed out after 60 minutes
```
- Test i2c_host_stress_all has 3 failures.
  - 19.i2c_host_stress_all.100638842634380259260528274063230448356231731709161289480152530731787900017345
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/19.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - 30.i2c_host_stress_all.51051374923444362956072881522142594630864151567557760278708720802750805434016
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/30.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - ... and 1 more failures.
UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 4 failures:
- Test i2c_target_stretch has 4 failures.
  - 1.i2c_target_stretch.44112012193660335640456038493035230268978492845158949123792523943152041958500
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10175263981 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10175263981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 6.i2c_target_stretch.73154081326943412657947164497690885609824353219333345642063044958875138296415
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10012786239 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10012786239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 2 more failures.
Error-[CNST-CIF] Constraints inconsistency failure has 4 failures:
- Test i2c_target_fifo_watermarks_tx has 2 failures.
  - 15.i2c_target_fifo_watermarks_tx.23234148588746568724423443891325694932546577674103437754443918218535158426115
    Line 123, in log /nightly/current_run/scratch/master/i2c-sim-vcs/15.i2c_target_fifo_watermarks_tx/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 845
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
  - 36.i2c_target_fifo_watermarks_tx.40526559026084245200321158155838923900300973078960377749756723434816124847116
    Line 118, in log /nightly/current_run/scratch/master/i2c-sim-vcs/36.i2c_target_fifo_watermarks_tx/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 845
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
- Test i2c_target_tx_stretch_ctrl has 2 failures.
  - 34.i2c_target_tx_stretch_ctrl.38285911535512925994356611010056091849081683518960936561592484030523222004221
    Line 127, in log /nightly/current_run/scratch/master/i2c-sim-vcs/34.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
  - 35.i2c_target_tx_stretch_ctrl.83962244140158443003826545992778277320572450443700497985738269083376486313832
    Line 127, in log /nightly/current_run/scratch/master/i2c-sim-vcs/35.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 3 failures:
- Test i2c_host_mode_toggle has 3 failures.
  - 9.i2c_host_mode_toggle.106923911942329051006426750776161379630164556701726723446427645072875019191400
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/9.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @ 259264921 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0xaa0dab14, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @ 259264921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 23.i2c_host_mode_toggle.39736029943903763756542104362902919504608587532967775648340028687540221452582
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/23.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @  88887209 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0xc1c84914, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  88887209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 1 more failures.

UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:

Test i2c_target_glitch has 2 failures.

0.i2c_target_glitch.36784202615084110480897436353642076057331035798945659334644920963976268814870
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 3511588347 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 3511588347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_glitch.47973814837800557563747046456387927568456813923464763294281867520985324013737
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 481113104 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 481113104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (cip_base_vseq.sv:840) [i2c_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 1 failures:
- Test i2c_same_csr_outstanding has 1 failures.
  - 3.i2c_same_csr_outstanding.18703415196608200879400566644309315761257885488239525104401102343524922684507
    Line 74, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_same_csr_outstanding/latest/run.log
```
  UVM_ERROR @  10682455 ps: (cip_base_vseq.sv:840) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed data & ~ro_mask == 0 (64 [0x40] vs 0 [0x0])
  UVM_INFO @  10682455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred! has 1 failures:
- Test i2c_target_intr_stress_wr has 1 failures.
  - 40.i2c_target_intr_stress_wr.89693760805359294844842216741484305532109778556166346510320057941461058099840
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/40.i2c_target_intr_stress_wr/latest/run.log
```
  UVM_FATAL @ 30811589464 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 30811589464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (i2c_scoreboard.sv:717) [scoreboard] controller_mode_wr_obs_fifo item uncompared: has 1 failures:
- Test i2c_host_stress_all has 1 failures.
  - 44.i2c_host_stress_all.64884871173710422343712041746703636245230083312453793314235888025136498929136
    Line 131, in log /nightly/current_run/scratch/master/i2c-sim-vcs/44.i2c_host_stress_all/latest/run.log
```
  UVM_ERROR @ 17491563451 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @18251543
```