98165ca| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | kmac_smoke | 1.678m | 79.408ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | kmac_csr_hw_reset | 1.450s | 192.480us | 5 | 5 | 100.00 |
| V1 | csr_rw | kmac_csr_rw | 1.460s | 26.831us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | kmac_csr_bit_bash | 14.530s | 1.450ms | 5 | 5 | 100.00 |
| V1 | csr_aliasing | kmac_csr_aliasing | 9.430s | 385.989us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | kmac_csr_mem_rw_with_rand_reset | 3.120s | 81.647us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | kmac_csr_rw | 1.460s | 26.831us | 20 | 20 | 100.00 |
| kmac_csr_aliasing | 9.430s | 385.989us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | kmac_mem_walk | 1.070s | 11.331us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | kmac_mem_partial_access | 1.910s | 35.687us | 5 | 5 | 100.00 |
| V1 | TOTAL | 115 | 115 | 100.00 | |||
| V2 | long_msg_and_output | kmac_long_msg_and_output | 1.066h | 559.536ms | 50 | 50 | 100.00 |
| V2 | burst_write | kmac_burst_write | 15.050m | 27.162ms | 50 | 50 | 100.00 |
| V2 | test_vectors | kmac_test_vectors_sha3_224 | 36.286m | 332.061ms | 5 | 5 | 100.00 |
| kmac_test_vectors_sha3_256 | 31.483m | 351.313ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_384 | 23.729m | 71.051ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_512 | 13.811m | 31.624ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_128 | 43.054m | 219.277ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_256 | 19.562m | 16.843ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac | 2.610s | 124.334us | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac_xof | 2.700s | 32.800us | 5 | 5 | 100.00 | ||
| V2 | sideload | kmac_sideload | 6.395m | 20.913ms | 50 | 50 | 100.00 |
| V2 | app | kmac_app | 4.351m | 49.906ms | 50 | 50 | 100.00 |
| V2 | app_with_partial_data | kmac_app_with_partial_data | 4.895m | 43.397ms | 10 | 10 | 100.00 |
| V2 | entropy_refresh | kmac_entropy_refresh | 5.474m | 21.629ms | 50 | 50 | 100.00 |
| V2 | error | kmac_error | 6.363m | 26.582ms | 50 | 50 | 100.00 |
| V2 | key_error | kmac_key_error | 15.590s | 8.697ms | 50 | 50 | 100.00 |
| V2 | sideload_invalid | kmac_sideload_invalid | 1.929m | 10.044ms | 33 | 50 | 66.00 |
| V2 | edn_timeout_error | kmac_edn_timeout_error | 40.680s | 9.357ms | 20 | 20 | 100.00 |
| V2 | entropy_mode_error | kmac_entropy_mode_error | 39.660s | 15.656ms | 20 | 20 | 100.00 |
| V2 | entropy_ready_error | kmac_entropy_ready_error | 1.034m | 14.814ms | 10 | 10 | 100.00 |
| V2 | lc_escalation | kmac_lc_escalation | 38.930s | 2.353ms | 50 | 50 | 100.00 |
| V2 | stress_all | kmac_stress_all | 28.327m | 86.427ms | 50 | 50 | 100.00 |
| V2 | intr_test | kmac_intr_test | 1.190s | 21.836us | 50 | 50 | 100.00 |
| V2 | alert_test | kmac_alert_test | 1.250s | 76.799us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | kmac_tl_errors | 4.080s | 262.251us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | kmac_tl_errors | 4.080s | 262.251us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | kmac_csr_hw_reset | 1.450s | 192.480us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.460s | 26.831us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 9.430s | 385.989us | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 3.010s | 134.651us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | kmac_csr_hw_reset | 1.450s | 192.480us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.460s | 26.831us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 9.430s | 385.989us | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 3.010s | 134.651us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 723 | 740 | 97.70 | |||
| V2S | shadow_reg_update_error | kmac_shadow_reg_errors | 2.480s | 89.098us | 20 | 20 | 100.00 |
| V2S | shadow_reg_read_clear_staged_value | kmac_shadow_reg_errors | 2.480s | 89.098us | 20 | 20 | 100.00 |
| V2S | shadow_reg_storage_error | kmac_shadow_reg_errors | 2.480s | 89.098us | 20 | 20 | 100.00 |
| V2S | shadowed_reset_glitch | kmac_shadow_reg_errors | 2.480s | 89.098us | 20 | 20 | 100.00 |
| V2S | shadow_reg_update_error_with_csr_rw | kmac_shadow_reg_errors_with_csr_rw | 5.290s | 255.419us | 20 | 20 | 100.00 |
| V2S | tl_intg_err | kmac_sec_cm | 1.207m | 5.133ms | 5 | 5 | 100.00 |
| kmac_tl_intg_err | 4.440s | 104.410us | 20 | 20 | 100.00 | ||
| V2S | sec_cm_bus_integrity | kmac_tl_intg_err | 4.440s | 104.410us | 20 | 20 | 100.00 |
| V2S | sec_cm_lc_escalate_en_intersig_mubi | kmac_lc_escalation | 38.930s | 2.353ms | 50 | 50 | 100.00 |
| V2S | sec_cm_sw_key_key_masking | kmac_smoke | 1.678m | 79.408ms | 50 | 50 | 100.00 |
| V2S | sec_cm_key_sideload | kmac_sideload | 6.395m | 20.913ms | 50 | 50 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_shadow | kmac_shadow_reg_errors | 2.480s | 89.098us | 20 | 20 | 100.00 |
| V2S | sec_cm_fsm_sparse | kmac_sec_cm | 1.207m | 5.133ms | 5 | 5 | 100.00 |
| V2S | sec_cm_ctr_redun | kmac_sec_cm | 1.207m | 5.133ms | 5 | 5 | 100.00 |
| V2S | sec_cm_packer_ctr_redun | kmac_sec_cm | 1.207m | 5.133ms | 5 | 5 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_regwen | kmac_smoke | 1.678m | 79.408ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_global_esc | kmac_lc_escalation | 38.930s | 2.353ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_local_esc | kmac_sec_cm | 1.207m | 5.133ms | 5 | 5 | 100.00 |
| V2S | sec_cm_absorbed_ctrl_mubi | kmac_mubi | 4.579m | 86.976ms | 10 | 10 | 100.00 |
| V2S | sec_cm_sw_cmd_ctrl_sparse | kmac_smoke | 1.678m | 79.408ms | 50 | 50 | 100.00 |
| V2S | TOTAL | 75 | 75 | 100.00 | |||
| V3 | stress_all_with_rand_reset | kmac_stress_all_with_rand_reset | 4.897m | 10.967ms | 7 | 10 | 70.00 |
| V3 | TOTAL | 7 | 10 | 70.00 | |||
| TOTAL | 920 | 940 | 97.87 |
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 4 failures:
1.kmac_sideload_invalid.93066604937700530656590230171458359717236306987686808549419797907336295581186
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/1.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10031731867 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x12b2e000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10031731867 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.kmac_sideload_invalid.41408070424203283242156357708060160593870062117795146986982226639272090820747
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/2.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10009895148 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xbfa00000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10009895148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_ERROR (cip_base_vseq.sv:1229) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 2 failures:
1.kmac_stress_all_with_rand_reset.61192042414901711781203963910796281550874462653023206156874189426982170406797
Line 159, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/1.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 2765849108 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 2765849108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.kmac_stress_all_with_rand_reset.43202629416876062589428579071261587541556747618665821771367182573550464103533
Line 310, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/4.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 16346504151 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 16346504151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) has 2 failures:
3.kmac_sideload_invalid.35860571037701109003306599085670217988000244508632359650202742705708591448234
Line 83, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/3.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10260407457 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xb3a84000, Comparison=CompareOpEq, exp_data=0x1, call_count=9)
UVM_INFO @ 10260407457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
47.kmac_sideload_invalid.24395225452096115068357632565874759368285746579906747299340792459839279972924
Line 83, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/47.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10063779497 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3b1b2000, Comparison=CompareOpEq, exp_data=0x1, call_count=9)
UVM_INFO @ 10063779497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) has 2 failures:
6.kmac_sideload_invalid.16832690452340141043120818684233453573481038316640643322463233013664339638364
Line 79, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/6.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10035999054 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf8515000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 10035999054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
10.kmac_sideload_invalid.85177345402894640663910166870148368979264796310065871802187627521785752436569
Line 79, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/10.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10134490308 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x1dad9000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 10134490308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) has 2 failures:
24.kmac_sideload_invalid.82410149443676491299648828644065665831000023000540881857337987053088253810185
Line 79, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/24.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10259422851 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xc23d5000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 10259422851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
36.kmac_sideload_invalid.42474586073905578323728386138419625117090590268197763437201173671619773526142
Line 79, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/36.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 11199128486 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x4c5ef000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 11199128486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:840) [kmac_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 1 failures:
9.kmac_stress_all_with_rand_reset.81316082293846350396246848289690236804713593426541364210597057241646340189759
Line 422, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/9.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 4113954838 ps: (cip_base_vseq.sv:840) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0])
UVM_INFO @ 4113954838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=12) has 1 failures:
16.kmac_sideload_invalid.37656614667435389933862012182240996536608414722034141538743454590711564923171
Line 87, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/16.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10372307468 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xee285000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)
UVM_INFO @ 10372307468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) has 1 failures:
19.kmac_sideload_invalid.81705696948507938098199717420100043432922524960980926703075373874539177390928
Line 84, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/19.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10043977197 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xb41d1000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)
UVM_INFO @ 10043977197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=27) has 1 failures:
31.kmac_sideload_invalid.36096100758871920118691821353862796677359913976996181567233719198833804333941
Line 110, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/31.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10631666547 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe435e000, Comparison=CompareOpEq, exp_data=0x1, call_count=27)
UVM_INFO @ 10631666547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 1 failures:
38.kmac_sideload_invalid.70953200572272552160030051024160639193114760532278972708978929163512807939126
Line 76, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/38.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10046548791 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe6968000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10046548791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) has 1 failures:
42.kmac_sideload_invalid.19876662507899329179375012221179631308413053285578755933308739071470398743146
Line 78, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/42.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10023700304 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x37639000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10023700304 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=17) has 1 failures:
46.kmac_sideload_invalid.37369430892422936559888403128400877034923236540789215347322405583627444016205
Line 92, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/46.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10581343822 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3e525000, Comparison=CompareOpEq, exp_data=0x1, call_count=17)
UVM_INFO @ 10581343822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=14) has 1 failures:
49.kmac_sideload_invalid.16512858361385604779861606889516195927819561135127098170784925290533046676173
Line 88, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/49.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 11417650170 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x13c5c000, Comparison=CompareOpEq, exp_data=0x1, call_count=14)
UVM_INFO @ 11417650170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---