AON_TIMER Simulation Results

Friday November 14 2025 18:20:34 UTC

GitHub Revision: 53b5e04

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke aon_timer_smoke 1.630s 549.106us 5 5 100.00
V1 csr_hw_reset aon_timer_csr_hw_reset 1.960s 1324.649us 5 5 100.00
V1 csr_rw aon_timer_csr_rw 1.570s 499.967us 20 20 100.00
V1 csr_bit_bash aon_timer_csr_bit_bash 29.780s 13300.394us 5 5 100.00
V1 csr_aliasing aon_timer_csr_aliasing 1.750s 601.369us 5 5 100.00
V1 csr_mem_rw_with_rand_reset aon_timer_csr_mem_rw_with_rand_reset 1.850s 526.602us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr aon_timer_csr_rw 1.570s 499.967us 20 20 100.00
aon_timer_csr_aliasing 1.750s 601.369us 5 5 100.00
V1 mem_walk aon_timer_mem_walk 1.130s 509.352us 5 5 100.00
V1 mem_partial_access aon_timer_mem_partial_access 1.500s 468.799us 5 5 100.00
V1 TOTAL 70 70 100.00
V2 prescaler aon_timer_prescaler 48.470s 41672.426us 15 15 100.00
V2 jump aon_timer_jump 1.280s 566.682us 5 5 100.00
V2 stress_all aon_timer_stress_all 145.660s 230944.454us 15 15 100.00
V2 alert_test aon_timer_alert_test 1.660s 507.743us 50 50 100.00
V2 intr_test aon_timer_intr_test 1.300s 505.043us 50 50 100.00
V2 tl_d_oob_addr_access aon_timer_tl_errors 2.550s 417.668us 20 20 100.00
V2 tl_d_illegal_access aon_timer_tl_errors 2.550s 417.668us 20 20 100.00
V2 tl_d_outstanding_access aon_timer_csr_hw_reset 1.960s 1324.649us 5 5 100.00
aon_timer_csr_rw 1.570s 499.967us 20 20 100.00
aon_timer_csr_aliasing 1.750s 601.369us 5 5 100.00
aon_timer_same_csr_outstanding 4.940s 2274.938us 20 20 100.00
V2 tl_d_partial_access aon_timer_csr_hw_reset 1.960s 1324.649us 5 5 100.00
aon_timer_csr_rw 1.570s 499.967us 20 20 100.00
aon_timer_csr_aliasing 1.750s 601.369us 5 5 100.00
aon_timer_same_csr_outstanding 4.940s 2274.938us 20 20 100.00
V2 TOTAL 175 175 100.00
V2S tl_intg_err aon_timer_sec_cm 11.720s 8080.010us 5 5 100.00
aon_timer_tl_intg_err 9.110s 8223.608us 20 20 100.00
V2S sec_cm_bus_integrity aon_timer_tl_intg_err 9.110s 8223.608us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 max_threshold aon_timer_smoke_max_thold 1.210s 566.603us 5 5 100.00
V3 min_threshold aon_timer_smoke_min_thold 1.760s 654.797us 5 5 100.00
V3 wkup_count_hi_cdc aon_timer_wkup_count_cdc_hi 8.340s 3794.566us 5 5 100.00
V3 custom_intr aon_timer_custom_intr 2.000s 718.055us 10 10 100.00
V3 alternating_on_off aon_timer_alternating_enable_on_off 13.830s 4357.329us 5 5 100.00
V3 stress_all_with_rand_reset aon_timer_stress_all_with_rand_reset 38.650s 17027.537us 15 15 100.00
V3 TOTAL 45 45 100.00
TOTAL 315 315 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
98.65 99.09 99.05 98.53 -- 98.56 96.67 100.00