SRAM_CTRL/MAIN Simulation Results

Friday November 14 2025 18:20:34 UTC

GitHub Revision: `53b5e04`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	sram_ctrl_smoke	111.490s	2433.777us	100	100	100.00
V1	csr_hw_reset	sram_ctrl_csr_hw_reset	1.120s	38.771us	10	10	100.00
V1	csr_rw	sram_ctrl_csr_rw	1.060s	23.064us	40	40	100.00
V1	csr_bit_bash	sram_ctrl_csr_bit_bash	2.800s	660.386us	10	10	100.00
V1	csr_aliasing	sram_ctrl_csr_aliasing	1.110s	69.833us	10	10	100.00
V1	csr_mem_rw_with_rand_reset	sram_ctrl_csr_mem_rw_with_rand_reset	6.310s	472.003us	38	40	95.00
V1	regwen_csr_and_corresponding_lockable_csr	sram_ctrl_csr_rw	1.060s	23.064us	40	40	100.00
		sram_ctrl_csr_aliasing	1.110s	69.833us	10	10	100.00
V1	mem_walk	sram_ctrl_mem_walk	317.470s	27672.500us	100	100	100.00
V1	mem_partial_access	sram_ctrl_mem_partial_access	170.140s	4957.173us	100	100	100.00
V1		TOTAL			408	410	99.51
V2	multiple_keys	sram_ctrl_multiple_keys	1145.420s	24146.830us	100	100	100.00
V2	stress_pipeline	sram_ctrl_stress_pipeline	433.390s	19204.019us	100	100	100.00
V2	bijection	sram_ctrl_bijection	2229.180s	718476.155us	100	100	100.00
V2	access_during_key_req	sram_ctrl_access_during_key_req	1261.920s	62317.768us	100	100	100.00
V2	lc_escalation	sram_ctrl_lc_escalation	122.790s	17038.246us	100	100	100.00
V2	executable	sram_ctrl_executable	1283.300s	25596.033us	100	100	100.00
V2	partial_access	sram_ctrl_partial_access	101.660s	839.515us	100	100	100.00
		sram_ctrl_partial_access_b2b	569.200s	25384.491us	100	100	100.00
V2	max_throughput	sram_ctrl_max_throughput	108.110s	770.923us	100	100	100.00
		sram_ctrl_throughput_w_partial_write	114.630s	3269.866us	100	100	100.00
		sram_ctrl_throughput_w_readback	120.520s	953.802us	100	100	100.00
V2	regwen	sram_ctrl_regwen	1289.120s	47730.987us	100	100	100.00
V2	ram_cfg	sram_ctrl_ram_cfg	5.080s	1408.358us	100	100	100.00
V2	stress_all	sram_ctrl_stress_all	8117.140s	1420018.502us	100	100	100.00
V2	alert_test	sram_ctrl_alert_test	1.060s	16.407us	100	100	100.00
V2	tl_d_oob_addr_access	sram_ctrl_tl_errors	5.780s	650.069us	40	40	100.00
V2	tl_d_illegal_access	sram_ctrl_tl_errors	5.780s	650.069us	40	40	100.00
V2	tl_d_outstanding_access	sram_ctrl_csr_hw_reset	1.120s	38.771us	10	10	100.00
		sram_ctrl_csr_rw	1.060s	23.064us	40	40	100.00
		sram_ctrl_csr_aliasing	1.110s	69.833us	10	10	100.00
		sram_ctrl_same_csr_outstanding	1.220s	23.840us	40	40	100.00
V2	tl_d_partial_access	sram_ctrl_csr_hw_reset	1.120s	38.771us	10	10	100.00
		sram_ctrl_csr_rw	1.060s	23.064us	40	40	100.00
		sram_ctrl_csr_aliasing	1.110s	69.833us	10	10	100.00
		sram_ctrl_same_csr_outstanding	1.220s	23.840us	40	40	100.00
V2		TOTAL			1580	1580	100.00
V2S	passthru_mem_tl_intg_err	sram_ctrl_passthru_mem_tl_intg_err	67.230s	28193.968us	40	40	100.00
V2S	tl_intg_err	sram_ctrl_sec_cm	1.140s	5.693us	0	10	0.00
		sram_ctrl_tl_intg_err	3.620s	387.502us	39	40	97.50
V2S	prim_count_check	sram_ctrl_sec_cm	1.140s	5.693us	0	10	0.00
V2S	sec_cm_bus_integrity	sram_ctrl_tl_intg_err	3.620s	387.502us	39	40	97.50
V2S	sec_cm_ctrl_config_regwen	sram_ctrl_regwen	1289.120s	47730.987us	100	100	100.00
V2S	sec_cm_readback_config_regwen	sram_ctrl_regwen	1289.120s	47730.987us	100	100	100.00
V2S	sec_cm_exec_config_regwen	sram_ctrl_csr_rw	1.060s	23.064us	40	40	100.00
V2S	sec_cm_exec_config_mubi	sram_ctrl_executable	1283.300s	25596.033us	100	100	100.00
V2S	sec_cm_exec_intersig_mubi	sram_ctrl_executable	1283.300s	25596.033us	100	100	100.00
V2S	sec_cm_lc_hw_debug_en_intersig_mubi	sram_ctrl_executable	1283.300s	25596.033us	100	100	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	sram_ctrl_lc_escalation	122.790s	17038.246us	100	100	100.00
V2S	sec_cm_prim_ram_ctrl_mubi	sram_ctrl_mubi_enc_err	10.730s	9551.380us	83	100	83.00
V2S	sec_cm_mem_integrity	sram_ctrl_passthru_mem_tl_intg_err	67.230s	28193.968us	40	40	100.00
V2S	sec_cm_mem_readback	sram_ctrl_readback_err	10.600s	4812.086us	67	100	67.00
V2S	sec_cm_mem_scramble	sram_ctrl_smoke	111.490s	2433.777us	100	100	100.00
V2S	sec_cm_addr_scramble	sram_ctrl_smoke	111.490s	2433.777us	100	100	100.00
V2S	sec_cm_instr_bus_lc_gated	sram_ctrl_executable	1283.300s	25596.033us	100	100	100.00
V2S	sec_cm_ram_tl_lc_gate_fsm_sparse	sram_ctrl_sec_cm	1.140s	5.693us	0	10	0.00
V2S	sec_cm_key_global_esc	sram_ctrl_lc_escalation	122.790s	17038.246us	100	100	100.00
V2S	sec_cm_key_local_esc	sram_ctrl_sec_cm	1.140s	5.693us	0	10	0.00
V2S	sec_cm_init_ctr_redun	sram_ctrl_sec_cm	1.140s	5.693us	0	10	0.00
V2S	sec_cm_scramble_key_sideload	sram_ctrl_smoke	111.490s	2433.777us	100	100	100.00
V2S	sec_cm_tlul_fifo_ctr_redun	sram_ctrl_sec_cm	1.140s	5.693us	0	10	0.00
V2S		TOTAL			229	290	78.97
V3	stress_all_with_rand_reset	sram_ctrl_stress_all_with_rand_reset	578.480s	1944.045us	100	100	100.00
V3		TOTAL			100	100	100.00
		TOTAL			2317	2380	97.35

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
96.39	99.11	92.90	90.71	100.00	98.02	95.83	98.14

Failure Buckets

UVM_ERROR (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (*) != exp (*) has 33 failures:
- Test sram_ctrl_readback_err has 33 failures.
  - 8.sram_ctrl_readback_err.35450700691318710595598344533089454537908422116815012578088305634379306895923
    Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/8.sram_ctrl_readback_err/latest/run.log
```
  UVM_ERROR @ 2640925245 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x21) != exp (0x2f)
  UVM_INFO @ 2640925245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 15.sram_ctrl_readback_err.110059963650640384359062096135957744547538002448333837395108061040712626432847
    Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/15.sram_ctrl_readback_err/latest/run.log
```
  UVM_ERROR @ 693295123 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x5) != exp (0x5b)
  UVM_INFO @ 693295123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 31 more failures.
Offending 'reqfifo_rvalid' has 16 failures:
- Test sram_ctrl_mubi_enc_err has 16 failures.
  - 4.sram_ctrl_mubi_enc_err.54627462937110322542134513744188648355600041949927888115542796371509309584624
    Line 101, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/4.sram_ctrl_mubi_enc_err/latest/run.log
```
      Offending 'reqfifo_rvalid'
  UVM_ERROR @ 1319785396 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty
  UVM_INFO @ 1319785396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 9.sram_ctrl_mubi_enc_err.7052128754368942334969668972026951791336116704126236201897956342092713078965
    Line 101, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/9.sram_ctrl_mubi_enc_err/latest/run.log
```
      Offending 'reqfifo_rvalid'
  UVM_ERROR @ 8264601426 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty
  UVM_INFO @ 8264601426 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 14 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: * has 7 failures:
- Test sram_ctrl_sec_cm has 7 failures.
  - 0.sram_ctrl_sec_cm.74013437718652661531887441098332203826740509746753381800459572091995726734066
    Line 99, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/0.sram_ctrl_sec_cm/latest/run.log
```
  UVM_ERROR @   9725562 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0
  UVM_INFO @   9725562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 3.sram_ctrl_sec_cm.108676281501874902297911880637818932559748673920522119797670717227478341227919
    Line 99, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/3.sram_ctrl_sec_cm/latest/run.log
```
  UVM_ERROR @   7974697 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0
  UVM_INFO @   7974697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 5 more failures.

Offending '(depth_o <= *'(Depth))' has 2 failures:

Test sram_ctrl_sec_cm has 2 failures.

1.sram_ctrl_sec_cm.50248856785369120555077485623761837080753531140712054622085608207117609415649
Line 99, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/1.sram_ctrl_sec_cm/latest/run.log

      Offending '(depth_o <= 2'(Depth))'
  UVM_ERROR @   3654324 ps: (prim_fifo_sync.sv:211) [ASSERT FAILED] depthShallNotExceedParamDepth
  UVM_INFO @   3654324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

2.sram_ctrl_sec_cm.61068033578819175362497336297625043660024987726890060343966884198712091695828
Line 96, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/2.sram_ctrl_sec_cm/latest/run.log

      Offending '(depth_o <= 2'(Depth))'
  UVM_ERROR @   3826539 ps: (prim_fifo_sync.sv:211) [ASSERT FAILED] depthShallNotExceedParamDepth
  UVM_INFO @   3826539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (cip_base_scoreboard.sv:549) [scoreboard] Check failed item.d_error == exp_d_error (* [*] vs * [*]) On interface sram_ctrl_prim_reg_block, TL item: req: (cip_tl_seq_item@5320) { a_addr: * a_data: * a_mask: * a_size: * a_param: * a_source: * a_opcode: * a_user: * d_param: * d_source: * d_data: * d_size: * d_opcode: * d_error: * d_sink: * d_user: * a_valid_delay: * d_valid_delay: * a_valid_len: * d_valid_len: * req_abort_after_a_valid_len: * rsp_abort_after_d_valid_len: * req_completed: * rsp_completed: * tl_intg_err_type: TlIntgErrNone max_ecc_errors: * } has 1 failures:

Test sram_ctrl_mubi_enc_err has 1 failures.

12.sram_ctrl_mubi_enc_err.2369269792064204931703462656256279277457314270794011459067419828480731559968
Line 100, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/12.sram_ctrl_mubi_enc_err/latest/run.log

  UVM_ERROR @ 2532226241 ps: (cip_base_scoreboard.sv:549) [uvm_test_top.env.scoreboard] Check failed item.d_error == exp_d_error (1 [0x1] vs 0 [0x0]) On interface sram_ctrl_prim_reg_block, TL item: req: (cip_tl_seq_item@5320) { a_addr: 'hfff1dec4  a_data: 'h0  a_mask: 'hf  a_size: 'h2  a_param: 'h0  a_source: 'h2c  a_opcode: 'h4  a_user: 'h24c2a  d_param: 'h0  d_source: 'h2c  d_data: 'hffffffff  d_size: 'h2  d_opcode: 'h1  d_error: 'h1  d_sink: 'h0  d_user: 'heaa  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  }
  , unmapped_err: 0, mem_access_err: 0, bus_intg_err: 0, byte_wr_err: 0, csr_size_err: 0, tl_item_err: 0, write_w_instr_type_err: 0, cfg.tl_mem_access_gated: 0 ecc_err: 0
  UVM_INFO @ 2532226241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Offending '(!$isunknown(rdata_o))' has 1 failures:
- Test sram_ctrl_sec_cm has 1 failures.
  - 3.sram_ctrl_sec_cm.82581721175022363365058220938880828827922127589873891794183418658968424411127
    Line 96, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/3.sram_ctrl_sec_cm/latest/run.log
```
      Offending '(!$isunknown(rdata_o))'
  UVM_ERROR @   3810893 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A
  UVM_INFO @   3810893 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 1 failures:
- Test sram_ctrl_tl_intg_err has 1 failures.
  - 7.sram_ctrl_tl_intg_err.79384650082553990494583213979220848668831411921670163035662724434909821632988
    Line 329, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/7.sram_ctrl_tl_intg_err/latest/run.log
```
  UVM_ERROR @ 461055665 ps: uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.sequencer [uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 461055665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.status.init_done reset value: * has 1 failures:
- Test sram_ctrl_csr_mem_rw_with_rand_reset has 1 failures.
  - 17.sram_ctrl_csr_mem_rw_with_rand_reset.58061541590198327532319862514189722137375675474226699499307258742536844741548
    Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/17.sram_ctrl_csr_mem_rw_with_rand_reset/latest/run.log
```
  UVM_ERROR @  99396762 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: sram_ctrl_regs_reg_block.status.init_done reset value: 0x0
  UVM_INFO @  99396762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.scr_key_rotated.success reset value: * has 1 failures:
- Test sram_ctrl_csr_mem_rw_with_rand_reset has 1 failures.
  - 18.sram_ctrl_csr_mem_rw_with_rand_reset.25027545487949242676801635618321563694140618850971229390532507529345580034224
    Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/18.sram_ctrl_csr_mem_rw_with_rand_reset/latest/run.log
```
  UVM_ERROR @  59073733 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (15 [0xf] vs 9 [0x9]) Regname: sram_ctrl_regs_reg_block.scr_key_rotated.success reset value: 0x9
  UVM_INFO @  59073733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```