| V1 |
smoke |
aon_timer_smoke |
1.640s |
705.723us |
5 |
5 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.060s |
1289.603us |
5 |
5 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.260s |
492.403us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
31.720s |
13837.153us |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.930s |
589.065us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.270s |
463.780us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.260s |
492.403us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.930s |
589.065us |
5 |
5 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.050s |
364.400us |
5 |
5 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.110s |
400.964us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
70 |
70 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
48.550s |
36780.038us |
15 |
15 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.430s |
707.013us |
5 |
5 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
205.630s |
96229.647us |
15 |
15 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.980s |
427.688us |
50 |
50 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.160s |
521.672us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.090s |
518.912us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.090s |
518.912us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.060s |
1289.603us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
1.260s |
492.403us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.930s |
589.065us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.390s |
2071.315us |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.060s |
1289.603us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
1.260s |
492.403us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.930s |
589.065us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.390s |
2071.315us |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
175 |
175 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_tl_intg_err |
11.480s |
8583.019us |
20 |
20 |
100.00 |
|
|
aon_timer_sec_cm |
13.250s |
7760.643us |
5 |
5 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
11.480s |
8583.019us |
20 |
20 |
100.00 |
| V2S |
|
TOTAL |
|
|
25 |
25 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.590s |
692.121us |
5 |
5 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
2.480s |
624.943us |
5 |
5 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
8.990s |
3869.602us |
5 |
5 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.710s |
492.129us |
10 |
10 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
14.760s |
4069.833us |
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
26.500s |
13312.235us |
15 |
15 |
100.00 |
| V3 |
|
TOTAL |
|
|
45 |
45 |
100.00 |
|
|
TOTAL |
|
|
315 |
315 |
100.00 |