I2C Simulation Results

Friday November 21 2025 17:05:34 UTC

GitHub Revision: `1f7db17`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	97.210s	9223.667us	50	50	100.00
V1	target_smoke	i2c_target_smoke	33.140s	1283.009us	50	50	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	1.070s	20.649us	5	5	100.00
V1	csr_rw	i2c_csr_rw	1.050s	49.799us	20	20	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	5.550s	546.096us	5	5	100.00
V1	csr_aliasing	i2c_csr_aliasing	1.970s	143.416us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.530s	60.601us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	1.050s	49.799us	20	20	100.00
		i2c_csr_aliasing	1.970s	143.416us	5	5	100.00
V1		TOTAL			155	155	100.00
V2	host_error_intr	i2c_host_error_intr	8.820s	1229.394us	2	50	4.00
V2	host_stress_all	i2c_host_stress_all	2180.260s	26725.692us	6	50	12.00
V2	host_maxperf	i2c_host_perf	2534.280s	48194.432us	50	50	100.00
V2	host_override	i2c_host_override	1.050s	45.550us	50	50	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	278.660s	12555.973us	50	50	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	144.100s	2462.999us	50	50	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.660s	735.982us	50	50	100.00
		i2c_host_fifo_fmt_empty	23.210s	1925.877us	50	50	100.00
		i2c_host_fifo_reset_rx	10.760s	459.379us	50	50	100.00
V2	host_fifo_full	i2c_host_fifo_full	212.440s	3583.412us	50	50	100.00
V2	host_timeout	i2c_host_stretch_timeout	38.790s	7220.092us	50	50	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	4.780s	260.657us	22	50	44.00
V2	target_glitch	i2c_target_glitch	3.340s	2056.473us	0	2	0.00
V2	target_stress_all	i2c_target_stress_all	2117.150s	72817.839us	48	50	96.00
V2	target_maxperf	i2c_target_perf	9.400s	2221.229us	50	50	100.00
V2	target_fifo_empty	i2c_target_stress_rd	58.620s	1534.312us	50	50	100.00
		i2c_target_intr_smoke	10.280s	1640.427us	50	50	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	2.220s	428.977us	50	50	100.00
		i2c_target_fifo_reset_tx	2.270s	310.975us	50	50	100.00
V2	target_fifo_full	i2c_target_stress_wr	1171.980s	58256.909us	50	50	100.00
		i2c_target_stress_rd	58.620s	1534.312us	50	50	100.00
		i2c_target_intr_stress_wr	301.360s	19879.589us	50	50	100.00
V2	target_timeout	i2c_target_timeout	9.190s	1590.311us	50	50	100.00
V2	target_clock_stretch	i2c_target_stretch	142.680s	4125.992us	45	50	90.00
V2	bad_address	i2c_target_bad_addr	9.150s	7512.136us	50	50	100.00
V2	target_mode_glitch	i2c_target_hrst	38.340s	10176.148us	25	50	50.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	3.890s	528.092us	50	50	100.00
		i2c_target_fifo_watermarks_tx	2.130s	157.506us	49	50	98.00
V2	host_mode_config_perf	i2c_host_perf	2534.280s	48194.432us	50	50	100.00
		i2c_host_perf_precise	1155.290s	23262.731us	50	50	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	38.790s	7220.092us	50	50	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	16.560s	1292.376us	45	50	90.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	3.890s	3136.066us	50	50	100.00
		i2c_target_nack_acqfull_addr	3.730s	1837.185us	50	50	100.00
		i2c_target_nack_txstretch	2.310s	217.327us	40	50	80.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	24.420s	1253.063us	50	50	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	3.390s	527.296us	50	50	100.00
V2	alert_test	i2c_alert_test	1.010s	19.029us	50	50	100.00
V2	intr_test	i2c_intr_test	1.020s	25.605us	50	50	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	2.550s	61.620us	20	20	100.00
V2	tl_d_illegal_access	i2c_tl_errors	2.550s	61.620us	20	20	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	1.070s	20.649us	5	5	100.00
		i2c_csr_rw	1.050s	49.799us	20	20	100.00
		i2c_csr_aliasing	1.970s	143.416us	5	5	100.00
		i2c_same_csr_outstanding	1.590s	183.373us	20	20	100.00
V2	tl_d_partial_access	i2c_csr_hw_reset	1.070s	20.649us	5	5	100.00
		i2c_csr_rw	1.050s	49.799us	20	20	100.00
		i2c_csr_aliasing	1.970s	143.416us	5	5	100.00
		i2c_same_csr_outstanding	1.590s	183.373us	20	20	100.00
V2		TOTAL			1622	1792	90.51
V2S	tl_intg_err	i2c_sec_cm	1.320s	52.347us	5	5	100.00
		i2c_tl_intg_err	2.420s	476.398us	20	20	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	2.420s	476.398us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	46.070s	7664.829us	0	10	0.00
V3	target_error_intr	i2c_target_unexp_stop	2.630s	291.744us	0	50	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	31.330s	2264.706us	0	10	0.00
V3		TOTAL			0	70	0.00
		TOTAL			1802	2042	88.25

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
86.13	97.25	89.06	89.66	47.62	93.83	96.41	89.11

Failure Buckets

UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 81 failures:

Test i2c_host_error_intr has 47 failures.

0.i2c_host_error_intr.9375438999891945904570463514098023857665107119108495783020808197926291575204
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log

  UVM_ERROR @  14029639 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  14029639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_error_intr.110496888960942804802780481300309269601669470695902530351174982044806910329853
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log

  UVM_ERROR @   4620012 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @   4620012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 45 more failures.

Test i2c_host_stress_all has 27 failures.

1.i2c_host_stress_all.18001070579207297679032485346875277017483541578556762581454012674530559592701
Line 141, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 19520054861 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 19520054861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

3.i2c_host_stress_all.31975631230484496199823405330218981862659319696168754264740715704593149144189
Line 127, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 8387254033 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 8387254033 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 25 more failures.

Test i2c_host_mode_toggle has 5 failures.

6.i2c_host_mode_toggle.41561056076781632087325812920753702840156845818409323585402928896195368568281
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 153870111 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 153870111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

18.i2c_host_mode_toggle.59906710971261657010903268389025083231180672464077405086218803536372928358550
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/18.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  13427816 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  13427816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

Test i2c_target_stress_all_with_rand_reset has 2 failures.

8.i2c_target_stress_all_with_rand_reset.105127718056031017142518220464684114424933612464445219061534101405446843172574
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @   6552758 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @   6552758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

9.i2c_target_stress_all_with_rand_reset.30998269156755629357961727728851195792132594222465616423823311943484154504542
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/9.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @  20928590 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  20928590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 31 failures:
- Test i2c_target_unexp_stop has 31 failures.
  - 0.i2c_target_unexp_stop.65411355206353422728222695093900017887872184170895898296521476507589442007380
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @  69580750 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 115 [0x73])
  UVM_INFO @  69580750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 1.i2c_target_unexp_stop.59010564420973551239529025688212977969853048827831905334981807495405192516394
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 216805042 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 43 [0x2b])
  UVM_INFO @ 216805042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 29 more failures.

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 25 failures:

Test i2c_host_stress_all has 12 failures.

0.i2c_host_stress_all.11736578519154533095951591277305513672678528437259986896017932114770106024139
Line 131, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 77398126157 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @2214383

4.i2c_host_stress_all.25063217353770832463367528640759331061596208409316578170596289859267705303556
Line 118, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 60599978157 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @3023703

... and 10 more failures.

Test i2c_host_mode_toggle has 13 failures.

2.i2c_host_mode_toggle.59478540020285998533840914749098750981139434458517267755872552198061158070546
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 466242019 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @30962

3.i2c_host_mode_toggle.104710639136595586550147349275600570535184657459675736034320742145233323946724
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 704246495 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @55590

... and 11 more failures.

UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 25 failures:
- Test i2c_target_hrst has 25 failures.
  - 0.i2c_target_hrst.4767795972254275615805649490088891287200755372142083940928955470788680237020
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10050006581 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10050006581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.i2c_target_hrst.69576339247582955144430427851080435173252164648113182316993968466716370775358
    Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10270212463 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10270212463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 23 more failures.

UVM_ERROR (cip_base_vseq.sv:1229) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 14 failures:

Test i2c_host_stress_all_with_rand_reset has 10 failures.

0.i2c_host_stress_all_with_rand_reset.70307184540518785285877798822079216066322541977562177186768400445009377716068
Line 86, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 645048066 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 645048066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all_with_rand_reset.30642179550213651842435022559017026389542908562288991720942548794852381043529
Line 91, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 974248093 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 974248093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

Test i2c_target_stress_all_with_rand_reset has 4 failures.

1.i2c_target_stress_all_with_rand_reset.17113153904757455311928298282311878653327306499748843542839164492533040786104
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 790987894 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10001 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 790987894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

2.i2c_target_stress_all_with_rand_reset.42751689194487822050322418451120091569460908718733811974039381823366948102237
Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 2061948012 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 2061948012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 12 failures:
- Test i2c_target_unexp_stop has 12 failures.
  - 3.i2c_target_unexp_stop.79470912695251372385694570393272664857222299151631449435992099056077076432036
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @  81131838 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @  81131838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 6.i2c_target_unexp_stop.63865152903114279190206653479740681536625013273084371272141713734587909084026
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 599372172 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 599372172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 10 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 10 failures:
- Test i2c_target_nack_txstretch has 10 failures.
  - 2.i2c_target_nack_txstretch.35255519641504643800462264250210622690686079873955021059844794571763662559658
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 149963561 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 149963561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 3.i2c_target_nack_txstretch.108317840243790352255173083848413527532212331480738300005078693103009409246468
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 417690109 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 417690109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 8 more failures.

Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 7 failures:

Test i2c_target_unexp_stop has 7 failures.

4.i2c_target_unexp_stop.35529798203604689946189549828162745801692198985012662288692137983204112662479
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 515805979 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 515805979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

7.i2c_target_unexp_stop.30138518995224069674625011329988208890326234973633343638421308761782928005928
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @  78486534 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @  78486534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 5 more failures.

Error-[CNST-CIF] Constraints inconsistency failure has 6 failures:
- Test i2c_target_tx_stretch_ctrl has 5 failures.
  - 3.i2c_target_tx_stretch_ctrl.70133113685804927522051139397182494716636736681731620028031124039173866554854
    Line 127, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
  - 9.i2c_target_tx_stretch_ctrl.95162432226472476716406233985937217660887299775244333750632388633916568074334
    Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/9.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
  - ... and 3 more failures.
- Test i2c_target_fifo_watermarks_tx has 1 failures.
  - 6.i2c_target_fifo_watermarks_tx.91245890745962609452783122949653274180302066248230287053256469256644318922137
    Line 118, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_fifo_watermarks_tx/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 845
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
Job timed out after * minutes has 6 failures:
- Test i2c_host_stress_all has 5 failures.
  - 6.i2c_host_stress_all.92443143973583755922061721455228575562433641528014109268896606753846460573241
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - 11.i2c_host_stress_all.60217504272852767469172833234567460950246078809178221009181172226671826822206
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/11.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - ... and 3 more failures.
- Test i2c_host_error_intr has 1 failures.
  - 23.i2c_host_error_intr.71466058935781978387295722019876749927407719460403138012598767637175575927433
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/23.i2c_host_error_intr/latest/run.log
```
  Job timed out after 60 minutes
```
UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 5 failures:
- Test i2c_target_stretch has 5 failures.
  - 6.i2c_target_stretch.102803912564787036731552289357471011038950861805217552128770277323033763937769
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10012057457 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10012057457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 13.i2c_target_stretch.115400281443715846949540653759688528609035267081820426136452027100275911596827
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/13.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10002348924 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10002348924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 3 more failures.

UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 5 failures:

Test i2c_host_mode_toggle has 5 failures.

29.i2c_host_mode_toggle.68851078533424696823245152134273484167471407325468760059065347029087176118374
Line 89, in log /nightly/current_run/scratch/master/i2c-sim-vcs/29.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 131909062 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

33.i2c_host_mode_toggle.58608147729086969128222901487031397464032836324407832854547886143513227584443
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/33.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 272412638 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

... and 3 more failures.

UVM_ERROR (cip_base_vseq.sv:1142) [i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items. has 4 failures:
- Test i2c_target_stress_all_with_rand_reset has 4 failures.
  - 0.i2c_target_stress_all_with_rand_reset.94157541619203501450668836552559930845226446568254143413053776149646261571088
    Line 100, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 2264705950 ps: (cip_base_vseq.sv:1142) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.
  UVM_INFO @ 2264705950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 3.i2c_target_stress_all_with_rand_reset.35591675882337009255147070470786468426320971698168005242046982211752039207930
    Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 943234028 ps: (cip_base_vseq.sv:1142) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.
  UVM_INFO @ 943234028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 2 more failures.
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 4 failures:
- Test i2c_host_mode_toggle has 4 failures.
  - 0.i2c_host_mode_toggle.95480285533573095635212554375781439058748901734174552935516725812022344061402
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @  74474169 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0xea111294, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  74474169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 13.i2c_host_mode_toggle.13712611190818384639085204118161285303765196608611940833298308400810496639892
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/13.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @ 225826251 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x63e08314, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @ 225826251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 2 more failures.

UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:

Test i2c_target_glitch has 2 failures.

0.i2c_target_glitch.99590028099199948276330166557672473417442425305493543861018895741272615781645
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 1863882013 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 1863882013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_glitch.106680391753839337602444789653507103250087351622909517062281619021560068005225
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 2056473329 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 2056473329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_FATAL (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred! has 2 failures:
- Test i2c_target_stress_all has 2 failures.
  - 29.i2c_target_stress_all.17049606425470328981252323650751845615375002732394092370237830877273029362637
    Line 103, in log /nightly/current_run/scratch/master/i2c-sim-vcs/29.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 48253654569 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 48253654569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 44.i2c_target_stress_all.107032198392605673176514669362388818856374453821558078124418174728810782593480
    Line 114, in log /nightly/current_run/scratch/master/i2c-sim-vcs/44.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 51442566168 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 51442566168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Error-[NOA] Null object access has 1 failures:
- Test i2c_host_mode_toggle has 1 failures.
  - 1.i2c_host_mode_toggle.96499165648196665168093587575342323755683306960937183995633323578460645454583
    Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_mode_toggle/latest/run.log
```
  Error-[NOA] Null object access
  src/lowrisc_dv_i2c_env_0.1/i2c_reference_model.sv, 584
    The object at dereference depth 0 is being used before it was
    constructed/allocated.
    Please make sure that the object is allocated before using it.
```