SRAM_CTRL/MAIN Simulation Results

Friday November 21 2025 17:05:34 UTC

GitHub Revision: `1f7db17`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	sram_ctrl_smoke	105.550s	1275.414us	100	100	100.00
V1	csr_hw_reset	sram_ctrl_csr_hw_reset	1.090s	51.013us	10	10	100.00
V1	csr_rw	sram_ctrl_csr_rw	1.080s	23.190us	40	40	100.00
V1	csr_bit_bash	sram_ctrl_csr_bit_bash	2.430s	432.734us	10	10	100.00
V1	csr_aliasing	sram_ctrl_csr_aliasing	1.150s	21.575us	10	10	100.00
V1	csr_mem_rw_with_rand_reset	sram_ctrl_csr_mem_rw_with_rand_reset	6.640s	363.662us	36	40	90.00
V1	regwen_csr_and_corresponding_lockable_csr	sram_ctrl_csr_rw	1.080s	23.190us	40	40	100.00
		sram_ctrl_csr_aliasing	1.150s	21.575us	10	10	100.00
V1	mem_walk	sram_ctrl_mem_walk	387.940s	43065.716us	100	100	100.00
V1	mem_partial_access	sram_ctrl_mem_partial_access	184.620s	19303.827us	100	100	100.00
V1		TOTAL			406	410	99.02
V2	multiple_keys	sram_ctrl_multiple_keys	1812.960s	20099.550us	100	100	100.00
V2	stress_pipeline	sram_ctrl_stress_pipeline	426.420s	3648.803us	100	100	100.00
V2	bijection	sram_ctrl_bijection	2566.680s	661927.110us	100	100	100.00
V2	access_during_key_req	sram_ctrl_access_during_key_req	1229.130s	71703.459us	100	100	100.00
V2	lc_escalation	sram_ctrl_lc_escalation	132.750s	33718.839us	99	100	99.00
V2	executable	sram_ctrl_executable	1482.790s	22688.190us	100	100	100.00
V2	partial_access	sram_ctrl_partial_access	117.460s	218.944us	100	100	100.00
		sram_ctrl_partial_access_b2b	596.010s	88512.132us	100	100	100.00
V2	max_throughput	sram_ctrl_max_throughput	103.440s	1688.723us	100	100	100.00
		sram_ctrl_throughput_w_partial_write	109.620s	813.566us	100	100	100.00
		sram_ctrl_throughput_w_readback	113.040s	588.712us	100	100	100.00
V2	regwen	sram_ctrl_regwen	1420.640s	109089.890us	100	100	100.00
V2	ram_cfg	sram_ctrl_ram_cfg	6.180s	3726.684us	100	100	100.00
V2	stress_all	sram_ctrl_stress_all	6204.510s	1297802.995us	100	100	100.00
V2	alert_test	sram_ctrl_alert_test	1.110s	158.562us	100	100	100.00
V2	tl_d_oob_addr_access	sram_ctrl_tl_errors	5.460s	838.552us	40	40	100.00
V2	tl_d_illegal_access	sram_ctrl_tl_errors	5.460s	838.552us	40	40	100.00
V2	tl_d_outstanding_access	sram_ctrl_csr_hw_reset	1.090s	51.013us	10	10	100.00
		sram_ctrl_csr_rw	1.080s	23.190us	40	40	100.00
		sram_ctrl_csr_aliasing	1.150s	21.575us	10	10	100.00
		sram_ctrl_same_csr_outstanding	1.210s	31.090us	40	40	100.00
V2	tl_d_partial_access	sram_ctrl_csr_hw_reset	1.090s	51.013us	10	10	100.00
		sram_ctrl_csr_rw	1.080s	23.190us	40	40	100.00
		sram_ctrl_csr_aliasing	1.150s	21.575us	10	10	100.00
		sram_ctrl_same_csr_outstanding	1.210s	31.090us	40	40	100.00
V2		TOTAL			1579	1580	99.94
V2S	passthru_mem_tl_intg_err	sram_ctrl_passthru_mem_tl_intg_err	73.330s	88029.372us	40	40	100.00
V2S	tl_intg_err	sram_ctrl_tl_intg_err	4.410s	2660.289us	40	40	100.00
		sram_ctrl_sec_cm	1.050s	14.516us	0	10	0.00
V2S	prim_count_check	sram_ctrl_sec_cm	1.050s	14.516us	0	10	0.00
V2S	sec_cm_bus_integrity	sram_ctrl_tl_intg_err	4.410s	2660.289us	40	40	100.00
V2S	sec_cm_ctrl_config_regwen	sram_ctrl_regwen	1420.640s	109089.890us	100	100	100.00
V2S	sec_cm_readback_config_regwen	sram_ctrl_regwen	1420.640s	109089.890us	100	100	100.00
V2S	sec_cm_exec_config_regwen	sram_ctrl_csr_rw	1.080s	23.190us	40	40	100.00
V2S	sec_cm_exec_config_mubi	sram_ctrl_executable	1482.790s	22688.190us	100	100	100.00
V2S	sec_cm_exec_intersig_mubi	sram_ctrl_executable	1482.790s	22688.190us	100	100	100.00
V2S	sec_cm_lc_hw_debug_en_intersig_mubi	sram_ctrl_executable	1482.790s	22688.190us	100	100	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	sram_ctrl_lc_escalation	132.750s	33718.839us	99	100	99.00
V2S	sec_cm_prim_ram_ctrl_mubi	sram_ctrl_mubi_enc_err	10.410s	5115.370us	93	100	93.00
V2S	sec_cm_mem_integrity	sram_ctrl_passthru_mem_tl_intg_err	73.330s	88029.372us	40	40	100.00
V2S	sec_cm_mem_readback	sram_ctrl_readback_err	10.970s	5970.729us	77	100	77.00
V2S	sec_cm_mem_scramble	sram_ctrl_smoke	105.550s	1275.414us	100	100	100.00
V2S	sec_cm_addr_scramble	sram_ctrl_smoke	105.550s	1275.414us	100	100	100.00
V2S	sec_cm_instr_bus_lc_gated	sram_ctrl_executable	1482.790s	22688.190us	100	100	100.00
V2S	sec_cm_ram_tl_lc_gate_fsm_sparse	sram_ctrl_sec_cm	1.050s	14.516us	0	10	0.00
V2S	sec_cm_key_global_esc	sram_ctrl_lc_escalation	132.750s	33718.839us	99	100	99.00
V2S	sec_cm_key_local_esc	sram_ctrl_sec_cm	1.050s	14.516us	0	10	0.00
V2S	sec_cm_init_ctr_redun	sram_ctrl_sec_cm	1.050s	14.516us	0	10	0.00
V2S	sec_cm_scramble_key_sideload	sram_ctrl_smoke	105.550s	1275.414us	100	100	100.00
V2S	sec_cm_tlul_fifo_ctr_redun	sram_ctrl_sec_cm	1.050s	14.516us	0	10	0.00
V2S		TOTAL			250	290	86.21
V3	stress_all_with_rand_reset	sram_ctrl_stress_all_with_rand_reset	422.910s	19412.714us	100	100	100.00
V3		TOTAL			100	100	100.00
		TOTAL			2335	2380	98.11

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
96.41	99.11	92.90	90.71	100.00	98.02	95.83	98.33

Failure Buckets

UVM_ERROR (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (*) != exp (*) has 22 failures:
- Test sram_ctrl_readback_err has 22 failures.
  - 0.sram_ctrl_readback_err.109646766832787554381606625650207569899820499893322007617589787736161194457160
    Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/0.sram_ctrl_readback_err/latest/run.log
```
  UVM_ERROR @ 2657913115 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x3a) != exp (0x6a)
  UVM_INFO @ 2657913115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 7.sram_ctrl_readback_err.21983999145421301915804041887730849818818712727898111231444067600568260084406
    Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/7.sram_ctrl_readback_err/latest/run.log
```
  UVM_ERROR @ 2890175271 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x5c) != exp (0x5e)
  UVM_INFO @ 2890175271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 20 more failures.
Offending 'reqfifo_rvalid' has 7 failures:
- Test sram_ctrl_mubi_enc_err has 7 failures.
  - 29.sram_ctrl_mubi_enc_err.115633672004961317873484655074820976799446730596087209383606054418138543604176
    Line 101, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/29.sram_ctrl_mubi_enc_err/latest/run.log
```
      Offending 'reqfifo_rvalid'
  UVM_ERROR @ 678383352 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty
  UVM_INFO @ 678383352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 8.sram_ctrl_mubi_enc_err.80333843045129701612116099682273996060601491617557687079117313649054059761562
    Line 101, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/8.sram_ctrl_mubi_enc_err/latest/run.log
```
      Offending 'reqfifo_rvalid'
  UVM_ERROR @  44637526 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty
  UVM_INFO @  44637526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 5 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: * has 4 failures:
- Test sram_ctrl_sec_cm has 4 failures.
  - 0.sram_ctrl_sec_cm.52361147589380227961554820746047787717973665994316217062795046527985673228830
    Line 96, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/0.sram_ctrl_sec_cm/latest/run.log
```
  UVM_ERROR @   1915125 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0
  UVM_INFO @   1915125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 1.sram_ctrl_sec_cm.52842594683548050480485870256233897019959575323936391249680793558819647756945
    Line 99, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/1.sram_ctrl_sec_cm/latest/run.log
```
  UVM_ERROR @  14516042 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0
  UVM_INFO @  14516042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 2 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.scr_key_rotated reset value: * has 3 failures:
- Test sram_ctrl_csr_mem_rw_with_rand_reset has 3 failures.
  - 12.sram_ctrl_csr_mem_rw_with_rand_reset.84880633338259155123813003250202672050320706503015042200890872288472159992392
    Line 101, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/12.sram_ctrl_csr_mem_rw_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 128774930 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (14 [0xe] vs 9 [0x9]) Regname: sram_ctrl_regs_reg_block.scr_key_rotated reset value: 0x9
  UVM_INFO @ 128774930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 15.sram_ctrl_csr_mem_rw_with_rand_reset.75025873314140438184938463723507772185818216977368481442751174938504466762091
    Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/15.sram_ctrl_csr_mem_rw_with_rand_reset/latest/run.log
```
  UVM_ERROR @  48944533 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (2 [0x2] vs 9 [0x9]) Regname: sram_ctrl_regs_reg_block.scr_key_rotated reset value: 0x9
  UVM_INFO @  48944533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 1 more failures.
Offending '(!$isunknown(rdata_o))' has 3 failures:
- Test sram_ctrl_sec_cm has 3 failures.
  - 4.sram_ctrl_sec_cm.6989058406792113159074837609165864576477801380700637611893208160521707675404
    Line 96, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/4.sram_ctrl_sec_cm/latest/run.log
```
      Offending '(!$isunknown(rdata_o))'
  UVM_ERROR @   4270435 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A
  UVM_INFO @   4270435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.sram_ctrl_sec_cm.99046052599843307436803903149714964036705777395056644363692717018861280314280
    Line 96, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/2.sram_ctrl_sec_cm/latest/run.log
```
      Offending '(!$isunknown(rdata_o))'
  UVM_ERROR @   1005292 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A
  UVM_INFO @   1005292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 1 more failures.

Offending '(curr_fwd | pend_req[d2h.d_source].pend)' has 2 failures:

Test sram_ctrl_sec_cm has 2 failures.

0.sram_ctrl_sec_cm.108278049343485594062086075837263973154113737417865553569492555506768295676995
Line 98, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/0.sram_ctrl_sec_cm/latest/run.log

      Offending '(curr_fwd | pend_req[d2h.d_source].pend)'
  UVM_ERROR @   7909516 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0
  UVM_INFO @   7909516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.sram_ctrl_sec_cm.50198372278355105972750828354126224287842317002567610786808252389085575290784
Line 100, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/1.sram_ctrl_sec_cm/latest/run.log

      Offending '(curr_fwd | pend_req[d2h.d_source].pend)'
  UVM_ERROR @   4279475 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0
  UVM_INFO @   4279475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.scr_key_rotated.success reset value: * has 1 failures:
- Test sram_ctrl_csr_mem_rw_with_rand_reset has 1 failures.
  - 0.sram_ctrl_csr_mem_rw_with_rand_reset.25859142913879244166148850396799653006884891459927539851493523826644908358967
    Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/0.sram_ctrl_csr_mem_rw_with_rand_reset/latest/run.log
```
  UVM_ERROR @  90647951 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (7 [0x7] vs 9 [0x9]) Regname: sram_ctrl_regs_reg_block.scr_key_rotated.success reset value: 0x9
  UVM_INFO @  90647951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Offending '(depth_o <= *'(Depth))' has 1 failures:
- Test sram_ctrl_sec_cm has 1 failures.
  - 3.sram_ctrl_sec_cm.50739400547743323805791404629189298126793137202714760466922828205156153882182
    Line 96, in log /nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/3.sram_ctrl_sec_cm/latest/run.log
```
      Offending '(depth_o <= 2'(Depth))'
  UVM_ERROR @   5268147 ps: (prim_fifo_sync.sv:211) [ASSERT FAILED] depthShallNotExceedParamDepth
  UVM_INFO @   5268147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```

UVM_ERROR (cip_base_scoreboard.sv:549) [scoreboard] Check failed item.d_error == exp_d_error (* [*] vs * [*]) On interface sram_ctrl_prim_reg_block, TL item: req: (cip_tl_seq_item@4618) { a_addr: * a_data: * a_mask: * a_size: * a_param: * a_source: * a_opcode: * a_user: * d_param: * d_source: * d_data: * d_size: * d_opcode: * d_error: * d_sink: * d_user: * a_valid_delay: * d_valid_delay: * a_valid_len: * d_valid_len: * req_abort_after_a_valid_len: * rsp_abort_after_d_valid_len: * req_completed: * rsp_completed: * tl_intg_err_type: TlIntgErrNone max_ecc_errors: * } has 1 failures:

Test sram_ctrl_readback_err has 1 failures.

18.sram_ctrl_readback_err.110610130980529425853601118898791188983096090712006321699487940627573852504227
Line 95, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/18.sram_ctrl_readback_err/latest/run.log

  UVM_ERROR @ 615217962 ps: (cip_base_scoreboard.sv:549) [uvm_test_top.env.scoreboard] Check failed item.d_error == exp_d_error (1 [0x1] vs 0 [0x0]) On interface sram_ctrl_prim_reg_block, TL item: req: (cip_tl_seq_item@4618) { a_addr: 'h8ea4811c  a_data: 'h5f  a_mask: 'hf  a_size: 'h2  a_param: 'h0  a_source: 'h13  a_opcode: 'h0  a_user: 'h27202  d_param: 'h0  d_source: 'h13  d_data: 'hffffffff  d_size: 'h2  d_opcode: 'h0  d_error: 'h1  d_sink: 'h0  d_user: 'h1f2a  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  }
  , unmapped_err: 0, mem_access_err: 0, bus_intg_err: 0, byte_wr_err: 0, csr_size_err: 0, tl_item_err: 0, write_w_instr_type_err: 0, cfg.tl_mem_access_gated: 0 ecc_err: 0
  UVM_INFO @ 615217962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (mem_model.sv:48) [exp_mem_sram_ctrl_prim_reg_block] Check failed act_data === system_memory[addr] (* [*] vs * [*]) addr * read out mismatch has 1 failures:
- Test sram_ctrl_lc_escalation has 1 failures.
  - 34.sram_ctrl_lc_escalation.59227098738342145448888454608946318459491910974849524468946640810342918296005
    Line 93, in log /nightly/current_run/scratch/master/sram_ctrl_ret-sim-vcs/34.sram_ctrl_lc_escalation/latest/run.log
```
  UVM_ERROR @ 474000232 ps: (mem_model.sv:48) [exp_mem_sram_ctrl_prim_reg_block] Check failed act_data === system_memory[addr] (0x6c [1101100] vs 0xd9 [11011001]) addr 0x22a2afc8 read out mismatch
  UVM_INFO @ 474000232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```