KMAC/UNMASKED Simulation Results

Friday November 28 2025 17:08:43 UTC

GitHub Revision: 1ac1583

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke kmac_smoke 86.770s 16767.009us 100 100 100.00
V1 csr_hw_reset kmac_csr_hw_reset 1.540s 32.998us 10 10 100.00
V1 csr_rw kmac_csr_rw 1.570s 40.783us 40 40 100.00
V1 csr_bit_bash kmac_csr_bit_bash 18.200s 2892.148us 10 10 100.00
V1 csr_aliasing kmac_csr_aliasing 8.290s 1206.256us 10 10 100.00
V1 csr_mem_rw_with_rand_reset kmac_csr_mem_rw_with_rand_reset 3.180s 89.986us 40 40 100.00
V1 regwen_csr_and_corresponding_lockable_csr kmac_csr_rw 1.570s 40.783us 40 40 100.00
kmac_csr_aliasing 8.290s 1206.256us 10 10 100.00
V1 mem_walk kmac_mem_walk 1.090s 13.368us 10 10 100.00
V1 mem_partial_access kmac_mem_partial_access 1.870s 200.785us 10 10 100.00
V1 TOTAL 230 230 100.00
V2 long_msg_and_output kmac_long_msg_and_output 3644.660s 141391.264us 100 100 100.00
V2 burst_write kmac_burst_write 1236.900s 31414.325us 99 100 99.00
V2 test_vectors kmac_test_vectors_sha3_224 1739.020s 62031.589us 10 10 100.00
kmac_test_vectors_sha3_256 1652.490s 122083.376us 10 10 100.00
kmac_test_vectors_sha3_384 1722.350s 187090.183us 10 10 100.00
kmac_test_vectors_sha3_512 1222.890s 182828.398us 10 10 100.00
kmac_test_vectors_shake_128 1864.620s 137564.880us 10 10 100.00
kmac_test_vectors_shake_256 2024.600s 91665.884us 10 10 100.00
kmac_test_vectors_kmac 3.550s 313.475us 10 10 100.00
kmac_test_vectors_kmac_xof 3.630s 355.231us 10 10 100.00
V2 sideload kmac_sideload 500.890s 22764.707us 100 100 100.00
V2 app kmac_app 376.160s 347202.350us 100 100 100.00
V2 app_with_partial_data kmac_app_with_partial_data 326.780s 15729.430us 20 20 100.00
V2 entropy_refresh kmac_entropy_refresh 391.670s 27909.425us 100 100 100.00
V2 error kmac_error 458.170s 82714.642us 99 100 99.00
V2 key_error kmac_key_error 21.590s 30463.880us 99 100 99.00
V2 sideload_invalid kmac_sideload_invalid 103.030s 10048.829us 88 100 88.00
V2 edn_timeout_error kmac_edn_timeout_error 49.700s 25704.567us 40 40 100.00
V2 entropy_mode_error kmac_entropy_mode_error 50.870s 2259.428us 40 40 100.00
V2 entropy_ready_error kmac_entropy_ready_error 94.660s 16975.027us 20 20 100.00
V2 lc_escalation kmac_lc_escalation 52.410s 3552.856us 100 100 100.00
V2 stress_all kmac_stress_all 3622.230s 197527.934us 98 100 98.00
V2 intr_test kmac_intr_test 1.200s 203.975us 100 100 100.00
V2 alert_test kmac_alert_test 1.440s 419.614us 100 100 100.00
V2 tl_d_oob_addr_access kmac_tl_errors 4.780s 197.569us 40 40 100.00
V2 tl_d_illegal_access kmac_tl_errors 4.780s 197.569us 40 40 100.00
V2 tl_d_outstanding_access kmac_csr_hw_reset 1.540s 32.998us 10 10 100.00
kmac_csr_rw 1.570s 40.783us 40 40 100.00
kmac_csr_aliasing 8.290s 1206.256us 10 10 100.00
kmac_same_csr_outstanding 3.370s 423.671us 40 40 100.00
V2 tl_d_partial_access kmac_csr_hw_reset 1.540s 32.998us 10 10 100.00
kmac_csr_rw 1.570s 40.783us 40 40 100.00
kmac_csr_aliasing 8.290s 1206.256us 10 10 100.00
kmac_same_csr_outstanding 3.370s 423.671us 40 40 100.00
V2 TOTAL 1463 1480 98.85
V2S shadow_reg_update_error kmac_shadow_reg_errors 2.860s 355.062us 40 40 100.00
V2S shadow_reg_read_clear_staged_value kmac_shadow_reg_errors 2.860s 355.062us 40 40 100.00
V2S shadow_reg_storage_error kmac_shadow_reg_errors 2.860s 355.062us 40 40 100.00
V2S shadowed_reset_glitch kmac_shadow_reg_errors 2.860s 355.062us 40 40 100.00
V2S shadow_reg_update_error_with_csr_rw kmac_shadow_reg_errors_with_csr_rw 7.140s 449.338us 38 40 95.00
V2S tl_intg_err kmac_sec_cm 62.440s 3402.515us 10 10 100.00
kmac_tl_intg_err 5.460s 1318.228us 40 40 100.00
V2S sec_cm_bus_integrity kmac_tl_intg_err 5.460s 1318.228us 40 40 100.00
V2S sec_cm_lc_escalate_en_intersig_mubi kmac_lc_escalation 52.410s 3552.856us 100 100 100.00
V2S sec_cm_sw_key_key_masking kmac_smoke 86.770s 16767.009us 100 100 100.00
V2S sec_cm_key_sideload kmac_sideload 500.890s 22764.707us 100 100 100.00
V2S sec_cm_cfg_shadowed_config_shadow kmac_shadow_reg_errors 2.860s 355.062us 40 40 100.00
V2S sec_cm_fsm_sparse kmac_sec_cm 62.440s 3402.515us 10 10 100.00
V2S sec_cm_ctr_redun kmac_sec_cm 62.440s 3402.515us 10 10 100.00
V2S sec_cm_packer_ctr_redun kmac_sec_cm 62.440s 3402.515us 10 10 100.00
V2S sec_cm_cfg_shadowed_config_regwen kmac_smoke 86.770s 16767.009us 100 100 100.00
V2S sec_cm_fsm_global_esc kmac_lc_escalation 52.410s 3552.856us 100 100 100.00
V2S sec_cm_fsm_local_esc kmac_sec_cm 62.440s 3402.515us 10 10 100.00
V2S sec_cm_absorbed_ctrl_mubi kmac_mubi 424.850s 13686.889us 20 20 100.00
V2S sec_cm_sw_cmd_ctrl_sparse kmac_smoke 86.770s 16767.009us 100 100 100.00
V2S TOTAL 148 150 98.67
V3 stress_all_with_rand_reset kmac_stress_all_with_rand_reset 260.050s 14773.173us 16 20 80.00
V3 TOTAL 16 20 80.00
TOTAL 1857 1880 98.78

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
93.89 97.69 94.41 100.00 74.38 96.04 97.74 96.98

Failure Buckets