AON_TIMER Simulation Results

Friday December 05 2025 17:02:05 UTC

GitHub Revision: da96c41

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke aon_timer_smoke 2.650s 659.605us 5 5 100.00
V1 csr_hw_reset aon_timer_csr_hw_reset 2.560s 1132.376us 5 5 100.00
V1 csr_rw aon_timer_csr_rw 2.090s 488.686us 20 20 100.00
V1 csr_bit_bash aon_timer_csr_bit_bash 23.470s 7284.140us 5 5 100.00
V1 csr_aliasing aon_timer_csr_aliasing 2.680s 679.028us 5 5 100.00
V1 csr_mem_rw_with_rand_reset aon_timer_csr_mem_rw_with_rand_reset 2.020s 476.876us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr aon_timer_csr_rw 2.090s 488.686us 20 20 100.00
aon_timer_csr_aliasing 2.680s 679.028us 5 5 100.00
V1 mem_walk aon_timer_mem_walk 1.780s 437.205us 5 5 100.00
V1 mem_partial_access aon_timer_mem_partial_access 1.730s 411.448us 5 5 100.00
V1 TOTAL 70 70 100.00
V2 prescaler aon_timer_prescaler 75.190s 45389.083us 15 15 100.00
V2 jump aon_timer_jump 2.020s 604.055us 5 5 100.00
V2 stress_all aon_timer_stress_all 190.310s 133866.411us 15 15 100.00
V2 alert_test aon_timer_alert_test 2.120s 519.526us 50 50 100.00
V2 intr_test aon_timer_intr_test 1.900s 441.048us 50 50 100.00
V2 tl_d_oob_addr_access aon_timer_tl_errors 3.120s 331.405us 20 20 100.00
V2 tl_d_illegal_access aon_timer_tl_errors 3.120s 331.405us 20 20 100.00
V2 tl_d_outstanding_access aon_timer_csr_hw_reset 2.560s 1132.376us 5 5 100.00
aon_timer_csr_rw 2.090s 488.686us 20 20 100.00
aon_timer_csr_aliasing 2.680s 679.028us 5 5 100.00
aon_timer_same_csr_outstanding 6.670s 2366.151us 20 20 100.00
V2 tl_d_partial_access aon_timer_csr_hw_reset 2.560s 1132.376us 5 5 100.00
aon_timer_csr_rw 2.090s 488.686us 20 20 100.00
aon_timer_csr_aliasing 2.680s 679.028us 5 5 100.00
aon_timer_same_csr_outstanding 6.670s 2366.151us 20 20 100.00
V2 TOTAL 175 175 100.00
V2S tl_intg_err aon_timer_sec_cm 16.310s 7550.301us 5 5 100.00
aon_timer_tl_intg_err 13.020s 8485.889us 20 20 100.00
V2S sec_cm_bus_integrity aon_timer_tl_intg_err 13.020s 8485.889us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 max_threshold aon_timer_smoke_max_thold 1.430s 510.032us 5 5 100.00
V3 min_threshold aon_timer_smoke_min_thold 1.900s 488.154us 5 5 100.00
V3 wkup_count_hi_cdc aon_timer_wkup_count_cdc_hi 14.100s 3697.479us 5 5 100.00
V3 custom_intr aon_timer_custom_intr 1.640s 532.849us 10 10 100.00
V3 alternating_on_off aon_timer_alternating_enable_on_off 20.500s 4208.878us 5 5 100.00
V3 stress_all_with_rand_reset aon_timer_stress_all_with_rand_reset 24.140s 10670.182us 15 15 100.00
V3 TOTAL 45 45 100.00
TOTAL 315 315 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
98.65 99.09 99.05 98.53 -- 98.56 96.67 100.00