I2C Simulation Results

Friday December 05 2025 17:02:05 UTC

GitHub Revision: `da96c41`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	90.410s	1926.040us	50	50	100.00
V1	target_smoke	i2c_target_smoke	36.290s	12630.082us	50	50	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	1.080s	25.142us	5	5	100.00
V1	csr_rw	i2c_csr_rw	1.070s	34.055us	20	20	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	3.690s	5831.036us	5	5	100.00
V1	csr_aliasing	i2c_csr_aliasing	2.010s	221.040us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.900s	32.599us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	1.070s	34.055us	20	20	100.00
		i2c_csr_aliasing	2.010s	221.040us	5	5	100.00
V1		TOTAL			155	155	100.00
V2	host_error_intr	i2c_host_error_intr	6.480s	160.153us	2	50	4.00
V2	host_stress_all	i2c_host_stress_all	2646.880s	47461.167us	12	50	24.00
V2	host_maxperf	i2c_host_perf	2622.310s	74099.290us	50	50	100.00
V2	host_override	i2c_host_override	1.070s	26.641us	50	50	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	307.940s	21204.837us	50	50	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	140.930s	5558.797us	50	50	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.690s	585.047us	50	50	100.00
		i2c_host_fifo_fmt_empty	24.040s	1635.697us	50	50	100.00
		i2c_host_fifo_reset_rx	10.630s	2190.819us	50	50	100.00
V2	host_fifo_full	i2c_host_fifo_full	155.600s	4685.765us	50	50	100.00
V2	host_timeout	i2c_host_stretch_timeout	48.490s	7228.000us	50	50	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	6.140s	175.223us	17	50	34.00
V2	target_glitch	i2c_target_glitch	3.660s	470.892us	0	2	0.00
V2	target_stress_all	i2c_target_stress_all	2487.670s	94932.389us	46	50	92.00
V2	target_maxperf	i2c_target_perf	9.580s	4356.980us	50	50	100.00
V2	target_fifo_empty	i2c_target_stress_rd	66.270s	3592.596us	50	50	100.00
		i2c_target_intr_smoke	8.800s	1474.379us	50	50	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	2.130s	658.580us	50	50	100.00
		i2c_target_fifo_reset_tx	2.790s	577.490us	50	50	100.00
V2	target_fifo_full	i2c_target_stress_wr	1392.650s	68804.182us	50	50	100.00
		i2c_target_stress_rd	66.270s	3592.596us	50	50	100.00
		i2c_target_intr_stress_wr	611.330s	30895.487us	50	50	100.00
V2	target_timeout	i2c_target_timeout	9.140s	5315.785us	50	50	100.00
V2	target_clock_stretch	i2c_target_stretch	65.850s	4363.153us	41	50	82.00
V2	bad_address	i2c_target_bad_addr	7.670s	20000.000us	49	50	98.00
V2	target_mode_glitch	i2c_target_hrst	38.970s	10218.005us	25	50	50.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	3.920s	469.648us	50	50	100.00
		i2c_target_fifo_watermarks_tx	2.020s	700.996us	50	50	100.00
V2	host_mode_config_perf	i2c_host_perf	2622.310s	74099.290us	50	50	100.00
		i2c_host_perf_precise	1536.820s	24262.411us	50	50	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	48.490s	7228.000us	50	50	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	33.010s	2509.611us	44	50	88.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	3.870s	519.210us	50	50	100.00
		i2c_target_nack_acqfull_addr	3.790s	1114.654us	50	50	100.00
		i2c_target_nack_txstretch	2.290s	210.980us	32	50	64.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	25.620s	745.136us	50	50	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	3.380s	7140.072us	50	50	100.00
V2	alert_test	i2c_alert_test	0.980s	56.161us	50	50	100.00
V2	intr_test	i2c_intr_test	1.010s	25.997us	50	50	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	2.750s	450.981us	20	20	100.00
V2	tl_d_illegal_access	i2c_tl_errors	2.750s	450.981us	20	20	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	1.080s	25.142us	5	5	100.00
		i2c_csr_rw	1.070s	34.055us	20	20	100.00
		i2c_csr_aliasing	2.010s	221.040us	5	5	100.00
		i2c_same_csr_outstanding	1.460s	27.031us	19	20	95.00
V2	tl_d_partial_access	i2c_csr_hw_reset	1.080s	25.142us	5	5	100.00
		i2c_csr_rw	1.070s	34.055us	20	20	100.00
		i2c_csr_aliasing	2.010s	221.040us	5	5	100.00
		i2c_same_csr_outstanding	1.460s	27.031us	19	20	95.00
V2		TOTAL			1607	1792	89.68
V2S	tl_intg_err	i2c_sec_cm	1.450s	273.650us	5	5	100.00
		i2c_tl_intg_err	2.600s	396.288us	20	20	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	2.600s	396.288us	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	32.310s	1100.027us	0	10	0.00
V3	target_error_intr	i2c_target_unexp_stop	3.510s	419.282us	0	50	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	25.640s	1525.382us	0	10	0.00
V3		TOTAL			0	70	0.00
		TOTAL			1787	2042	87.51

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
86.35	97.31	89.21	89.66	48.21	93.97	96.41	89.64

Failure Buckets

UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 95 failures:

Test i2c_host_error_intr has 48 failures.

0.i2c_host_error_intr.115176240048167641507612078504125838999173117811597471647193926500379440882801
Line 104, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log

  UVM_ERROR @  89256869 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  89256869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_error_intr.57177032730929623950576866198209665173351387489985950748044664059985084710585
Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log

  UVM_ERROR @  16577016 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  16577016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 46 more failures.

Test i2c_host_stress_all has 32 failures.

0.i2c_host_stress_all.81246483402785974806274186837866289244527865805454495261780263309837742671829
Line 92, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log

  UVM_ERROR @  24442584 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  24442584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

5.i2c_host_stress_all.15048540930238052368586280582621787999369862178790119132491033713701756200137
Line 104, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 14174038754 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 14174038754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 30 more failures.

Test i2c_target_stress_all_with_rand_reset has 4 failures.

0.i2c_target_stress_all_with_rand_reset.87067721750256750611528073350402546395226848833155799973570893467287350361956
Line 87, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @  11415955 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  11415955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

4.i2c_target_stress_all_with_rand_reset.112085974511805373725361666617098336310116916742257476228373069053325463297713
Line 98, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 849566296 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 849566296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

Test i2c_host_mode_toggle has 11 failures.

1.i2c_host_mode_toggle.74666507616445453429464740297011882143161168513791148788121536795126636534314
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  60511466 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  60511466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

6.i2c_host_mode_toggle.99654319842713508926451416696367274657326799111608094685303235157313575563281
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @   5297345 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @   5297345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 9 more failures.

UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 33 failures:
- Test i2c_target_unexp_stop has 33 failures.
  - 0.i2c_target_unexp_stop.64426140701008057298962401759639284997962035577997885473517072226361399755421
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 175747332 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 232 [0xe8])
  UVM_INFO @ 175747332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 1.i2c_target_unexp_stop.18638065734952944584544849672951098973041839691489598110613793527097468875252
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 221120351 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 144 [0x90])
  UVM_INFO @ 221120351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 31 more failures.
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 25 failures:
- Test i2c_target_hrst has 25 failures.
  - 0.i2c_target_hrst.59350097981359450232548434774190506142629330998508881285872660225746024183300
    Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10043868653 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10043868653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 1.i2c_target_hrst.37435976193270635709993910525742882017255946450578866792461718872957828416297
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10206060884 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10206060884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 23 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 18 failures:
- Test i2c_target_nack_txstretch has 18 failures.
  - 1.i2c_target_nack_txstretch.82751055798946301947921521855433522429020627546483483334668779046827400725642
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 384571127 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 384571127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.i2c_target_nack_txstretch.63906272455153052930610091027553470306712289885143967585963779165889161519096
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 381390118 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 381390118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 16 more failures.

UVM_ERROR (cip_base_vseq.sv:1229) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 16 failures:

Test i2c_host_stress_all_with_rand_reset has 10 failures.

0.i2c_host_stress_all_with_rand_reset.32022472512908289344357626138026720076260398502593485114533597122134538833259
Line 89, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 143192735 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 143192735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all_with_rand_reset.61548242956114792208755579332192114043262419908300664794610743192994137899160
Line 98, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1033703866 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 1033703866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

Test i2c_target_stress_all_with_rand_reset has 6 failures.

1.i2c_target_stress_all_with_rand_reset.29742328239758289619507632390141645660013763968735417929738405775666864130589
Line 100, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1310022830 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 1310022830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

2.i2c_target_stress_all_with_rand_reset.58780819251576085919543267679180135022577869994551831817902443443841277367285
Line 88, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 680078039 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 680078039 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 4 more failures.

UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 15 failures:
- Test i2c_target_unexp_stop has 15 failures.
  - 7.i2c_target_unexp_stop.74514982652856473512906001739358886195571847598840238801843062780124495671388
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 206240681 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 206240681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 8.i2c_target_unexp_stop.54728676193294106790016898823500675807379225970851382559357012732670668474842
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 434695296 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 434695296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 13 more failures.

UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 11 failures:

Test i2c_host_mode_toggle has 11 failures.

0.i2c_host_mode_toggle.23778472262173934420500112268881998622708266678874904022463358359323029000591
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  71030146 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

5.i2c_host_mode_toggle.62383700613286426650381783898195059860669813162562471232229935377708678524081
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  68394597 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

... and 9 more failures.

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 10 failures:

Test i2c_host_mode_toggle has 8 failures.

2.i2c_host_mode_toggle.21796117138881075435904451525252462674245863549299453155019455116715114648763
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 206062998 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @38250

9.i2c_host_mode_toggle.28320802839434082691872135453059114707724792232466834441057226180429057338216
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/9.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 187413518 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @26940

... and 6 more failures.

Test i2c_host_stress_all has 2 failures.

27.i2c_host_stress_all.32215526928155885401922611708828432463707436308686082695873649382312904559839
Line 114, in log /nightly/current_run/scratch/master/i2c-sim-vcs/27.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 31738638818 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @146364

39.i2c_host_stress_all.31538460432546359244431248453483154412488141531638459029269352258260687265287
Line 133, in log /nightly/current_run/scratch/master/i2c-sim-vcs/39.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 206665946572 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @3960707

UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 9 failures:
- Test i2c_target_stretch has 9 failures.
  - 0.i2c_target_stretch.16226735924405147831452722893921613380977549026402023078939381326079158333741
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10025407619 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10025407619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 11.i2c_target_stretch.10012310949909244884711668197883917736295496031567392349927466939077156854215
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/11.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10002425476 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10002425476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 7 more failures.
Error-[CNST-CIF] Constraints inconsistency failure has 6 failures:
- Test i2c_target_tx_stretch_ctrl has 6 failures.
  - 1.i2c_target_tx_stretch_ctrl.70709807425941337721766513051587703307215581254884743626585395982031598322966
    Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
  - 2.i2c_target_tx_stretch_ctrl.41835321416563836583193962746195854624297822037161281279353528701161730995524
    Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
  - ... and 4 more failures.
UVM_FATAL (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred! has 4 failures:
- Test i2c_target_stress_all has 4 failures.
  - 2.i2c_target_stress_all.50223780603750393433612637951738017015366528461264170757768252615451920798886
    Line 90, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 53001076496 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 53001076496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 17.i2c_target_stress_all.44128055928332474197596454322709068267622075311572911472041497385729062268140
    Line 86, in log /nightly/current_run/scratch/master/i2c-sim-vcs/17.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 33714507331 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 33714507331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 2 more failures.

UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:

Test i2c_target_glitch has 2 failures.

0.i2c_target_glitch.106653102172799259287157883538027750161390812516557994429205556152899029664288
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 470891809 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 470891809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_glitch.41023554884248585623495582871037999817160141804923218696412258091707963060733
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 528300530 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 528300530 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (i2c_scoreboard.sv:717) [scoreboard] controller_mode_wr_obs_fifo item uncompared: has 2 failures:

Test i2c_host_stress_all has 2 failures.

1.i2c_host_stress_all.24198238400559389778283090497623550159704770051302729250510111479200527516307
Line 151, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 37527803501 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @2716907

35.i2c_host_stress_all.74981901370181874087556600949324019199889087581735958409400216481018729028688
Line 138, in log /nightly/current_run/scratch/master/i2c-sim-vcs/35.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 112461590123 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @31106445

UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 2 failures:
- Test i2c_target_bad_addr has 1 failures.
  - 5.i2c_target_bad_addr.11320666059120172866677430875775392506927407819550826535222134640832046280540
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_bad_addr/latest/run.log
```
  UVM_FATAL @ 20000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 20000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 20000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
- Test i2c_host_stress_all has 1 failures.
  - 40.i2c_host_stress_all.3170906984152682759807186336272476368463504591216190618502642151247676790842
    Line 92, in log /nightly/current_run/scratch/master/i2c-sim-vcs/40.i2c_host_stress_all/latest/run.log
```
  UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```

UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 2 failures:

Test i2c_host_mode_toggle has 2 failures.

16.i2c_host_mode_toggle.30887074348144028417244297504787731542033101574284514021213486718494551519022
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/16.i2c_host_mode_toggle/latest/run.log

  UVM_FATAL @  21238500 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0xf4192194, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  21238500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

44.i2c_host_mode_toggle.109987599217560646114727347422740537375400141790984382867305441144089171296850
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/44.i2c_host_mode_toggle/latest/run.log

  UVM_FATAL @  54049228 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x7b6d8a94, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  54049228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 2 failures:

Test i2c_target_unexp_stop has 2 failures.

17.i2c_target_unexp_stop.55583435888156214057865051417284604953102676629858057484817629010451652889756
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/17.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 1838242410 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 1838242410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

35.i2c_target_unexp_stop.4451426386106293232492111393477064949816579817888174600077194955776845114529
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/35.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 522953218 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 522953218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Job timed out after * minutes has 1 failures:
- Test i2c_host_stress_all has 1 failures.
  - 31.i2c_host_stress_all.101886986627478522738801431432197533486943433188240374460084974739496877448360
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/31.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
Error-[NOA] Null object access has 1 failures:
- Test i2c_host_mode_toggle has 1 failures.
  - 49.i2c_host_mode_toggle.15216301475592564272909458878983432643991328399065051933556507829212244953692
    Line 88, in log /nightly/current_run/scratch/master/i2c-sim-vcs/49.i2c_host_mode_toggle/latest/run.log
```
  Error-[NOA] Null object access
  src/lowrisc_dv_i2c_env_0.1/i2c_reference_model.sv, 584
    The object at dereference depth 0 is being used before it was
    constructed/allocated.
    Please make sure that the object is allocated before using it.
```
UVM_ERROR (cip_base_vseq.sv:840) [i2c_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 1 failures:
- Test i2c_same_csr_outstanding has 1 failures.
  - 12.i2c_same_csr_outstanding.96144435344725507133966006073926250347157486496578899054199005118441751617594
    Line 74, in log /nightly/current_run/scratch/master/i2c-sim-vcs/12.i2c_same_csr_outstanding/latest/run.log
```
  UVM_ERROR @  25545840 ps: (cip_base_vseq.sv:840) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed data & ~ro_mask == 0 (64 [0x40] vs 0 [0x0])
  UVM_INFO @  25545840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```