| V1 |
|
90.78% |
| V2 |
|
66.03% |
| V2S |
|
78.65% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| otp_ctrl_wake_up | 1.970s | 73.959us | 1 | 1 | 100.00 | |
| smoke | 40 | 50 | 80.00 | |||
| otp_ctrl_smoke | 23.530s | 3184.851us | 40 | 50 | 80.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 6.290s | 1658.204us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| otp_ctrl_csr_rw | 3.210s | 684.836us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_bit_bash | 6.990s | 847.354us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_aliasing | 14.680s | 1324.567us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 17 | 20 | 85.00 | |||
| otp_ctrl_csr_mem_rw_with_rand_reset | 6.320s | 1238.374us | 17 | 20 | 85.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| otp_ctrl_csr_rw | 3.210s | 684.836us | 20 | 20 | 100.00 | |
| otp_ctrl_csr_aliasing | 14.680s | 1324.567us | 5 | 5 | 100.00 | |
| mem_walk | 5 | 5 | 100.00 | |||
| otp_ctrl_mem_walk | 2.810s | 540.953us | 5 | 5 | 100.00 | |
| mem_partial_access | 5 | 5 | 100.00 | |||
| otp_ctrl_mem_partial_access | 2.740s | 635.829us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| dai_access_partition_walk | 0 | 1 | 0.00 | |||
| otp_ctrl_partition_walk | 144.170s | 5242.274us | 0 | 1 | 0.00 | |
| init_fail | 199 | 300 | 66.33 | |||
| otp_ctrl_init_fail | 11.510s | 2327.027us | 199 | 300 | 66.33 | |
| partition_check | 17 | 60 | 28.33 | |||
| otp_ctrl_background_chks | 51.320s | 3356.952us | 3 | 10 | 30.00 | |
| otp_ctrl_check_fail | 34.830s | 5675.585us | 14 | 50 | 28.00 | |
| regwen_during_otp_init | 24 | 50 | 48.00 | |||
| otp_ctrl_regwen | 16.060s | 4438.692us | 24 | 50 | 48.00 | |
| partition_lock | 20 | 50 | 40.00 | |||
| otp_ctrl_dai_lock | 42.130s | 12561.635us | 20 | 50 | 40.00 | |
| interface_key_check | 16 | 50 | 32.00 | |||
| otp_ctrl_parallel_key_req | 46.360s | 12070.084us | 16 | 50 | 32.00 | |
| lc_interactions | 211 | 250 | 84.40 | |||
| otp_ctrl_parallel_lc_req | 34.110s | 10734.585us | 32 | 50 | 64.00 | |
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| otp_dai_errors | 39 | 50 | 78.00 | |||
| otp_ctrl_dai_errs | 116.260s | 35117.931us | 39 | 50 | 78.00 | |
| otp_macro_errors | 13 | 50 | 26.00 | |||
| otp_ctrl_macro_errs | 36.030s | 2146.537us | 13 | 50 | 26.00 | |
| test_access | 12 | 50 | 24.00 | |||
| otp_ctrl_test_access | 33.980s | 11389.149us | 12 | 50 | 24.00 | |
| stress_all | 2 | 50 | 4.00 | |||
| otp_ctrl_stress_all | 168.170s | 58693.420us | 2 | 50 | 4.00 | |
| intr_test | 50 | 50 | 100.00 | |||
| otp_ctrl_intr_test | 3.140s | 705.108us | 50 | 50 | 100.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| otp_ctrl_alert_test | 4.430s | 221.430us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| otp_ctrl_tl_errors | 12.940s | 2588.963us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| otp_ctrl_tl_errors | 12.940s | 2588.963us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 6.290s | 1658.204us | 5 | 5 | 100.00 | |
| otp_ctrl_csr_rw | 3.210s | 684.836us | 20 | 20 | 100.00 | |
| otp_ctrl_csr_aliasing | 14.680s | 1324.567us | 5 | 5 | 100.00 | |
| otp_ctrl_same_csr_outstanding | 7.040s | 1488.470us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 6.290s | 1658.204us | 5 | 5 | 100.00 | |
| otp_ctrl_csr_rw | 3.210s | 684.836us | 20 | 20 | 100.00 | |
| otp_ctrl_csr_aliasing | 14.680s | 1324.567us | 5 | 5 | 100.00 | |
| otp_ctrl_same_csr_outstanding | 7.040s | 1488.470us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| sec_cm_additional_check | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| tl_intg_err | 23 | 25 | 92.00 | |||
| otp_ctrl_tl_intg_err | 63.820s | 23544.441us | 19 | 20 | 95.00 | |
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| prim_count_check | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| prim_fsm_check | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_bus_integrity | 19 | 20 | 95.00 | |||
| otp_ctrl_tl_intg_err | 63.820s | 23544.441us | 19 | 20 | 95.00 | |
| sec_cm_secret_mem_scramble | 40 | 50 | 80.00 | |||
| otp_ctrl_smoke | 23.530s | 3184.851us | 40 | 50 | 80.00 | |
| sec_cm_part_mem_digest | 40 | 50 | 80.00 | |||
| otp_ctrl_smoke | 23.530s | 3184.851us | 40 | 50 | 80.00 | |
| sec_cm_dai_fsm_sparse | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_kdi_fsm_sparse | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_lci_fsm_sparse | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_part_fsm_sparse | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_scrmbl_fsm_sparse | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_timer_fsm_sparse | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_dai_ctr_redun | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_kdi_seed_ctr_redun | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_kdi_entropy_ctr_redun | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_lci_ctr_redun | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_part_ctr_redun | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_scrmbl_ctr_redun | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_timer_integ_ctr_redun | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_timer_cnsty_ctr_redun | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_timer_lfsr_redun | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_dai_fsm_local_esc | 183 | 205 | 89.27 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_lci_fsm_local_esc | 179 | 200 | 89.50 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| sec_cm_kdi_fsm_local_esc | 179 | 200 | 89.50 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| sec_cm_part_fsm_local_esc | 192 | 250 | 76.80 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| otp_ctrl_macro_errs | 36.030s | 2146.537us | 13 | 50 | 26.00 | |
| sec_cm_scrmbl_fsm_local_esc | 179 | 200 | 89.50 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| sec_cm_timer_fsm_local_esc | 183 | 205 | 89.27 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_dai_fsm_global_esc | 183 | 205 | 89.27 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_lci_fsm_global_esc | 179 | 200 | 89.50 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| sec_cm_kdi_fsm_global_esc | 179 | 200 | 89.50 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| sec_cm_part_fsm_global_esc | 192 | 250 | 76.80 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| otp_ctrl_macro_errs | 36.030s | 2146.537us | 13 | 50 | 26.00 | |
| sec_cm_scrmbl_fsm_global_esc | 179 | 200 | 89.50 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| sec_cm_timer_fsm_global_esc | 183 | 205 | 89.27 | |||
| otp_ctrl_parallel_lc_esc | 56.090s | 3797.011us | 179 | 200 | 89.50 | |
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_part_data_reg_integrity | 199 | 300 | 66.33 | |||
| otp_ctrl_init_fail | 11.510s | 2327.027us | 199 | 300 | 66.33 | |
| sec_cm_part_data_reg_bkgn_chk | 14 | 50 | 28.00 | |||
| otp_ctrl_check_fail | 34.830s | 5675.585us | 14 | 50 | 28.00 | |
| sec_cm_part_mem_regren | 20 | 50 | 40.00 | |||
| otp_ctrl_dai_lock | 42.130s | 12561.635us | 20 | 50 | 40.00 | |
| sec_cm_part_mem_sw_unreadable | 20 | 50 | 40.00 | |||
| otp_ctrl_dai_lock | 42.130s | 12561.635us | 20 | 50 | 40.00 | |
| sec_cm_part_mem_sw_unwritable | 20 | 50 | 40.00 | |||
| otp_ctrl_dai_lock | 42.130s | 12561.635us | 20 | 50 | 40.00 | |
| sec_cm_lc_part_mem_sw_noaccess | 20 | 50 | 40.00 | |||
| otp_ctrl_dai_lock | 42.130s | 12561.635us | 20 | 50 | 40.00 | |
| sec_cm_access_ctrl_mubi | 20 | 50 | 40.00 | |||
| otp_ctrl_dai_lock | 42.130s | 12561.635us | 20 | 50 | 40.00 | |
| sec_cm_token_valid_ctrl_mubi | 40 | 50 | 80.00 | |||
| otp_ctrl_smoke | 23.530s | 3184.851us | 40 | 50 | 80.00 | |
| sec_cm_lc_ctrl_intersig_mubi | 20 | 50 | 40.00 | |||
| otp_ctrl_dai_lock | 42.130s | 12561.635us | 20 | 50 | 40.00 | |
| sec_cm_test_bus_lc_gated | 40 | 50 | 80.00 | |||
| otp_ctrl_smoke | 23.530s | 3184.851us | 40 | 50 | 80.00 | |
| sec_cm_test_tl_lc_gate_fsm_sparse | 4 | 5 | 80.00 | |||
| otp_ctrl_sec_cm | 352.260s | 19165.515us | 4 | 5 | 80.00 | |
| sec_cm_direct_access_config_regwen | 24 | 50 | 48.00 | |||
| otp_ctrl_regwen | 16.060s | 4438.692us | 24 | 50 | 48.00 | |
| sec_cm_check_trigger_config_regwen | 40 | 50 | 80.00 | |||
| otp_ctrl_smoke | 23.530s | 3184.851us | 40 | 50 | 80.00 | |
| sec_cm_check_config_regwen | 40 | 50 | 80.00 | |||
| otp_ctrl_smoke | 23.530s | 3184.851us | 40 | 50 | 80.00 | |
| sec_cm_macro_mem_integrity | 13 | 50 | 26.00 | |||
| otp_ctrl_macro_errs | 36.030s | 2146.537us | 13 | 50 | 26.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| otp_ctrl_low_freq_read | 0 | 1 | 0.00 | |||
| otp_ctrl_low_freq_read | 72.460s | 54323.309us | 0 | 1 | 0.00 | |
| stress_all_with_rand_reset | 0 | 100 | 0.00 | |||
| otp_ctrl_stress_all_with_rand_reset | 40.010s | 4775.422us | 0 | 100 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (cip_base_scoreboard.sv:605) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * | ||||
| otp_ctrl_csr_mem_rw_with_rand_reset | 1913995588004841266267812478596509433095409121702069157018079100791766779498 | 88 |
UVM_ERROR @ 61946235 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 61946235 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_csr_mem_rw_with_rand_reset | 95495208385762534488639801156034789779863971826996817736147774519343557073399 | 88 |
UVM_ERROR @ 33409201 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33409201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_csr_mem_rw_with_rand_reset | 25336037357372077717227853073600324544134509776045631969229768082286629198588 | 88 |
UVM_ERROR @ 125727387 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125727387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 111890570277945792480032375074766957484049510671313193651656720742387108292696 | 89 |
UVM_ERROR @ 63208581 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63208581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 29801751386787271075832713591626050355757039232685574283106430614651847221289 | 95 |
UVM_ERROR @ 127792525 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 127792525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 19302782932671055235138617700597441104210833838317759229229515089692410189683 | 93 |
UVM_ERROR @ 41445076 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 41445076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 59487838324730988314063354233814051307517091091453283181178445315281154544722 | 88 |
UVM_ERROR @ 499362195 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 499362195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 66889351275652185092195626970693006852838164551357193542781232799190017743963 | 242 |
UVM_ERROR @ 1918262956 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1918262956 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 55797570969088506455713684761257552500192397517982495358736075921760064774269 | 88 |
UVM_ERROR @ 31710313 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31710313 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 108996352002461875036995694080148343785725880651174818889464660500697000159779 | 89 |
UVM_ERROR @ 121535758 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 121535758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 66049109299647737989554918834545254269043233224803066398750075757427989168382 | 89 |
UVM_ERROR @ 31348164 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31348164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 4985842257414872248108166839167587162365269240660827862225438060167063693178 | 93 |
UVM_ERROR @ 70583072 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 70583072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 85123262586443625289758428693887397352172674895452844675769715569838165830285 | 91 |
UVM_ERROR @ 31672468 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31672468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 72795882912555401925868847886131958174232429230508856414568437702339420385623 | 88 |
UVM_ERROR @ 501654216 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 501654216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 20836693505210996726886809390050967474425050723641270578341949055692326950187 | 97 |
UVM_ERROR @ 63578144 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63578144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 46556446060734475550363051691555212071162700764322682085194780843491854757652 | 99 |
UVM_ERROR @ 79026674 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 79026674 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 527165675665674493446677759908559630268325925396315827021514097774036660574 | 91 |
UVM_ERROR @ 115030984 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 115030984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 101555996373952845525518699684394659208268984862325060669281869116814335341612 | 107 |
UVM_ERROR @ 76626752 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 76626752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 29389171361265844815736433905801212593108138774074240538174503747000819402057 | 95 |
UVM_ERROR @ 70060438 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 70060438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 101842075719244884035756808887275768127657445483898334462814374439824701591850 | 22291 |
UVM_ERROR @ 1103508509 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1103508509 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 1438381767900127241491603523028560497397428298917772379451045690423640067832 | 88 |
UVM_ERROR @ 119688882 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 119688882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 13202206546520410586813509477526165077743537500511206443109247931079497213421 | 91 |
UVM_ERROR @ 49529153 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 49529153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 32035859512014097185438036039035178686259971560362607619518019083909172383525 | 89 |
UVM_ERROR @ 61722770 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 61722770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 23521199839929647282575484675828679041885208336927024787183391015244304713670 | 190 |
UVM_ERROR @ 71187491 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 71187491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 90564711490193620014027079311340767928088040449504877163673252458972347333281 | 89 |
UVM_ERROR @ 31216066 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31216066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 21130123545801896460827174837555692497544094107606002127470636495984505934909 | 100 |
UVM_ERROR @ 64595498 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 64595498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 103424525287188168234750009254624688075494006205175590479823944797641044074297 | 205 |
UVM_ERROR @ 607328543 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 607328543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 55187628115898318613018583098831136065612141101615736470799013314668835674595 | 88 |
UVM_ERROR @ 68855862 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 68855862 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 22416585944524724525043245713666384329366924037954650989692838802184737252680 | 97 |
UVM_ERROR @ 502698279 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 502698279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 9957754178019995241566532235910429922283262834828090581432133352827380726594 | 97 |
UVM_ERROR @ 66052351 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 66052351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 78831335716711248588425713196479221646547565768931302733955030035738161494509 | 203 |
UVM_ERROR @ 277947475 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 277947475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 68731348254352256383679338857624477368567054826607480689923897099083073086662 | 103 |
UVM_ERROR @ 569977707 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 569977707 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 60583561518048549362932225371910052503003376957030117375358459757482701603691 | 89 |
UVM_ERROR @ 501577548 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 501577548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 76931199357688660686163398564083573739184486312050716138768793899219882339590 | 99 |
UVM_ERROR @ 125635344 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125635344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 5575828113801759823872037035959456501213901370325201226652715128658534900780 | 93 |
UVM_ERROR @ 125322146 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125322146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 110704362873359345846088889623888986828955593959267400904550805810171212136225 | 93 |
UVM_ERROR @ 96242068 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 96242068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 85165325012673261641424429063740871830601314912019846557537564204898122393665 | 93 |
UVM_ERROR @ 124794600 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 124794600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 29797142082285812854477444603245540068577056330799767323812571947343443119560 | 88 |
UVM_ERROR @ 34289061 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34289061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 83240156625459180992588905941343835876367596413169972541250239667245587547707 | 88 |
UVM_ERROR @ 511508764 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 511508764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 49490219720225879168291403884390524477463051078726103091610533884537831958710 | 89 |
UVM_ERROR @ 31637784 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31637784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 114113478003680136107365794848682840808285917530947723783583083206562198873588 | 91 |
UVM_ERROR @ 497390244 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 497390244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 46007906259769699560312722976651804260388712650569103461052221728623139921388 | 95 |
UVM_ERROR @ 62721606 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62721606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 52357780636640436562784796025083105585560894897664460394893978524365176502764 | 93 |
UVM_ERROR @ 64422087 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 64422087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 99606558621997959084181736211793900952391213889631765163128611357471751959678 | 89 |
UVM_ERROR @ 61528946 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 61528946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 89124591199953672213320192611047536896186721372660369041982937829395025761330 | 88 |
UVM_ERROR @ 120664895 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120664895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 38061143764818569351510728351934569908413336998129397541055485412280194638318 | 93 |
UVM_ERROR @ 32477286 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32477286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 64830654263289279584562847604634053131240450726195704371988745706369251152809 | 89 |
UVM_ERROR @ 124936272 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 124936272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 59974550995277962373351915365977315454062631157687751141889095121368809311477 | 93 |
UVM_ERROR @ 34370779 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34370779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 28157071247820562460869964421864780055638176250723648127694750166284638669646 | 89 |
UVM_ERROR @ 501677010 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 501677010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 99607589802720237176852280680806773570339786985694277362727674552304384385751 | 88 |
UVM_ERROR @ 135834564 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 135834564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 48577074687057367691352182749763662877899643925925146629210939041421364587349 | 93 |
UVM_ERROR @ 120886590 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120886590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 24135753521234156341682822210800085748405828318205159456330142155622572994457 | 194 |
UVM_ERROR @ 225685187 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 225685187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 63561787945062899772112264848124041280451983446354150092254378094492559075076 | 95 |
UVM_ERROR @ 122462675 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 122462675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 28090686901699489599706022907904920622647644574129213400478214113572538326108 | 101 |
UVM_ERROR @ 65611306 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 65611306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 105467800256141461010106700936370637879231790685380383522861505405806665080965 | 89 |
UVM_ERROR @ 35703790 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 35703790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 94482223053988309951844626642451010482564714018242869239223111794118151965783 | 91 |
UVM_ERROR @ 31724219 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31724219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 51499008278240793975529233753034110725506180542292238564342485289618461606987 | 88 |
UVM_ERROR @ 136548732 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 136548732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 91396239142614091694893830936965036857711513507266180209472138512543377479118 | 95 |
UVM_ERROR @ 33408404 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33408404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 96096054785130454054093861323489096549797542153909696234449161621176957946611 | 103 |
UVM_ERROR @ 31515011 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31515011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 3215470163893206382916829099524196353431767965559523124755343667952661364239 | 7537 |
UVM_ERROR @ 4775421590 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 4775421590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 60037205168774037455557360477214966786717787162715800838852377351459064261043 | 243 |
UVM_ERROR @ 595474864 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 595474864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 93485439270908935443598243957383122435052584663101550729188501515765818309447 | 91 |
UVM_ERROR @ 94539491 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 94539491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 112123064654673642943421167352999327043054928101778101996630686684821949093099 | 88 |
UVM_ERROR @ 126107706 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 126107706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 49421856066659106763845249833989499447377728738947615886925098307930621867524 | 99 |
UVM_ERROR @ 30755732 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30755732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 40330967188454841942927454893111507577138548008425881014934120616999939164232 | 95 |
UVM_ERROR @ 32978851 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32978851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 25547113878387018914719025807485958853341080781134672561978986114138410666491 | 91 |
UVM_ERROR @ 88743754 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 88743754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 101171330789094763724312101793285907143289351758149543599177785008742787272904 | 97 |
UVM_ERROR @ 504393214 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 504393214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 106323309165934986553211390907700844091373016374217068656189219427917377495564 | 93 |
UVM_ERROR @ 35103592 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 35103592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 27897654190387439011663957349934197145362456612759103479203342374240506251364 | 89 |
UVM_ERROR @ 499917078 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 499917078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 63906803238255084571846033732866376609799986952558290415160367808228292261954 | 99 |
UVM_ERROR @ 33049747 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33049747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 7604734048628354070474944803790485635337032054319278732379977516198829257978 | 91 |
UVM_ERROR @ 118490091 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 118490091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 111704328062657555735935009914968417722631292013505430586309200460620089876119 | 105 |
UVM_ERROR @ 130669022 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 130669022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 113662965901661697644049326552731700501211526772138103972693179074235384228251 | 89 |
UVM_ERROR @ 120670493 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120670493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 113083742166974733312075224179157314507377618732780184464468722411556698289434 | 99 |
UVM_ERROR @ 120426801 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120426801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 20214594112929374672913160348012601472898765164887461288534978407275049040051 | 93 |
UVM_ERROR @ 121672484 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 121672484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 55410075943786798836936551975153512341859649121304842364709751698605007696218 | 236 |
UVM_ERROR @ 144000411 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 144000411 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 56859068327604856851595470803285827817924074604148934402907071759849216427147 | 89 |
UVM_ERROR @ 34797132 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34797132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 21446422169457585848260017280762793433327290687186687565570694947195359085592 | 88 |
UVM_ERROR @ 125495260 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125495260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 95006646284827214388905765038110448109003736441952322136540191699160445416514 | 101 |
UVM_ERROR @ 53895211 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 53895211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 63908027805095595762210830767618927648392621433702043548132395463184362502625 | 97 |
UVM_ERROR @ 66500492 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 66500492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 44757025052295513603729141209400195915983670927064926707938257743321128103103 | 88 |
UVM_ERROR @ 499493311 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 499493311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 69889109965432374803750458556216111350467850284801028386413967284869364343832 | 93 |
UVM_ERROR @ 508277312 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 508277312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 18753119129744900519956978879982967158951089280857697181668412337952939736191 | 88 |
UVM_ERROR @ 123968553 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 123968553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 32623779317777997776688804504987320228026301990886943961591605936906109766903 | 103 |
UVM_ERROR @ 46147009 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 46147009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 2479785684461744786408134994780790951578699840682036014059281100913680584501 | 1084 |
UVM_ERROR @ 3554264610 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 3554264610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 87507104211934043032107707926854697754349012502679456302493579929886233891326 | 88 |
UVM_ERROR @ 30788934 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30788934 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 40625295747926674547766571686579615319024557499375206427714255918436540470646 | 91 |
UVM_ERROR @ 60960447 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 60960447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 114401806313924232138286847873375439438315550336395102867528754202451297973577 | 88 |
UVM_ERROR @ 51947493 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 51947493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 72469181644953523092025183651023061427152460416342213829009295322307041786190 | 89 |
UVM_ERROR @ 503372565 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 503372565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 70401476592923887039508227760049701055055241585621597950073113592563332804387 | 88 |
UVM_ERROR @ 506861256 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 506861256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 111862630787217484714864898235904300975478673603470422296238210489849177729488 | 88 |
UVM_ERROR @ 126374384 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 126374384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 42331048338373097622436629422888613879637123229924311858743972688226082365986 | 88 |
UVM_ERROR @ 126680893 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 126680893 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 76650688398061353279698339275167636097392042679556089275840115511959340311722 | 89 |
UVM_ERROR @ 41359056 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 41359056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 62173366123454255227924311636246818513034169221823737607376481193679422928239 | 90 |
UVM_ERROR @ 125173911 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125173911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 40588404964616680180255596676611083070006989182427762319979648036013424164168 | 88 |
UVM_ERROR @ 126970963 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 126970963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 45980860036799805598612502445258725847543684468344339585667165048369970133915 | 89 |
UVM_ERROR @ 30606759 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30606759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 59589817274662587823348911400748574647189295621690428788029847774199552069821 | 91 |
UVM_ERROR @ 31726711 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31726711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 101165320383977040849254342088524098881615753067398315429111848739233823271265 | 91 |
UVM_ERROR @ 510527918 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 510527918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 103916986656237652579229778919354647241466145328551901707442411323006388673993 | 93 |
UVM_ERROR @ 66169591 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 66169591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 40598260032428913017888895339436157246388095867360441257456566340530673340925 | 208 |
UVM_ERROR @ 780888458 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 780888458 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 67817180478416134132250155724238637641284629958757878667494254989768383773473 | 182 |
UVM_ERROR @ 72220146 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 72220146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1015) virtual_sequencer [otp_ctrl_common_vseq] expect alert:fatal_prim_otp_alert to fire | ||||
| otp_ctrl_tl_intg_err | 28131391924690213471734966506046024507252575230785884581110338718408874867997 | 197 |
UVM_ERROR @ 508330547 ps: (cip_base_vseq.sv:1015) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] expect alert:fatal_prim_otp_alert to fire
UVM_INFO @ 508330547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * | ||||
| otp_ctrl_partition_walk | 45128441355861319218422099762118929040038235623537742130852115239321497757677 | 165364 |
UVM_ERROR @ 5242274479 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 5242274479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 8976623097875008344478498836420495536434602926748721514495451488848214130936 | 500 |
UVM_ERROR @ 36639479 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 36639479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 28807101494884321525574571445338758193361058205444711584002387382394528803827 | 365 |
UVM_ERROR @ 207311345 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 207311345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 107965785664174920709555404084924676666605152170858130082974575737535637099038 | 1826 |
UVM_ERROR @ 217313083 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 217313083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 81750665351769882250098363574617774138910040000014277933194573686087095728366 | 1077 |
UVM_ERROR @ 160227540 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 160227540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 9082140442927289196734182340521402369637397086004554494714596803001115740939 | 1081 |
UVM_ERROR @ 858931507 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 858931507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 104198657099081868645499269702006225611699991785586325428439811712678289170663 | 8345 |
UVM_ERROR @ 454722531 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 454722531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 6612336104519976247641309447257417718004706786795417182294293691529905130711 | 356 |
UVM_ERROR @ 99853168 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 99853168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 92512468225989104836268682197171513340969251918939122157885045429343327653150 | 12401 |
UVM_ERROR @ 345346788 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 345346788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 18609934561825488177955620216927228259649336947382247556200166308051558263747 | 2573 |
UVM_ERROR @ 164307503 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 164307503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 99451072239427903647450311910351840976434260423326361971683193176685977237217 | 3561 |
UVM_ERROR @ 606374525 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 606374525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 63201624143956995219578439322700053054451764963377585121638222475248612773731 | 468 |
UVM_ERROR @ 75214336 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 75214336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 83669417618957829684800717956716756829764204616645863274116818127328983003702 | 226 |
UVM_ERROR @ 63015142 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 63015142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 42424672254799334172035809964027195808845487445813909576888036730566555607430 | 159 |
UVM_ERROR @ 678678819 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 678678819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 65597508683310822859098468186240644428340737677635361924766071307322735118342 | 548 |
UVM_ERROR @ 872489785 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 872489785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 18323472007816520272585437080618304634242554711010651522532712129604325809112 | 4905 |
UVM_ERROR @ 467667723 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 467667723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 12910702871330165247722672638578242757717487270733811237323246642122521399961 | 3165 |
UVM_ERROR @ 96686412 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 96686412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 55942484041647350549985982084046864301379242781980612979898437415006242173480 | 7527 |
UVM_ERROR @ 428012756 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 428012756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 94107951270672006636134754148229415155120917841669426734378451546448708819500 | 854 |
UVM_ERROR @ 89271941 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 89271941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 109171585635104201324643068927045008410851234125993041146062888038801299357322 | 2599 |
UVM_ERROR @ 88479543 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 88479543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 25065336255956753432759549953010628680298084249106894840444984905981046736449 | 1213 |
UVM_ERROR @ 1106231367 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1106231367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 82632642503638328026039268237396052026534551682066132924081663137798234193662 | 821 |
UVM_ERROR @ 230898677 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 230898677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 58399881947099887609233277429876049740508918711028246386291129341681381006731 | 5711 |
UVM_ERROR @ 2953121447 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 2953121447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 69277992385280487202694645033265741654559885001085399973886438461731388191756 | 2843 |
UVM_ERROR @ 1580946892 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1580946892 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 89751153700425120255459382800541664093775151376944993012019794105012456282942 | 706 |
UVM_ERROR @ 41148287 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 41148287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 57521208208078892487140100383766296840737856395227757751346779075236352940481 | 1868 |
UVM_ERROR @ 74699481 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 74699481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 13495571775521387486989165265071150358088197286130585011343586961342779830282 | 479 |
UVM_ERROR @ 109452897 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 109452897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 97332702563136786887114206724995767833434664787771123441369540639336608546000 | 358 |
UVM_ERROR @ 55775951 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 55775951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 54175565629318517584150666723105653919931849720775712633551468409605036347020 | 3589 |
UVM_ERROR @ 321638896 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 321638896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 40235545756588438035429604381200003563307907103300743934624159897639029309171 | 2693 |
UVM_ERROR @ 1011863591 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1011863591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 7683678384567159515110625891606849440533269908742741302000125738243285667627 | 5885 |
UVM_ERROR @ 96158588 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 96158588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 18328667132740682620848540912614609078350838049658114351633612319889256563273 | 2293 |
UVM_ERROR @ 137891306 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 137891306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 41116156529031489146960814299556644211072039182618816225362794944232898426390 | 3123 |
UVM_ERROR @ 160774805 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 160774805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 35995788982240802554017367811747919902865540869994748524162763491969742340005 | 435 |
UVM_ERROR @ 59045573 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 59045573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 91542352182008083532140000485288639141894278184780999400613843447827210258322 | 2909 |
UVM_ERROR @ 1313297457 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1313297457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 21458183398052764657477486184951481599274224124099777462452744774068705390353 | 720 |
UVM_ERROR @ 44827805 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 44827805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 6777636754856185089032101411610119106281279886917695008659275997690136979093 | 3685 |
UVM_ERROR @ 331575302 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 331575302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 20704070781485695380789177944339182699302886342691142587295254028508103958800 | 2075 |
UVM_ERROR @ 105071709 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 105071709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 94319166271712150936275218922332110888175983446075709694400335803988371522945 | 11707 |
UVM_ERROR @ 620550099 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 620550099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 31597337203012957794461970839162528298447821487978053042323120038774747133802 | 8223 |
UVM_ERROR @ 4438691932 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 4438691932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 14143170019570228746873509504750519666054550185463539682102759715108647196543 | 418 |
UVM_ERROR @ 70499570 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 70499570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 112388567650095446187670410385273733933871398406603940233640158419640298169665 | 1675 |
UVM_ERROR @ 192175067 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 192175067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 57409794815225508111016552222100824792298518917123358469518446931784084255161 | 260 |
UVM_ERROR @ 64289214 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 64289214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 115560662464616333809300221360763135012872168857302979708557156514268988980095 | 7209 |
UVM_ERROR @ 263641141 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 263641141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 79550522257839981695746603055538385645312648223467922949240543024160119596613 | 2837 |
UVM_ERROR @ 1210108867 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1210108867 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 59569265574869554252070711940702833486745594809273561240691736940429532414960 | 107 |
UVM_ERROR @ 905248135 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 905248135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 50151346608391400179494858159420667287178868322759350837895455149272721837330 | 2039 |
UVM_ERROR @ 162579890 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 162579890 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 9790169834229806723810056416065356359293327150473416705509173110037181242833 | 1289 |
UVM_ERROR @ 76854234 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 76854234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 15831348835582912549240559580778701068643870119678709607199072173172408574569 | 600 |
UVM_ERROR @ 57404614 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 57404614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 59258578032769043649843506903772282062229338497057827375645287812995195078522 | 3875 |
UVM_ERROR @ 147218708 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 147218708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 93854012377788492147305661654469247321732230821208474805413009152061155765762 | 2983 |
UVM_ERROR @ 194118630 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 194118630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 20970768245216999147565683613587017487911448858612371529766706687448046015057 | 2206 |
UVM_ERROR @ 118176443 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 118176443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 52960890437822900353766541737903583665511792896357790409782058287856314304882 | 1096 |
UVM_ERROR @ 104153781 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 104153781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 17288147653570200803544832104924387645850229836064963178052349564693201149776 | 196 |
UVM_ERROR @ 87205745 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 87205745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 36208959332682886776030921861472636232936824809261495424978355905871479790132 | 632 |
UVM_ERROR @ 84938655 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 84938655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 51348357257940050531533325380053529733398482714433682790627598870430153922269 | 356 |
UVM_ERROR @ 758354970 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 758354970 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 85665745217359082047192338189431441214095083409647178503203328924733460061291 | 1020 |
UVM_ERROR @ 56260075 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 56260075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 32789883813329407305833885086262957165700403584141085512929382191032928288607 | 96 |
UVM_ERROR @ 53878292 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 53878292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 114677767269290963111748755154687751766432393131782149398454353431213778495531 | 642 |
UVM_ERROR @ 38604553 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38604553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 47013843648040576768703522654844927787836132769513788253330742184323359173471 | 424 |
UVM_ERROR @ 99815663 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 99815663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 93376975609794659728230502761805685889915372417612307757033163176280215376206 | 566 |
UVM_ERROR @ 197138066 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 197138066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 107014914178168868409103558794985396827214529860964143414505669021228550765061 | 1408 |
UVM_ERROR @ 813592830 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 813592830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 24153902738999148089706740298703322231555318632545547324343975672927418052190 | 610 |
UVM_ERROR @ 77929278 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 77929278 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 23168460901362193857880485415517909096938248039393587710918529749323094923686 | 700 |
UVM_ERROR @ 49325881 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 49325881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 71030292377475602574619162445210198846427841199702363026986960940560400221521 | 138 |
UVM_ERROR @ 834228037 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 834228037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 89726896389892303161343202301655930432512558985610455140117731195001965847328 | 1420 |
UVM_ERROR @ 97885062 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 97885062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 24799875363316461873719181381587144736630937489912473732479921175371534892504 | 326 |
UVM_ERROR @ 141352781 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 141352781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 33488410778973195456053354375250480659281761805037819646184899230459750082635 | 398 |
UVM_ERROR @ 37354462 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 37354462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 112512384615196440176953808437235113001983756355185173592660970331113361994150 | 1242 |
UVM_ERROR @ 63973264 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 63973264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 35568738266751294105173441384855399552552020780851921064268169846801109920578 | 1440 |
UVM_ERROR @ 193350491 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 193350491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 94869112347563554336894742723363444767244698390137439522233531171105361730769 | 96 |
UVM_ERROR @ 500141043 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 500141043 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 23787540270988175069683617618924955637105417538538554690161435851370116157594 | 810 |
UVM_ERROR @ 88158359 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 88158359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 567763130810238887999068969425079438578963064308752820388308231929808036255 | 950 |
UVM_ERROR @ 755323612 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 755323612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 50715984702226684464953865289536745815114423983802083161407236335816090110260 | 1278 |
UVM_ERROR @ 52999693 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 52999693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 71765021392838294635796528926622940872673226681259561558769222939586587910625 | 138 |
UVM_ERROR @ 128776394 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 128776394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 47035527601921340459407332044743522281830746821289777677361479892692334371708 | 672 |
UVM_ERROR @ 79554750 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 79554750 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 100520044776996547617552492247082314722299375081036133686502230146199075195075 | 972 |
UVM_ERROR @ 268028881 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 268028881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 95413764402231343892024652747643782816810758644238053204629952486363833665932 | 1142 |
UVM_ERROR @ 67447739 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 67447739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 91180676532769881265518792647266969886592062708125079669242097719692204337702 | 582 |
UVM_ERROR @ 87265295 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 87265295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 88498579890073705409942862982530793536656673573575339838968118563973664410547 | 652 |
UVM_ERROR @ 42128620 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 42128620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 100129208863193067821579483704927213099403400461589370952383739193042736985560 | 1066 |
UVM_ERROR @ 726963811 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 726963811 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 11404927840724216072346662853047541110331784524554465754158532633143980310268 | 138 |
UVM_ERROR @ 65406330 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 65406330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 294673000173863118612746456165464906674935602453513577403064081507723088955 | 96 |
UVM_ERROR @ 596174534 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 596174534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 44593486515550704793542620680424660306861225850677418344137726093276297516881 | 692 |
UVM_ERROR @ 40100500 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 40100500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 41587425887116565775881913821938467325180658602520618270808814120447879149007 | 678 |
UVM_ERROR @ 79538602 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 79538602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 98962579260461064634490208496010957952615523642118630139492778826922411986307 | 990 |
UVM_ERROR @ 90655735 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 90655735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 48365769794378151592548338842207111966436075976854486929871802348989022013340 | 264 |
UVM_ERROR @ 553588823 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 553588823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 4803059903291838061982658772620904981387043005096193695908944442151724532325 | 140 |
UVM_ERROR @ 142062981 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 142062981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 16809352046302836761861063085682145200351275548479458377191483712566469965490 | 196 |
UVM_ERROR @ 129543710 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 129543710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 21166272893420480993370989005589075823122202318343911447224881678754943647100 | 404 |
UVM_ERROR @ 42549484 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 42549484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 17212489815573765525302261461013268807200280310559745231447861796809166620703 | 454 |
UVM_ERROR @ 37327664 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 37327664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 78912607215964656075625272843816832684829478155318647973078544667011587580693 | 1694 |
UVM_ERROR @ 69956823 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 69956823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 55658410282508162913953392126441494466555020233977228902153357315939256951417 | 762 |
UVM_ERROR @ 63377028 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 63377028 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 57505314373939661378534851466983174045451519983767169135534287837038470069110 | 772 |
UVM_ERROR @ 59842461 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 59842461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 2479045384584006684080474877161416117059052365816804683476906894991069712967 | 584 |
UVM_ERROR @ 77739132 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 77739132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 111874639615667559268930440753520727263623705343058220866175907415975048827678 | 304 |
UVM_ERROR @ 79757489 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 79757489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 45226825963707142191375876234041255195171499726124597956253387956262989767237 | 746 |
UVM_ERROR @ 40241035 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 40241035 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 111446829767793650174911412580935739451515559557558017731278194618143375141756 | 3134 |
UVM_ERROR @ 181710693 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 181710693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 22775006746607101402299982996036382728333828277707378071927232526423636521106 | 3446 |
UVM_ERROR @ 86214980 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 86214980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 39851281410025015109291079980005875734120905625561622529017005307633383751978 | 626 |
UVM_ERROR @ 148658110 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 148658110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 31367138496433231287881369717363795350442063832602900308631145534785174407001 | 178 |
UVM_ERROR @ 110329599 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 110329599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 10058976206961483076257702385681302616722871608678751798673010823090048080010 | 660 |
UVM_ERROR @ 205839562 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 205839562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 2498460358148065940699907610613360235574193493536144568606940628501585053268 | 1434 |
UVM_ERROR @ 816444771 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 816444771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 62828192006859376349221152221247107393106171436565449647910138756268553096134 | 2328 |
UVM_ERROR @ 254954678 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 254954678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 27361352614343577177374952663904452812170754259305794891704433867318150840694 | 1294 |
UVM_ERROR @ 146762711 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 146762711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 68487583525191654987888407540679006061854874986271168561541051279709216696697 | 1334 |
UVM_ERROR @ 117819211 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 117819211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 43024142315508106972934147325069631611638150406747951858952949185793049758768 | 926 |
UVM_ERROR @ 272157437 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 272157437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 90854836649918126926003231531598505819555552684837641853565704614887175777796 | 540 |
UVM_ERROR @ 75277807 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 75277807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 9725848859866890025819484399778736883608181952676349767587515916017976159115 | 1392 |
UVM_ERROR @ 172125796 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 172125796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 96777961493126446087606030887758805996565895833293233270048063852161334583927 | 184 |
UVM_ERROR @ 60187492 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 60187492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 63548358465676133466232325013024708520661097847372480422082385694623094304793 | 662 |
UVM_ERROR @ 48518279 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 48518279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 71541907299607799419444736092751515633625520441994959023681966717214789435601 | 626 |
UVM_ERROR @ 61963583 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 61963583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 63139882220165591755522396158640619878286070038822460765638488674742950143006 | 138 |
UVM_ERROR @ 527381401 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 527381401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 88962431171779947276086125914935649435030105460611923617029061582388852066238 | 1612 |
UVM_ERROR @ 956517249 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 956517249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 87402952474577455784715481796149390304818305242220145032629973101514718888451 | 138 |
UVM_ERROR @ 139395066 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 139395066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 39207038260396385684696938252801058005784154043300658239084229325419571552379 | 1252 |
UVM_ERROR @ 120210896 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 120210896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 41429176606822471525467918972873332539827963369481208076523405158053980451621 | 658 |
UVM_ERROR @ 38497329 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38497329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 59422924768117815205969688269972565831367933118356337472894026271740368344571 | 2028 |
UVM_ERROR @ 80358625 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 80358625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 101191420961817680408866062178360782063457048891736365441766146748638036735057 | 1822 |
UVM_ERROR @ 90726554 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 90726554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 37605733554637396638364326604648735147942151551782106976510423196981419668026 | 1320 |
UVM_ERROR @ 780328997 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 780328997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 89741273745036281276360558117652823501811534434737872737670458071522350903250 | 1398 |
UVM_ERROR @ 835794921 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 835794921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 90920919937741846572533089006287758602855326797421411135793918610111170408393 | 1228 |
UVM_ERROR @ 179025776 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 179025776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 88331047181923323700712360657555894511925920922320008672801092367580010419854 | 532 |
UVM_ERROR @ 131985495 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 131985495 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 17496458837378217545156546896684899269001196296228722648079361334890411674925 | 1934 |
UVM_ERROR @ 1132111182 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1132111182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 60139525458648235417857757697922799850492528771407667881021668883943965386088 | 1328 |
UVM_ERROR @ 98101265 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 98101265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 59914661933551536859423568093661300270520955604311342404263863809708124321319 | 352 |
UVM_ERROR @ 142783832 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 142783832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 66809200276759093602130492373472331026652538066651136129464529916589199009938 | 524 |
UVM_ERROR @ 653817198 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 653817198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 74085115106435739317306454548783863954522772630767069454672466563753331664263 | 494 |
UVM_ERROR @ 186900077 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 186900077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 22253998511954727041228427435234749724366338788754609128337231230833724475889 | 260 |
UVM_ERROR @ 108801308 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 108801308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 18976947367437993266644531720291788184118677213214020379945624523735140272314 | 486 |
UVM_ERROR @ 116562783 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 116562783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 60749888885184393025197375004082572207316292598185958273043220459780575752899 | 350 |
UVM_ERROR @ 68649525 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 68649525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | ||||
| otp_ctrl_low_freq_read | 15085571353782248290878630285001793948306404111115763141056200302900405752832 | 86 |
UVM_ERROR @ 54323308740 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 54323308740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 26830509204090591717989049610158332285163500230097854169689060732365189865234 | 87 |
UVM_ERROR @ 46314589823 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 46314589823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 14748212131205247149453769556349286209021728770492642169444815443166059564480 | 87 |
UVM_ERROR @ 23119330245 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 23119330245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 19729230094156393968372005493329008315796670140859901143460489150834501941075 | 15684 |
UVM_ERROR @ 23402802793 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 23402802793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 34385763351541627925514150903435814456222715273652109177319916454512739136745 | 87 |
UVM_ERROR @ 46374642638 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 46374642638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 79019743666787307370793616181824284459760320154332156095495101120792563907650 | 10138 |
UVM_ERROR @ 58693420087 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 58693420087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 70709778883706833337505594305604381155089702372494086912778697234973531686337 | 87 |
UVM_ERROR @ 55225298590 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 55225298590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 108600044326734700751004547269904920883322164684428516905592598853913826690900 | 13192 |
UVM_ERROR @ 60419699559 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 60419699559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask * | ||||
| otp_ctrl_background_chks | 8484292970508075918641972802003585476816741854874272541930843726497774794961 | 11649 |
UVM_ERROR @ 594811300 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 594811300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 111803343585737383943854194662365974950724780693791588767353480840833098776230 | 28120 |
UVM_ERROR @ 826848226 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 826848226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 72411354783001867550443965860688883947320539727723735209862624819342441490069 | 7059 |
UVM_ERROR @ 4991709258 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 4991709258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 69134594234026507142719461174453113660057601950517306316350519395081130320382 | 11536 |
UVM_ERROR @ 6247353658 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 6247353658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 57378071176349088208311205228820016085851247562656238730144398170447037965469 | 7465 |
UVM_ERROR @ 407960077 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 407960077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 71185438885615916166735864682074486946878045242464756355148760356676351192849 | 5849 |
UVM_ERROR @ 389788118 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 389788118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 2034546500808706956191698224266783528427558377332527106351037308936230605782 | 8550 |
UVM_ERROR @ 1091229808 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1091229808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 85150988532336158224388614751270669680871365006236213378079892263084338068060 | 22887 |
UVM_ERROR @ 8106341698 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 8106341698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 53774232205754322196813078440624183735974974315286607323371586940044238895734 | 4826 |
UVM_ERROR @ 577997497 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 577997497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 91209552878529856190669277185328156151532512381816446996776676387303632796926 | 6395 |
UVM_ERROR @ 220371663 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 220371663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 41914713997131664619084641808752501320944739499335179539002457811789632941415 | 11981 |
UVM_ERROR @ 1594834521 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1594834521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 111006119396551413941130152970370691392723280500552312855466122290505138705039 | 7936 |
UVM_ERROR @ 657110193 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 657110193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 99050688754888995851729020655536759684529935848876609581966761710692123310580 | 11770 |
UVM_ERROR @ 862870957 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 862870957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 83888628503290935379052836864218376222196886906336699935552159094754780180328 | 8368 |
UVM_ERROR @ 456654534 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 456654534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 65345715295083190924655652659981629709070794406239319703480711619437165035458 | 7682 |
UVM_ERROR @ 958213685 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 958213685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 112430790639752205819132305043461291032397305111648287025494657613503726246512 | 11075 |
UVM_ERROR @ 395319039 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 395319039 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 104156440094968643055648740756813768954263613542969900592536304364651712971124 | 16090 |
UVM_ERROR @ 834446458 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 834446458 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 37568255596081999159534692248126584259766662076158585903189593799955893429670 | 9139 |
UVM_ERROR @ 446489386 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 446489386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 13001832637665746200550371743964551025117374770228987330156687513694019050784 | 9532 |
UVM_ERROR @ 952541665 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 952541665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 103779961375360017273650275957704804937563831156654667309647735272715931008686 | 5977 |
UVM_ERROR @ 353101232 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 353101232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 95619571695301204460952121373024160353621260994403833068051611428692007408713 | 5644 |
UVM_ERROR @ 700410460 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (258 [0x102] vs 256 [0x100]) reg name: status, compare_mask 0
UVM_INFO @ 700410460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 22014473702989441027877427071585054851034905972598762043836400906432949228717 | 18436 |
UVM_ERROR @ 1360944000 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1360944000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 105943902551723181371700098153393384585041987204294852818883644596215842050390 | 1785 |
UVM_ERROR @ 105031106 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 105031106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 60644198864547569424317396815298893925925454891612499766742303655780349347224 | 25345 |
UVM_ERROR @ 1717043520 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 1717043520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* | ||||
| otp_ctrl_dai_lock | 81391536930199209787617577903534188643808747511666602518081586529580785454696 | 2037 |
UVM_ERROR @ 316343806 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 316343806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 47636985061047013529143449716163062142271385923164462384504597691386676053890 | 775 |
UVM_ERROR @ 159831650 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 159831650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 65217159070407496898719779875706783321945747519009793056577416303708169365191 | 2331 |
UVM_ERROR @ 76453997 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 76453997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 94641616650721167361521727242302143088751297941473666244725991000851664493063 | 1377 |
UVM_ERROR @ 84530422 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 84530422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 35051821991729658864732660613577244543771391749955865049606777798956516556695 | 3621 |
UVM_ERROR @ 798981862 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 798981862 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 80320005717343951259919926944396014800405676137886941887304351396003995585613 | 1865 |
UVM_ERROR @ 89961688 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 89961688 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 71765142789434021075983790633282080566355525946387454515935039620227774109463 | 837 |
UVM_ERROR @ 132525615 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 132525615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 33761044328583646359751145344009243170541526664220159481562244202554410172516 | 2403 |
UVM_ERROR @ 67813021 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 67813021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 87611849497257301128092744997383533163694436898724956326849850432831714069948 | 3467 |
UVM_ERROR @ 707596859 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 707596859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 77706453793555504506845763813489299047406035827318023332219967659626262581041 | 801 |
UVM_ERROR @ 237522831 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 237522831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 36579875380538943327324158599040963782378957481582837901751862855938431320760 | 1911 |
UVM_ERROR @ 75591644 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 75591644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 87709887532136804682985632193221922294550492381700198508314025649412516376991 | 7469 |
UVM_ERROR @ 328897944 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 328897944 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 111776134489437298957477495371094174004059207828006410229802968523451680698688 | 1451 |
UVM_ERROR @ 432198747 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 432198747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 2987380151798876666574617213753944600290262254921418864565159278982903513453 | 2449 |
UVM_ERROR @ 172451740 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 172451740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 14476521962668923754892300210992816095780717184612084042399564967158958891017 | 3831 |
UVM_ERROR @ 2754251286 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2754251286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 102819593732334445588461472238732168214934935963184547600783364645441076203883 | 5414 |
UVM_ERROR @ 534470722 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 534470722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 112469055674923270747936094231057964250087250316281015407010424411716667544041 | 813 |
UVM_ERROR @ 139808556 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 139808556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 53966835033763492691821497511418075040094423166965095987488801968815370100669 | 271 |
UVM_ERROR @ 67671393 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 67671393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 52317041986069449230053921469564363559020912580581305781372193662919862901772 | 2605 |
UVM_ERROR @ 2801898759 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2801898759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 39642742689425544495924869347637226511319278718689827399895032895352721903817 | 7058 |
UVM_ERROR @ 6146702910 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6146702910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 65237040091676370476097016812723995504217906675722245734000617589200229009226 | 10606 |
UVM_ERROR @ 179075894 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 179075894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 65944826353095646613183440467687825187651817227984899328426216281180280060941 | 3541 |
UVM_ERROR @ 82329295 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 82329295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 31891396112773062216439786146367966562557556298098559988481119065981357129498 | 2884 |
UVM_ERROR @ 475173057 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 475173057 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 84180795368860730634435066859275257729660586797045269555714883262457251892739 | 4222 |
UVM_ERROR @ 153152660 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 153152660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 14192022360688629273555838427047350275680180666152231894101368690277188870775 | 1663 |
UVM_ERROR @ 1509490582 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1509490582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 72545888193674767795267477543790853537655458005812149897069347152744407850164 | 1465 |
UVM_ERROR @ 444776420 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 444776420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 86613811469452723818255149232359126284945045413430845978915714633627544789734 | 2272 |
UVM_ERROR @ 692936032 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 692936032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 8986444815539322369294002453182762085838687225296196694484234992431617054370 | 12005 |
UVM_ERROR @ 2850586138 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2850586138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 85957460573298324749293375407599684865952634615945519591707879521947655283204 | 4583 |
UVM_ERROR @ 1260821347 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1260821347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 29088871810433284079904663989493296952303790858732519124976816334678861178591 | 847 |
UVM_ERROR @ 75552386 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 75552386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 43192275518443366630651315018907005512412393192637751870076483832268451228307 | 63709 |
UVM_ERROR @ 6776199988 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6776199988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 86163743828063744357113483763078995692165945654802276741387942663990676420993 | 2689 |
UVM_ERROR @ 61936147 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 61936147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 77026126233997499517823558515780878544306356327991422008967924765467175031288 | 1293 |
UVM_ERROR @ 1741497875 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1741497875 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 60053689183289612762610707415585755265191663559874126785462105170206913508991 | 291 |
UVM_ERROR @ 2264584904 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2264584904 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 72650908221096781736813014627499892404230124107140214506182117211397158348528 | 35206 |
UVM_ERROR @ 4060159786 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4060159786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 49785801072025861696239125876869499393023174339579009313815264221366702600795 | 1551 |
UVM_ERROR @ 2062588217 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2062588217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 49454196795984161609793042955755171282263534435603332429340838554291822685307 | 6236 |
UVM_ERROR @ 207312081 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 207312081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 54709539864110231050890885616375095366676101952348953063864450707624705212915 | 5316 |
UVM_ERROR @ 1198928678 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1198928678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 60265135824046396390718115008950330421425009525609586794665101646484758034411 | 15309 |
UVM_ERROR @ 1283571906 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1283571906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 93033465306530679270624713003199611823445053987044672934284317402996788497157 | 24079 |
UVM_ERROR @ 662841225 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 662841225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 58059323568397740900892379042398848818186123024649334116298563048461460130060 | 3890 |
UVM_ERROR @ 863772575 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 863772575 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 99276951135059410809497659901697072742489470409071408099660820556735861034502 | 4073 |
UVM_ERROR @ 1306657107 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1306657107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 28953546205394145850233410584103453370121363728671770067771454428331707833931 | 2295 |
UVM_ERROR @ 5549739107 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 5549739107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 102981337322978176736182925794028546468625878404480559626927115918032043627355 | 3774 |
UVM_ERROR @ 1997550647 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1997550647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 111452930839398713310061675940907442651197666650601245528077747992053071699646 | 1893 |
UVM_ERROR @ 1645037843 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1645037843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 56312923050130007700674178212581896906488310061628207176157948484224688900070 | 1923 |
UVM_ERROR @ 3707356523 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3707356523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 112107791068607708076367121486139296108626091783519088638486297900617430673739 | 3292 |
UVM_ERROR @ 315002731 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 315002731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 83915219280288765421977218517390574558588589520983399138349593303128168262186 | 799 |
UVM_ERROR @ 140782328 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 140782328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 85076764018649970208795879220777534636015653093838833712184785372605516555341 | 1905 |
UVM_ERROR @ 1915802772 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1915802772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 20174986195248524328652339258111213869588875745760857992122654156446761803145 | 4913 |
UVM_ERROR @ 174649350 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 174649350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 58048526749373295211044541815301166614915284701719979359042647156705143789061 | 6965 |
UVM_ERROR @ 468353269 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 468353269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 69006935956844751907537702758189108637123596167747012286813361440770499491232 | 4047 |
UVM_ERROR @ 158745326 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 158745326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 66226555475684047186969427427386366174519732743886757539772868317481177045997 | 2045 |
UVM_ERROR @ 114506828 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 114506828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 109863841590114871656908617200750833654400726442693716550149511899382068419925 | 3299 |
UVM_ERROR @ 210272722 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 210272722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 76869643313100309347969939721432275285991167135477634310482560069560488104373 | 1621 |
UVM_ERROR @ 995671907 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 995671907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 98500744107811769163433591774932072480688192888276914149083881430547212086784 | 50023 |
UVM_ERROR @ 6697489676 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6697489676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 24582376090409133917800039276996167441132529640290706928258429394068707397835 | 9834 |
UVM_ERROR @ 304221425 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 304221425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 93096901474744407746235478640550316423463237546477478061945664731401039789750 | 6266 |
UVM_ERROR @ 2297229367 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2297229367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 15255278939514413037567630895614674159416607939935034324234426545016891771459 | 3322 |
UVM_ERROR @ 191067072 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 191067072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 53533133950569042730289581565079010832740788794416606121180984123319526352313 | 2697 |
UVM_ERROR @ 533195981 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 533195981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 1018344162205593400284506080838677208457445720837412469496735849667836921952 | 1144 |
UVM_ERROR @ 320377180 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 320377180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 23079562285385222687842729853151467909831455355348037278712973244771749075008 | 2141 |
UVM_ERROR @ 64816197 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 64816197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 39920119534571770738356938961239361296332122916207583527485177011200907837245 | 1903 |
UVM_ERROR @ 2351976554 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2351976554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 53882797554726392450101774560597420923830197764253475534381722093384513678832 | 295 |
UVM_ERROR @ 111178254 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 111178254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 13802915680173397660318848008816494203628914781161167973386281576603415193236 | 2972 |
UVM_ERROR @ 466372287 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 466372287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 26840132804733781058299062056944764811442651947638567154911547398428387980692 | 2129 |
UVM_ERROR @ 761179261 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 761179261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 14249095060090769435801853947132952495159541749942782885303675613496529956160 | 4865 |
UVM_ERROR @ 289133971 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 289133971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 82964660606319237787174945495454936468586763559597412985227406624087543052483 | 1153 |
UVM_ERROR @ 358330552 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 358330552 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 41929868651753196416664657526773501575833599477413423918208236531201502517972 | 5285 |
UVM_ERROR @ 5186643664 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 5186643664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 41704713026375553731891767146893500781813609044181672838727403173606040501214 | 2063 |
UVM_ERROR @ 141442499 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 141442499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 16622995915414614606522561920403316975579651425286915192371811713249507597009 | 481 |
UVM_ERROR @ 53522943 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 53522943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 1071769823932239693807117914979190716524850131598429941009492153642242858355 | 2409 |
UVM_ERROR @ 155863626 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 155863626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 37825491077965549820611459733683307688667164479914054516765970475581658731245 | 12909 |
UVM_ERROR @ 3913702874 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3913702874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 12458428761976259262495629961836924420305675030916744473964924222133267569892 | 1257 |
UVM_ERROR @ 413056619 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 413056619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 58073647013123657494535728296919504153172659937794262986186798393362602768969 | 157 |
UVM_ERROR @ 36780498 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 36780498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 31189361283959179525839825257796577314047484816530865786174500075179864507421 | 1833 |
UVM_ERROR @ 1596354358 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1596354358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 50020071745055701375830990658573381578691789417617562876672845752202221134384 | 7540 |
UVM_ERROR @ 448409307 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 448409307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 33978151981418460081245449650436793401591875404361408443614392279584573501256 | 1555 |
UVM_ERROR @ 291168719 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 291168719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 89598519597078543731484328910010340856707288838452387294502974123822620251044 | 7045 |
UVM_ERROR @ 144436066 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 144436066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 23657447156652417173916737779653985502114898677579365202764953253270495580181 | 159 |
UVM_ERROR @ 562200806 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 562200806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 60601803727824553030034738100165404615308862357258475482887155973048573987782 | 5138 |
UVM_ERROR @ 775044901 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 775044901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 54703816628412910964446955851705215066920624517388319845067887847237914047475 | 13468 |
UVM_ERROR @ 5660659889 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 5660659889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 27574765732699454882591190522275486429312339288345265753869520423186914357071 | 5649 |
UVM_ERROR @ 522887744 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 522887744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 101042904121855773684330698990565637152264395223706718605148579810129677576756 | 1603 |
UVM_ERROR @ 1326035410 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1326035410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 23382254029532295320303618010728523187132024105742623232358168631777123018070 | 2695 |
UVM_ERROR @ 248142484 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 248142484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 108226368607567599696416246906704138294085805610214773988506464518907913335378 | 16704 |
UVM_ERROR @ 2612397251 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2612397251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 694991926136596063820988116811357858340701796317681436894308155579514179453 | 363 |
UVM_ERROR @ 1057502524 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1057502524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 115532690167385681212943005203665636081982658983525327873880162523263251545590 | 519 |
UVM_ERROR @ 314960055 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 314960055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 95606650995245594479643019038371626855827842145096947691002084360094857666651 | 1173 |
UVM_ERROR @ 158137543 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 158137543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 10148263669430614972498600902245165923754402138981825619119702127213298643147 | 387 |
UVM_ERROR @ 543068541 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 543068541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 69131904550219940119281445684452145734027707354296580897481859849375382314386 | 905 |
UVM_ERROR @ 168478282 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 168478282 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 96531272956560381861445489828910680996146241146599026162525884891593106281148 | 2727 |
UVM_ERROR @ 184305179 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 184305179 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 35743298878671644141155630139933852384827201245309309604780962436275156300729 | 7805 |
UVM_ERROR @ 248949085 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 248949085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 9018314376733759843379320781261425170864113302792047281962210953737384985814 | 4111 |
UVM_ERROR @ 165100046 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 165100046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 81357453242299193541627866775178755783639318105247528594141065389209826164143 | 3439 |
UVM_ERROR @ 422341696 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 422341696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 75686539190296266456948543790675842326975561817540920473423162385808248268998 | 1079 |
UVM_ERROR @ 685378825 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 685378825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 2627428508470669107807210477606400559102289110152644534221782107538966430438 | 3323 |
UVM_ERROR @ 177693785 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 177693785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 38821548155602498204533840600167672419711937633981544909135240766932227950711 | 4984 |
UVM_ERROR @ 699856608 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 699856608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 87481677171541640621383441944093194399484703628403261174752780072178017790342 | 10325 |
UVM_ERROR @ 1490773909 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1490773909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 77024054950928095351067336021420590868747710153059149478089749187040752116352 | 9907 |
UVM_ERROR @ 1207233244 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1207233244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 104466635373000278490687449032816221903109829807427871270908755540002397257435 | 2203 |
UVM_ERROR @ 940355956 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 940355956 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 92769109302908177721031087280545741316672693495862220041268819067826437876673 | 749 |
UVM_ERROR @ 162607167 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 162607167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 12167005240837871498271354456152568907255242117735426672158651809444058020502 | 307 |
UVM_ERROR @ 212484973 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 212484973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 5802266469311186173550649778847242859263466047745565583414597819998861314335 | 6232 |
UVM_ERROR @ 900458456 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 900458456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 70826040718176804075849661266976711806919457823269376273393325284658748863503 | 2013 |
UVM_ERROR @ 493998657 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 493998657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 34678162560164545179723727531740631888610147500490946956561807230596981680844 | 1399 |
UVM_ERROR @ 143050199 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 143050199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 36825981940932020913398412486963612066281981501934679751356438920547688899188 | 14330 |
UVM_ERROR @ 1356974006 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1356974006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 88295328846370355398545666718636742834249302405631166094872756901726162803669 | 7872 |
UVM_ERROR @ 225256417 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 225256417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 1776097041308266931530169996313675561465467210450046218272682759319612980809 | 459 |
UVM_ERROR @ 321675126 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 321675126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 49722748279367857795041501355211629347064906008754806752245257715922505610514 | 6519 |
UVM_ERROR @ 1092174739 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1092174739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 84737281775732284622600778898502358922197899359690375935354132280292700924334 | 2649 |
UVM_ERROR @ 287213468 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 287213468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 103302441213132836309014387662989140842851309544582294591705984640378413376530 | 4261 |
UVM_ERROR @ 1242220212 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1242220212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 7130695755015915903181115697977673013428153065367680736517456789568787242015 | 347 |
UVM_ERROR @ 294754736 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 294754736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 82844908347052520674646835080542720571136545506087050234386455492584345594585 | 2933 |
UVM_ERROR @ 1239393317 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1239393317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 91211222537747138187202064910031204507789100567717993509376864658552340818999 | 2679 |
UVM_ERROR @ 128143107 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 128143107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 91963760803914546952001784323035876082166965584367459268382127289150514798546 | 329 |
UVM_ERROR @ 259989228 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 259989228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 63838194252553545881991896618234598130106843501737686776430880744447781058551 | 939 |
UVM_ERROR @ 380813737 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 380813737 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 33011505388234736266981070224601994365726862277047192512193222180181352551656 | 669 |
UVM_ERROR @ 917349283 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 917349283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 22101829113781170819038519730965501393269888256130229182929766553078499063297 | 2605 |
UVM_ERROR @ 231990141 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 231990141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 5264699056859943750750783650765583501584118139190516130282753604659335229070 | 271 |
UVM_ERROR @ 38492029 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 38492029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 64014951530183573858557931728115600732358507844516203747995495455611043424801 | 919 |
UVM_ERROR @ 151170897 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 151170897 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 39452851629951185914254707613433261532328534173822705806715752902754221242012 | 2131 |
UVM_ERROR @ 112130377 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 112130377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 41152179440511817124842236530128808535135937450284459918079575121024443465966 | 715 |
UVM_ERROR @ 145339652 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 145339652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 96835340276723373981931382351105271820614686095746873154067157857725524764257 | 645 |
UVM_ERROR @ 65434296 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 65434296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 5985409531452728777248660401264123308918351217515261874171710603488715473345 | 243 |
UVM_ERROR @ 43885196 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 43885196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 103388967179208059588547580935706865182891972489469925009783636407315052463266 | 461 |
UVM_ERROR @ 140394893 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 140394893 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_* | ||||
| otp_ctrl_dai_errs | 98927888952204423301251857514493499276611395268817279040944202158926676867394 | 1527 |
UVM_ERROR @ 97934406 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3658209873 [0xda0bda51] vs 3667647219 [0xda9bdaf3]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 97934406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 77370843686085964954431683923328406868828494508063458538735674645355089618332 | 9371 |
UVM_ERROR @ 269054237 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2562618367 [0x98be73ff] vs 2562614271 [0x98be63ff]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 269054237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 51451319915515727379738126239844390930860454086140478362384995856097605258276 | 4528 |
UVM_ERROR @ 492830921 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3531405120 [0xd27cf740] vs 3531372352 [0xd27c7740]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 492830921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 52807704476812890309730833224220359119220220843551424279408237853019752022405 | 5007 |
UVM_ERROR @ 1562717905 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1562717905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 77064576949439133131806871239626193733210430985061756056598191840417089381636 | 475 |
UVM_ERROR @ 1141068672 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3322654264 [0xc60bae38] vs 3322658328 [0xc60bbe18]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1141068672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 41664235115565343178448186582107054348653916046530101341573808402607762914839 | 4841 |
UVM_ERROR @ 418727566 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2828032142 [0xa890588e] vs 2828032398 [0xa890598e]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 418727566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 89882612211398616056954185418546258199841019669631558523475169956988373554779 | 3677 |
UVM_ERROR @ 1358921177 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4096 [0x1000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1358921177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 61187373485646616808858996447349009886410369913234235660366027148076412963897 | 3967 |
UVM_ERROR @ 3414636627 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1965945025 [0x752df0c1] vs 1965947073 [0x752df8c1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3414636627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 35703987603774273886010155017972319817764281074535564369653740668909466364265 | 465 |
UVM_ERROR @ 97789105 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 97789105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 57532532685720909453995657747724469833480011549780548201357517151388541668420 | 1917 |
UVM_ERROR @ 51252232 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4096 [0x1000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 51252232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 3945730858128463126954086052702251833986642730086031588088200385775238988762 | 11780 |
UVM_ERROR @ 874475098 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1024 [0x400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 874475098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 46822253062604852494721364377626050538322790697807175551491740010895885311951 | 20581 |
UVM_ERROR @ 2467474078 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2467474078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 99556288799231499970511573468836140523060749762071994800222043946522816663154 | 827 |
UVM_ERROR @ 955114029 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 64 [0x40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 955114029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 10078132513521737519235686634353818622407527926024958368048434455483860245812 | 4234 |
UVM_ERROR @ 273216791 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 273216791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 91699707790093632463628337105916368127392430863093381264937075296786787736867 | 451 |
UVM_ERROR @ 58502807 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 58502807 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 90152890490985810716786350092224549937057871337941606184179527477854289530392 | 7743 |
UVM_ERROR @ 619036075 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16 [0x10]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 619036075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 103758963636424159348601993797891840590544791527551617167002830558784202135085 | 10132 |
UVM_ERROR @ 6672236516 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1915732960 [0x722fc3e0] vs 1915700192 [0x722f43e0]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 6672236516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 54449341290980204703101639535591263795080311176912015322142458104716877785294 | 2661 |
UVM_ERROR @ 205572219 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 205572219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 38899363967807361509934262132093611552034546160273201597859778534491838628280 | 169 |
UVM_ERROR @ 104286552 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 104286552 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 65523100880847043228989048865393932828624591035635162755470532065522043466297 | 293 |
UVM_ERROR @ 168518860 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4096 [0x1000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 168518860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 6710985889576737266476378452164156200383316017440248157027691962807327766478 | 4618 |
UVM_ERROR @ 276744894 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32 [0x20]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 276744894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 31307514431303601120893109018746405236393981003722194826978498966709498472208 | 1740 |
UVM_ERROR @ 339058830 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 339058830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 46246691417384391997738940190010552691991488779262540011514085730169467056632 | 2852 |
UVM_ERROR @ 399159037 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 399159037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 79915854401413339089690867793892356063960456943478635678010030298398131578808 | 7732 |
UVM_ERROR @ 318599938 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3928097700 [0xea2203a4] vs 3928097188 [0xea2201a4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 318599938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 81887560602987620076579887988317473037034962147216464184601090530355896276484 | 10339 |
UVM_ERROR @ 2882377060 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4026531711 [0xefffff7f]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2882377060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 101777827413661844272848116976478314762748730296881667213717415696395039215690 | 6633 |
UVM_ERROR @ 4338027043 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4096 [0x1000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 4338027043 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 76307686111089022964841564607090333959692369265441973121122407290714527660840 | 6125 |
UVM_ERROR @ 429882700 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 128 [0x80]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 429882700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 10950982170045375254298792578811619847950663276536987423408378468208490768931 | 4964 |
UVM_ERROR @ 823175151 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 823175151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 100844768843433638788564791237491506323655652903219274287345932434636104683771 | 521 |
UVM_ERROR @ 143885799 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4187077565 [0xf991bbbd] vs 4187077053 [0xf991b9bd]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 143885799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 13747044229946283972043082788354710035424533748489012118314665214035284988917 | 3604 |
UVM_ERROR @ 200494770 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8192 [0x2000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 200494770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 35132407356322070301648712023826595871837118578385446860434802211346957850148 | 616 |
UVM_ERROR @ 466590117 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (725804581 [0x2b42e625] vs 725804577 [0x2b42e621]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 466590117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 21739341496860697248615087905176112430984715291673808688925648832392598284890 | 8314 |
UVM_ERROR @ 2907912214 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2176 [0x880]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2907912214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 75371074790659353319026288195921963748380291573804179768728002662727592165987 | 277 |
UVM_ERROR @ 153443783 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3973317061 [0xecd401c5] vs 3973317057 [0xecd401c1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 153443783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 21510443734190691246104272590617369600206409398931102284238216773104908769654 | 541 |
UVM_ERROR @ 147314386 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 147314386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 18152970676284824600170413125097663362545305359164815619726705208822875723201 | 349 |
UVM_ERROR @ 943836540 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 943836540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 80192817940215439872995470475806800040509474733200894977828159319222111349164 | 9116 |
UVM_ERROR @ 287795583 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3242370241 [0xc142a4c1] vs 3242337473 [0xc14224c1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 287795583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 101782381953422924948381406478736885776307072115348670221023509336960501035770 | 19519 |
UVM_ERROR @ 2146537403 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1024 [0x400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2146537403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 99656538288861238927324593887805214930533752567600374181243049702470052441059 | 1145 |
UVM_ERROR @ 491894777 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3051261369 [0xb5de8db9] vs 3051269561 [0xb5deadb9]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 491894777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 79137434770535592061587107079337510158542432322233639864584426743817472990325 | 21313 |
UVM_ERROR @ 1164976317 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1164976317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 9862013949071705745939658843300597661075482542501642334823028001921918699399 | 2123 |
UVM_ERROR @ 2307987149 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (347297444 [0x14b356a4] vs 347297316 [0x14b35624]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2307987149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 42449178895195272711504411566226698109707430982340916715365583945396060516725 | 259 |
UVM_ERROR @ 45261293 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 45261293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 27497754085029152058225756299396778401545842739113178358242790579270603325169 | 13022 |
UVM_ERROR @ 502987293 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 128 [0x80]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 502987293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 27723296708702118735222638492467609600253589362763502723870356531091916851933 | 1716 |
UVM_ERROR @ 202091207 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2365510954 [0x8cfed52a] vs 2365513066 [0x8cfedd6a]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 202091207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 8271423614905969254235547120516586395957088008808344238494865022651008177858 | 1847 |
UVM_ERROR @ 247400108 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (814978784 [0x309396e0] vs 814977760 [0x309392e0]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 247400108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 84557520178818133798776835954366067497405287152030740733073532685449468006224 | 171 |
UVM_ERROR @ 850029160 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3291342950 [0xc42de866] vs 3291342948 [0xc42de864]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 850029160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 99379200805433486326244161527082534357704167830489849887947699636911333305591 | 7494 |
UVM_ERROR @ 467539966 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 64 [0x40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 467539966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1308) [otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger! | ||||
| otp_ctrl_background_chks | 15684842294692622384920816875733159408378294811365348862718958963934342292218 | 3182 |
UVM_ERROR @ 841423071 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 841423071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 59413954199551938152016865648626630902641474510788004724716133235125003357153 | 11519 |
UVM_ERROR @ 991284591 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 991284591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_WARNING (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_*' is being accessed | ||||
| otp_ctrl_stress_all | 85374404820850283679213300094202507043583011790988232767121725639956923253083 | 18487 |
UVM_WARNING @ 2172221277 ps: (uvm_reg_field.svh:1191) [RegModel] Trying to predict value of field 'err_code' while register 'otp_ctrl_core_reg_block.err_code_23' is being accessed
UVM_INFO @ 2172247593 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 2172352857 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 2172431805 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
UVM_INFO @ 2172444963 ps: (otp_ctrl_scoreboard.sv:566) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] sw state 1, reg state 1
|
|
| UVM_ERROR (cip_base_vseq.sv:1015) virtual_sequencer [otp_ctrl_common_vseq] expect alert:fatal_bus_integ_error to fire | ||||
| otp_ctrl_sec_cm | 61485197053228317269838665987295554463434226604423065391040911010887734544881 | 869 |
UVM_ERROR @ 7011517929 ps: (cip_base_vseq.sv:1015) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] expect alert:fatal_bus_integ_error to fire
UVM_INFO @ 7011517929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state | ||||
| otp_ctrl_background_chks | 71486184771880256944676085648184496130479259869346973856609123067542677700161 | 10788 |
UVM_ERROR @ 2840547210 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2840547210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 109662113704278144834504654910574475675302471087730365031636838177886628460628 | 8695 |
UVM_ERROR @ 1093739164 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1093739164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 106156059957545553366373132973072018030336318608504140090859886388727768791666 | 3206 |
UVM_ERROR @ 9715408344 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 9715408344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 22415432783544130437173010644882078761585553338619065488431130951572353685219 | 14260 |
UVM_ERROR @ 23561537508 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 23561537508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 19408221355010979261514231680512579741063292729174751533307518426072269672203 | 9153 |
UVM_ERROR @ 1484318919 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1484318919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 100822617994600530102622129214945993865691087608105443224292091940310465193552 | 6986 |
UVM_ERROR @ 1113215225 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1113215225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 19653465679891223428399828900968832327304055091418367903804126427457058146530 | 12450 |
UVM_ERROR @ 764799653 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 764799653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 110489726574526757364236464353778308767882396573449015930820040228423697249757 | 1394 |
UVM_ERROR @ 247001110 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 247001110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 25651404367742595050703462233918022532898809784809634984668472840391446754450 | 2715 |
UVM_ERROR @ 1169555212 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1169555212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 98854452219785515559061527120673214446058889684878453143594227800073967928889 | 3062 |
UVM_ERROR @ 306251525 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 306251525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 95123439138373254431793159636752841234114363579451815409485058260070146692398 | 8393 |
UVM_ERROR @ 1034512167 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1034512167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 10890242849262881525013834927559771232485909375385456872887376204477275054256 | 19892 |
UVM_ERROR @ 2313090060 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2313090060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 40391553362941448261931052284649849266714804261931766539259678449664361683307 | 11036 |
UVM_ERROR @ 4060534796 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 4060534796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 64208616481647000746451157221606294719966448682904980030735221939340076823302 | 3280 |
UVM_ERROR @ 447988392 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 447988392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 104771801460982903501776988149165927251765400724980295711351349698756419115117 | 7048 |
UVM_ERROR @ 595224666 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 595224666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 52347564607157582895256191605662720024632305693150394802803672096030103958499 | 11076 |
UVM_ERROR @ 3330631343 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3330631343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 85740626890209337601089270104917901724742886898499654475038620137183264760394 | 4435 |
UVM_ERROR @ 438679126 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 438679126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 94327622033489559842701255438524631362218829166133803879550129273398383246969 | 24696 |
UVM_ERROR @ 19249941468 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 19249941468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 17414813693296943960482147100138194928483119756683715979884098877751181070601 | 7854 |
UVM_ERROR @ 472404888 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 472404888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 28953894264642183943952466405780554194943729310967345241539025093851470669163 | 7580 |
UVM_ERROR @ 2724525694 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2724525694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 50759702846743937354681090218774441150150423695900417652381175749640296538913 | 5498 |
UVM_ERROR @ 373610200 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 373610200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 89518441182266330402876371052857585157326990617012633689825519686550432446129 | 1671 |
UVM_ERROR @ 254924868 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 254924868 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 3687711174375533438888738179057075901220524224465753080041281071178712732867 | 7690 |
UVM_ERROR @ 639717815 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 639717815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 19756091683087765611904823532755466640416184155611164487043666737124488553425 | 1166 |
UVM_ERROR @ 194178287 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 194178287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 10670630365600027001667284197949983327771978374941349024044624044514700513800 | 12493 |
UVM_ERROR @ 410289915 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 410289915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 63177249478214074182286594747149260964447268304756856282195211179871812596774 | 6271 |
UVM_ERROR @ 522945073 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 522945073 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 114696052593676349752631831988431900663054557089026917265591673755159924667265 | 5555 |
UVM_ERROR @ 504586026 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 504586026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 80682890198944133810947345562517646967545261497754645767521939898756841280996 | 11185 |
UVM_ERROR @ 1235525964 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1235525964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 32890147264208588971626295677854892655209808785630045597048803096581612797387 | 4089 |
UVM_ERROR @ 160621791 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 160621791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 110295961154077528232209916204720861702808096522753069632156292413903339203832 | 6302 |
UVM_ERROR @ 5426117883 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5426117883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 97302872885833924366618240688239253400952764834284281595043806405217866738162 | 4100 |
UVM_ERROR @ 276926289 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 276926289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 21516699010216768452660644752066015567455242810559354524630072282132281819176 | 5857 |
UVM_ERROR @ 1249143471 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1249143471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 52046238030203945044633666052071366165493554252893179090228680125282412806744 | 5883 |
UVM_ERROR @ 3088104591 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3088104591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 36417984113320188390858286544544290406061640946656801253745349037036551291717 | 7921 |
UVM_ERROR @ 465176621 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 465176621 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 87052530839455904025377034892669251017458481263741078728549016749067157992820 | 10372 |
UVM_ERROR @ 1942245455 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1942245455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 95473889800792255448172341072409611680573848582728224747631946585293500757196 | 3326 |
UVM_ERROR @ 977924420 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 977924420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 58177765170076673177669462527513211659938499107905861514948036715707257293274 | 8352 |
UVM_ERROR @ 7490252671 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 7490252671 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 33638935359756625245719352238574918451309859530351408368340482562070107629221 | 17859 |
UVM_ERROR @ 2639988280 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2639988280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 28719023579077265518212276356799327944369968643414398788383462246506232136279 | 9681 |
UVM_ERROR @ 4140921339 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 4140921339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr | ||||
| otp_ctrl_test_access | 7167773607217091809853009272283360641555063136274528164963603650049899544301 | 6968 |
UVM_ERROR @ 586320169 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 586320169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 48210137910359019368666117864569737071226349116021254713846235002132017187412 | 6802 |
UVM_ERROR @ 6404395996 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 6404395996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 88406335527957235618630577394401840875982679010832122586976585455871637940238 | 11417 |
UVM_ERROR @ 1487187778 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1487187778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 77106572089408926806994045512905650215631007608364578807024139913329148397323 | 8222 |
UVM_ERROR @ 381871000 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 381871000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 8709180048541416329475223565829642258962566507858303767799403250120759458263 | 24624 |
UVM_ERROR @ 8492436515 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 8492436515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 31225881632604558583132541726438396339277017869685978553580918219842727227077 | 12788 |
UVM_ERROR @ 351805137 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 351805137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 91483837095574255701237321561564163832319971345629398948834323132204724758478 | 7778 |
UVM_ERROR @ 611797901 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 611797901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 8182797684051328464925377226189272575456605233318782904788432475826618186573 | 22078 |
UVM_ERROR @ 3840607179 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 3840607179 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 27559025423097544794733357287400503759540500346293443557454842311356989199319 | 2840 |
UVM_ERROR @ 1127416081 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1127416081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 24420031216140335768973847984349454667569803343273373522869574689230418562711 | 10156 |
UVM_ERROR @ 11389149085 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 11389149085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 89734930869700650749147045761275515899267068226320117641097980002665493454135 | 12679 |
UVM_ERROR @ 533882116 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 533882116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 20473361969003148382123292483315329466150832050221280958519045885127259488797 | 6077 |
UVM_ERROR @ 7346258306 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 7346258306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 105228288728211051749313600366417722670648591359178243447574079386231335263510 | 6062 |
UVM_ERROR @ 203927502 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 203927502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 35841326805223496368986552785469413600335084874572736860246728238709245661496 | 12911 |
UVM_ERROR @ 14286557753 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 14286557753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 41038948068024664938975060061814099144319689398447524817784398169495871276329 | 9692 |
UVM_ERROR @ 958332386 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 958332386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 113634890602660205189026843282400115708985562850801535179702933253345811222266 | 10295 |
UVM_ERROR @ 991841375 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 991841375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 90980298379491511198764877177943719262838661849562002940801737340129850532858 | 6790 |
UVM_ERROR @ 1580763199 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1580763199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 18459772669563862473068132173549593542138431224174453041352541633131053695402 | 15095 |
UVM_ERROR @ 2856538604 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2856538604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 101429696818532843095984972165316606263460023345924816821186027842483328841655 | 14389 |
UVM_ERROR @ 1055113966 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1055113966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 57384401449862876283823154291159872731585694524492628156905527078956134241841 | 15320 |
UVM_ERROR @ 483092382 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 483092382 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 65225763400430382590444045497139841148623392041095108335987961200834685371560 | 16501 |
UVM_ERROR @ 5011074293 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 5011074293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 47752003715457808092650970655136211799792117600785464143422273540565771640758 | 11315 |
UVM_ERROR @ 2635038384 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2635038384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 38854249426122256503820696982102142384681520224884626613109374896208753841045 | 9260 |
UVM_ERROR @ 253109402 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 253109402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 27084925121042169996086483628125298549938997391414715463753731270842000813460 | 3443 |
UVM_ERROR @ 1839456332 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1839456332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 110600615224152087038580831007924775077562069847159649372459669446234459613944 | 7005 |
UVM_ERROR @ 245434674 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 245434674 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 94575334114830731659168178615043567899940500051225306246090590630212663415593 | 19000 |
UVM_ERROR @ 1032889984 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1032889984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 4761399933508521154205962541948717789053838184884467935067042302264216504437 | 12803 |
UVM_ERROR @ 895315055 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 895315055 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 94450729324177969837891075294061522463119718692990183406906265609705045118358 | 37846 |
UVM_ERROR @ 2593146134 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2593146134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 71637164404305027986903899822509982357718259941752844555807987302415722778240 | 13381 |
UVM_ERROR @ 2341359584 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2341359584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 98420677324139154954660589927974144089461135786532064457984428661717036434304 | 15852 |
UVM_ERROR @ 1501440306 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1501440306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 18846100753597938205979867978990724391152715506906752998009093994545341053646 | 1595 |
UVM_ERROR @ 549659140 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 549659140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 32510944579623830747222889822974524844378198955991512591403947217051598667470 | 1174 |
UVM_ERROR @ 166656175 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 166656175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_scoreboard.sv:353) scoreboard [scoreboard] alert fatal_macro_error did not trigger max_delay:* | ||||
| otp_ctrl_macro_errs | 19375250237398845555822893251688692959122134646956847400099044133257273245975 | 10963 |
UVM_ERROR @ 2325120220 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 2325120220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 82753700356364911255078807485427583331922395617279809981904072834902678834091 | 1046 |
UVM_ERROR @ 203603599 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 203603599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 35746183277661686257205608038668699658255365840619735726224455842080565702222 | 6738 |
UVM_ERROR @ 2137788375 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 2137788375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 27383642770062307983251139715178876408659212514272119856209212349028807073364 | 478 |
UVM_ERROR @ 632861366 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 632861366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 3349122607972300878993719692849130717239935502077966227052464708683186423976 | 4959 |
UVM_ERROR @ 846760017 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 846760017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1308) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger! | ||||
| otp_ctrl_init_fail | 92997359527976368192480101167340426702096718642644360442960945587620561855778 | 1671 |
UVM_ERROR @ 2495434448 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 2495434448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 108919520342028009678887690386037211295944973196382460018258065452908000419435 | 1405 |
UVM_ERROR @ 101118788 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 101118788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 33968579669398526801759724205683917674270504300740765076781788241273099728972 | 1651 |
UVM_ERROR @ 1630340553 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1630340553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 104635718449200684770152218321799130116762774208260995834607417892480879808288 | 2799 |
UVM_ERROR @ 321898606 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 321898606 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 97945068187589856071096255288720694612251545198667964582576169257345973090648 | 1525 |
UVM_ERROR @ 1449799795 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1449799795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 106113055834735706684523499009499457175588600930524238168813635896467295361907 | 1255 |
UVM_ERROR @ 235453154 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 235453154 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 29248528801181664775805673508892175693785716020346698357158444468255998581499 | 3379 |
UVM_ERROR @ 1771446420 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1771446420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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|