Simulation Results: gpio

 
19/12/2025 17:08:41 sha: cab660a json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.49 %
  • code
  • 92.63 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 98.38 %
  • cond
  • 95.68 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
100.00%
V2
98.11%
V2S
95.56%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.760s 79.329us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.990s 378.478us 50 50 100.00
gpio_smoke_en_cdc_prim 1.530s 200.675us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.510s 154.153us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 1.170s 28.416us 5 5 100.00
csr_rw 20 20 100.00
gpio_csr_rw 1.130s 124.581us 20 20 100.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 5.860s 210.558us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 2.130s 69.206us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.860s 33.222us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
gpio_csr_rw 1.130s 124.581us 20 20 100.00
gpio_csr_aliasing 2.130s 69.206us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.750s 254.407us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.700s 73.781us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.390s 43.628us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.920s 622.692us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 4.310s 500.944us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 4.230s 95.924us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 32.160s 4126.352us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 6.690s 1849.943us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.560s 94.681us 50 50 100.00
stress_all 50 50 100.00
gpio_stress_all 159.770s 14817.988us 50 50 100.00
alert_test 50 50 100.00
gpio_alert_test 0.960s 45.247us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.930s 27.441us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 3.050s 223.165us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 3.050s 223.165us 20 20 100.00
tl_d_outstanding_access 43 50 86.00
gpio_csr_rw 1.130s 124.581us 20 20 100.00
gpio_same_csr_outstanding 1.630s 56.400us 13 20 65.00
gpio_csr_aliasing 2.130s 69.206us 5 5 100.00
gpio_csr_hw_reset 1.170s 28.416us 5 5 100.00
tl_d_partial_access 43 50 86.00
gpio_csr_rw 1.130s 124.581us 20 20 100.00
gpio_same_csr_outstanding 1.630s 56.400us 13 20 65.00
gpio_csr_aliasing 2.130s 69.206us 5 5 100.00
gpio_csr_hw_reset 1.170s 28.416us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 24 25 96.00
gpio_sec_cm 1.580s 100.450us 5 5 100.00
gpio_tl_intg_err 3.150s 493.209us 19 20 95.00
sec_cm_bus_integrity 19 20 95.00
gpio_tl_intg_err 3.150s 493.209us 19 20 95.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 50 50 100.00
gpio_rand_straps 0.970s 22.626us 50 50 100.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 19.980s 1060.195us 0 50 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.970s 14.440us 50 50 100.00

Error Messages

   Test seed line log context
UVM_FATAL (cip_base_vseq.sv:1163) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 3587960723056380623462500066459227116125469953498911221950139494800623378110 77
UVM_FATAL @ 4435681 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4435681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 38163206849475927849397772111657199681863007447233924938225424603617452899549 77
UVM_FATAL @ 8508237 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8508237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104446933804232954122367989037084164985885125711485886536871438056711465529813 114
UVM_FATAL @ 1604637592 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1604637592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 39115094795677046565310509709487734662309132390185429285356124855498598856735 80
UVM_FATAL @ 868785122 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 868785122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 71802797784881453425134722349627268722387781934087460914211792976918786442537 77
UVM_FATAL @ 11256221 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 11256221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104392588518720417334336097056483698592307439111649118228183104764128410312299 77
UVM_FATAL @ 8529326 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8529326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 33809571841900477545973329049139077463859350418040134790418676762759867543702 77
UVM_FATAL @ 2664507 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2664507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 78175512495062058614030967961236634577856138410641528081118598041783579978963 77
UVM_FATAL @ 2536733 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2536733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 55384798171871330496633879912174733799371986139303508583927407141114729738855 77
UVM_FATAL @ 13919173 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 13919173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 97943002173346813224248057333299573881588217716532724757381718477811905039595 77
UVM_FATAL @ 59031732 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 59031732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45542200089448430865123114994166742490461759351371527804462961248112969431848 131
UVM_FATAL @ 123547322 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 123547322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 58093899924300947169033248404705766127955338476407214395299166335679675767921 317
UVM_FATAL @ 3161523938 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3161523938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 77805379454923117089050230098253189083820183591302099867776854523948726782963 251
UVM_FATAL @ 2263781840 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2263781840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 7159094874902883518910365393079658766640875282988363191463870746023269215500 77
UVM_FATAL @ 1772650 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1772650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 103560540439200656508921141457385096491809231880748344509286253569738225787592 327
UVM_FATAL @ 737769387 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 737769387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 106931146444857589423191038381518447005959454424495152350800992067278466645738 151
UVM_FATAL @ 2926938788 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2926938788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 88766871776033264110170710690320530569075243331660028898381240711287679689141 77
UVM_FATAL @ 1523135 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1523135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 56640598439243772301402668241371198959230912028741234416172089564770707628263 285
UVM_FATAL @ 570620526 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 570620526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82140578413560602495977338504295149467115379823117156486548437028165228257715 306
UVM_FATAL @ 1461156045 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1461156045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 22067760075644338885783768992698936817649340267001132629070729799599416586396 77
UVM_FATAL @ 20046394 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 20046394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 49682856427753287278837429252196898456220451013091163517864250648956914981075 77
UVM_FATAL @ 2654024 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2654024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 6033093103638812134288637125750345632082359757455010396566594180892245304408 77
UVM_FATAL @ 298696994 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 298696994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 53491534725202780231335587588400535900481996312341271360842158638943958272291 77
UVM_FATAL @ 5054951 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5054951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 9638217325956135250831799981503647387285196538630279945477583090905598590438 81
UVM_FATAL @ 360294871 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 360294871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 41508654120923026593203214036717963689056190808104522946004998867999871018078 106
UVM_FATAL @ 972505470 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 972505470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 73072152021227982770410639275284638465845804578691796917359544113712956659090 265
UVM_FATAL @ 4099271488 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4099271488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 42857088244648658434994093071317091624904035815847300969610517128808613872904 77
UVM_FATAL @ 37109780 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 37109780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 594326637900418559986219949983564852775135103363162842361481079242525718712 77
UVM_FATAL @ 27364083 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 27364083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -*
gpio_stress_all_with_rand_reset 666967602754369413701106699440599903783227388607234197446698554731674789751 81
UVM_FATAL @ 201333424 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 201333424 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44646986105923543465976966258756836607450689314414768403246840565129453270706 78
UVM_FATAL @ 1572003642 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1572003642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 69505164785769817503687727399880980528392276008914500371747384540964219474510 193
UVM_FATAL @ 968129357 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 968129357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82093177732430029819330199901116816664622756425954767100099400924837388991429 75
UVM_FATAL @ 238094726 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 238094726 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 102198540003150684699675368151598607655719140771569665947287285669696797645321 75
UVM_FATAL @ 8816988 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 8816988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 76916052383253473206437161362434208696283982817367950168942619636268861842913 274
UVM_FATAL @ 418982469 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 418982469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 89759884937268048339364162472914724587019895642756325860089196002125946923734 307
UVM_FATAL @ 531898343 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 531898343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 79185586601101839747309814346805377683514740597215286110698441451576149988631 75
UVM_FATAL @ 1683762851 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1683762851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 83568970779207553493383389207849704299023533781793625189691366021269932132727 207
UVM_FATAL @ 709609983 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 709609983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 113514321903431110851048448982532164931768954548092917221027596021836504737243 264
UVM_FATAL @ 1421840776 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1421840776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 84891463340164854985960853697679564624885831041752607660721299560480260981799 501
UVM_FATAL @ 1060194609 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1060194609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 100518720435964106956336732551792401155925804928553699624758867764885862608900 75
UVM_FATAL @ 19956316 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 19956316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 79479711195002849243254516074799533477463494301595488767011717766488185924212 75
UVM_FATAL @ 6545633 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 6545633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82857428971783869094593292379340043333386859731401338654789480929123606620690 342
UVM_FATAL @ 1317771728 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1317771728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 72859647108212985118852059961450663102154161869715056062993800889309098520461 176
UVM_FATAL @ 136359942 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 136359942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 101544880905137633230666031406139960822139533025020586817316166296031397388094 75
UVM_FATAL @ 14633583 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 14633583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 62525097191171256070785548955721255066633078308889349076732474514233205985120 323
UVM_FATAL @ 361806946 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 361806946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16958969855915111285926926066362165847391015669887617984768571393773473900976 81
UVM_FATAL @ 672667136 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 672667136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 30534952401408762845694564081186296262975239079472357537801748203092797112020 252
UVM_FATAL @ 1296940124 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1296940124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23772037535257900418637779206363032290577809805389916171871728764998594389254 76
UVM_FATAL @ 266966771 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 266966771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 47070394408233830806808090939999106924357938013916855680558095187376929850172 101
UVM_FATAL @ 132001139 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 132001139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 80974712650701428396172538127607606080397042214402072457759703083347765253806 75
UVM_FATAL @ 1607677 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1607677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:642) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
gpio_same_csr_outstanding 25472396603695463498963657910361055631980579335630513119748859594705728613410 73
UVM_ERROR @ 18211370 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0xa915e084 read out mismatch
UVM_INFO @ 18211370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 81547877636445646563421830775167890116751823122179242829505214842677527911689 74
UVM_ERROR @ 53623043 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (11734020 [0xb30c04] vs 11734021 [0xb30c05]) addr 0xbbdcd050 read out mismatch
UVM_INFO @ 53623043 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 44937577295659984106013324801711467265585225071965336153412813526522738189532 74
UVM_ERROR @ 39190864 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (14437120 [0xdc4b00] vs 14437121 [0xdc4b01]) addr 0xa9a64c54 read out mismatch
UVM_INFO @ 39190864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 90839823593585361519351661656382883111736285131211586457748971738126432135658 74
UVM_ERROR @ 13492228 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (10677764 [0xa2ee04] vs 10677765 [0xa2ee05]) addr 0x8ddee75c read out mismatch
UVM_INFO @ 13492228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 32676586210822181245249102589194481842062676085644258090815659347913932854862 74
UVM_ERROR @ 13093986 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (3361796 [0x334c04] vs 3361797 [0x334c05]) addr 0x8f721a4c read out mismatch
UVM_INFO @ 13093986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 90990712731331528088999146244109692598453968601187224906988286652497166210509 74
UVM_ERROR @ 75396999 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x50e6596c read out mismatch
UVM_INFO @ 75396999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 2061467261155497223146781888137193533380026779008026792461865434047210819332 74
UVM_ERROR @ 27513428 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (9772036 [0x951c04] vs 9772037 [0x951c05]) addr 0x41259660 read out mismatch
UVM_INFO @ 27513428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_*.enable reset value: *
gpio_tl_intg_err 33218762985616571537982883885580817118631677715322947206096002802540303037785 177
UVM_ERROR @ 36360363 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_2.enable reset value: 0x0
UVM_INFO @ 36360363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---