Simulation Results: otp_ctrl

 
19/12/2025 17:08:41 sha: cab660a json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.45 %
  • code
  • 80.90 %
  • assert
  • 94.31 %
  • func
  • 84.15 %
  • line
  • 88.47 %
  • branch
  • 86.08 %
  • cond
  • 87.11 %
  • toggle
  • 89.89 %
  • FSM
  • 52.93 %
Validation stages
V1
92.20%
V2
67.86%
V2S
79.19%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.370s 107.161us 1 1 100.00
smoke 43 50 86.00
otp_ctrl_smoke 21.130s 8782.731us 43 50 86.00
csr_hw_reset 5 5 100.00
otp_ctrl_csr_hw_reset 4.920s 1673.448us 5 5 100.00
csr_rw 20 20 100.00
otp_ctrl_csr_rw 3.220s 801.544us 20 20 100.00
csr_bit_bash 5 5 100.00
otp_ctrl_csr_bit_bash 12.160s 3682.488us 5 5 100.00
csr_aliasing 5 5 100.00
otp_ctrl_csr_aliasing 10.880s 737.484us 5 5 100.00
csr_mem_rw_with_rand_reset 16 20 80.00
otp_ctrl_csr_mem_rw_with_rand_reset 4.900s 130.896us 16 20 80.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
otp_ctrl_csr_rw 3.220s 801.544us 20 20 100.00
otp_ctrl_csr_aliasing 10.880s 737.484us 5 5 100.00
mem_walk 5 5 100.00
otp_ctrl_mem_walk 2.450s 64.204us 5 5 100.00
mem_partial_access 5 5 100.00
otp_ctrl_mem_partial_access 2.270s 82.317us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 0 1 0.00
otp_ctrl_partition_walk 244.790s 80930.050us 0 1 0.00
init_fail 200 300 66.67
otp_ctrl_init_fail 7.440s 2366.742us 200 300 66.67
partition_check 18 60 30.00
otp_ctrl_background_chks 17.710s 16095.299us 1 10 10.00
otp_ctrl_check_fail 26.940s 14492.407us 17 50 34.00
regwen_during_otp_init 29 50 58.00
otp_ctrl_regwen 12.740s 1067.636us 29 50 58.00
partition_lock 21 50 42.00
otp_ctrl_dai_lock 30.520s 6658.660us 21 50 42.00
interface_key_check 21 50 42.00
otp_ctrl_parallel_key_req 46.370s 12316.637us 21 50 42.00
lc_interactions 206 250 82.40
otp_ctrl_parallel_lc_req 32.130s 11959.265us 27 50 54.00
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
otp_dai_errors 43 50 86.00
otp_ctrl_dai_errs 121.490s 42460.804us 43 50 86.00
otp_macro_errors 16 50 32.00
otp_ctrl_macro_errs 54.570s 30249.937us 16 50 32.00
test_access 20 50 40.00
otp_ctrl_test_access 47.980s 9136.916us 20 50 40.00
stress_all 1 50 2.00
otp_ctrl_stress_all 151.880s 47748.510us 1 50 2.00
intr_test 50 50 100.00
otp_ctrl_intr_test 3.200s 622.517us 50 50 100.00
alert_test 50 50 100.00
otp_ctrl_alert_test 5.100s 439.992us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
otp_ctrl_tl_errors 7.320s 873.151us 20 20 100.00
tl_d_illegal_access 20 20 100.00
otp_ctrl_tl_errors 7.320s 873.151us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
otp_ctrl_csr_hw_reset 4.920s 1673.448us 5 5 100.00
otp_ctrl_csr_rw 3.220s 801.544us 20 20 100.00
otp_ctrl_csr_aliasing 10.880s 737.484us 5 5 100.00
otp_ctrl_same_csr_outstanding 5.720s 139.413us 20 20 100.00
tl_d_partial_access 50 50 100.00
otp_ctrl_csr_hw_reset 4.920s 1673.448us 5 5 100.00
otp_ctrl_csr_rw 3.220s 801.544us 20 20 100.00
otp_ctrl_csr_aliasing 10.880s 737.484us 5 5 100.00
otp_ctrl_same_csr_outstanding 5.720s 139.413us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
tl_intg_err 23 25 92.00
otp_ctrl_tl_intg_err 30.300s 1504.106us 20 20 100.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
prim_count_check 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
prim_fsm_check 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_bus_integrity 20 20 100.00
otp_ctrl_tl_intg_err 30.300s 1504.106us 20 20 100.00
sec_cm_secret_mem_scramble 43 50 86.00
otp_ctrl_smoke 21.130s 8782.731us 43 50 86.00
sec_cm_part_mem_digest 43 50 86.00
otp_ctrl_smoke 21.130s 8782.731us 43 50 86.00
sec_cm_dai_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_kdi_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_lci_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_part_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_scrmbl_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_timer_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_dai_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_kdi_seed_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_kdi_entropy_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_lci_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_part_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_scrmbl_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_timer_integ_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_timer_cnsty_ctr_redun 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_timer_lfsr_redun 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_dai_fsm_local_esc 182 205 88.78
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_lci_fsm_local_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
sec_cm_kdi_fsm_local_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
sec_cm_part_fsm_local_esc 195 250 78.00
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
otp_ctrl_macro_errs 54.570s 30249.937us 16 50 32.00
sec_cm_scrmbl_fsm_local_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
sec_cm_timer_fsm_local_esc 182 205 88.78
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_dai_fsm_global_esc 182 205 88.78
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_lci_fsm_global_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
sec_cm_kdi_fsm_global_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
sec_cm_part_fsm_global_esc 195 250 78.00
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
otp_ctrl_macro_errs 54.570s 30249.937us 16 50 32.00
sec_cm_scrmbl_fsm_global_esc 179 200 89.50
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
sec_cm_timer_fsm_global_esc 182 205 88.78
otp_ctrl_parallel_lc_esc 47.590s 3973.847us 179 200 89.50
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_part_data_reg_integrity 200 300 66.67
otp_ctrl_init_fail 7.440s 2366.742us 200 300 66.67
sec_cm_part_data_reg_bkgn_chk 17 50 34.00
otp_ctrl_check_fail 26.940s 14492.407us 17 50 34.00
sec_cm_part_mem_regren 21 50 42.00
otp_ctrl_dai_lock 30.520s 6658.660us 21 50 42.00
sec_cm_part_mem_sw_unreadable 21 50 42.00
otp_ctrl_dai_lock 30.520s 6658.660us 21 50 42.00
sec_cm_part_mem_sw_unwritable 21 50 42.00
otp_ctrl_dai_lock 30.520s 6658.660us 21 50 42.00
sec_cm_lc_part_mem_sw_noaccess 21 50 42.00
otp_ctrl_dai_lock 30.520s 6658.660us 21 50 42.00
sec_cm_access_ctrl_mubi 21 50 42.00
otp_ctrl_dai_lock 30.520s 6658.660us 21 50 42.00
sec_cm_token_valid_ctrl_mubi 43 50 86.00
otp_ctrl_smoke 21.130s 8782.731us 43 50 86.00
sec_cm_lc_ctrl_intersig_mubi 21 50 42.00
otp_ctrl_dai_lock 30.520s 6658.660us 21 50 42.00
sec_cm_test_bus_lc_gated 43 50 86.00
otp_ctrl_smoke 21.130s 8782.731us 43 50 86.00
sec_cm_test_tl_lc_gate_fsm_sparse 3 5 60.00
otp_ctrl_sec_cm 348.600s 200000.000us 3 5 60.00
sec_cm_direct_access_config_regwen 29 50 58.00
otp_ctrl_regwen 12.740s 1067.636us 29 50 58.00
sec_cm_check_trigger_config_regwen 43 50 86.00
otp_ctrl_smoke 21.130s 8782.731us 43 50 86.00
sec_cm_check_config_regwen 43 50 86.00
otp_ctrl_smoke 21.130s 8782.731us 43 50 86.00
sec_cm_macro_mem_integrity 16 50 32.00
otp_ctrl_macro_errs 54.570s 30249.937us 16 50 32.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 0 1 0.00
otp_ctrl_low_freq_read 106.930s 46074.125us 0 1 0.00
stress_all_with_rand_reset 0 100 0.00
otp_ctrl_stress_all_with_rand_reset 32.710s 11844.581us 0 100 0.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:605) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *
otp_ctrl_csr_mem_rw_with_rand_reset 28594314752353291806184866074721927500603501897862139455780349434498769650068 88
UVM_ERROR @ 119154855 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 119154855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 78072056553566614497174944407240887181726401616446387782085189084508429754383 94
UVM_ERROR @ 1131413193 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1131413193 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 27660996486344044609523862142160641975311309046531851449861777269410341762712 88
UVM_ERROR @ 30649705 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30649705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_csr_mem_rw_with_rand_reset 8611929196994896819120872245986399614251721624987938260650820017384561098707 88
UVM_ERROR @ 30650887 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30650887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 112262540992087524900750725943757843858209207390187647608373915239412833765903 212
UVM_ERROR @ 912117999 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 912117999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 103381180990557007361649381134460291451224498682736101778438983316060834007803 88
UVM_ERROR @ 68319785 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 68319785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 427585527083200371467297796703414214781742641308815648495985306500062423699 99
UVM_ERROR @ 30785439 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30785439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 11129639952831192312332937148460921633318310022986228572049334970451994455490 88
UVM_ERROR @ 57027428 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 57027428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 57333001958584305687494458363820291059030165731174693915059998393971873425165 89
UVM_ERROR @ 501573542 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 501573542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 43342684572549024539283439794924311849627786965356294802177317337549994760679 256
UVM_ERROR @ 92623601 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 92623601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 53682740313120690553243474783327739990711303884715115600853310579635614721685 88
UVM_ERROR @ 40542738 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 40542738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 2200822771688733565575695829984737477587987119574969699920166670964603354446 97
UVM_ERROR @ 33167097 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33167097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 32101408681677212084117297639610716454734501639460704088799534826472785578444 92
UVM_ERROR @ 33455363 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33455363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 11803838981064812844977367113429778139780756442897687266579863731272721293621 88
UVM_ERROR @ 41806405 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 41806405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 71770968969162030242826816393994841317185308437790184780016357748269414472703 91
UVM_ERROR @ 31937893 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31937893 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 15725029220228241547167848856711807954001763626499225478036116163107743608658 90
UVM_ERROR @ 120608870 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120608870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 5551191615945410676356311700342291472770167089771599642853518778664345265704 6406
UVM_ERROR @ 1333059194 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1333059194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12379379726184579482237714801473639510322640826737007710442981583422524829963 194
UVM_ERROR @ 194315834 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 194315834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 39471020086924374494961041406328208905950932851748576517717720361020381322485 90
UVM_ERROR @ 61518261 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 61518261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 29025340293758174533224178415030894013432232109184078517169398882470609286561 207
UVM_ERROR @ 243533607 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 243533607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 29256320628024920515691373286907061020447425210079232710529729717284586574541 800
UVM_ERROR @ 15355383525 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 15355383525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 73631235315347711016874131770873645969853501036954049838409411914771411392852 89
UVM_ERROR @ 31494615 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31494615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 2886083187668764090320144345064711539627107503275727271285523395146568647361 95
UVM_ERROR @ 121134787 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 121134787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 35269558255644549332173481638176745164255445782339128098639958888641080335932 88
UVM_ERROR @ 126931234 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 126931234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 74069880873266571463461787454324160012929734845909447380358287170470094634395 97
UVM_ERROR @ 63237648 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63237648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 1147897353522926957900064613718782854489136197940380314129644439279979040333 88
UVM_ERROR @ 32657879 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32657879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 68420411602356261070699953021612788655944153807402936853026062363043026904604 97
UVM_ERROR @ 508928347 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 508928347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 64842653647961840217602278350728686466709281171757657842483215763963158666815 2555
UVM_ERROR @ 553031622 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 553031622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 14062408337964633007357493806525947119550689288071734010536255594624166693832 497
UVM_ERROR @ 1342771150 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1342771150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 89304561540012960738500740740720696590700725679183966525827929807080454524292 95
UVM_ERROR @ 512666455 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 512666455 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 64920200458300307540077346347275238735838664789129173565922144823511932526026 101
UVM_ERROR @ 128603352 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 128603352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 27031027234670667516303304236843921018445679614062317145918569924901320183251 88
UVM_ERROR @ 31165048 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31165048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 36770137234202587855858790575811219305790300593805489203361335380754733304555 88
UVM_ERROR @ 32085470 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32085470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 18642945083866257320816453586326130288372931431206637889606817651145455012327 197
UVM_ERROR @ 125487497 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125487497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 689959507779767854506900490724378990411583780827451950938368929859111087257 88
UVM_ERROR @ 535976659 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 535976659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49416543626010759299798412227734365781243358730565987640713328262091776134226 88
UVM_ERROR @ 76322110 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 76322110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 54541913322222643433390972479277458258251041247607033216906881041902519379101 91
UVM_ERROR @ 31930562 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31930562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 27396665271348131482451624816848488068810920993849349845775563216838615846307 88
UVM_ERROR @ 40896542 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 40896542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 61715296015642889348098387665591685467293386250129130028512696933086431053754 97
UVM_ERROR @ 53795921 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 53795921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 31638495499510661221537471942608020145907803099949572961434407768033683761098 89
UVM_ERROR @ 70875477 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 70875477 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 91724376864061487619943757018260159062224043442780133686309666213902775423698 88
UVM_ERROR @ 67251911 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 67251911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 4468819575484599236864224046004887712057421319643732023375014891357228008745 103
UVM_ERROR @ 122369653 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 122369653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 72148908780153128088069572085239863418896855543794301138957185313180613538239 93
UVM_ERROR @ 125800693 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125800693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 55745159798302492790554684014662396688067092898848230924295624868862821468454 88
UVM_ERROR @ 120083291 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120083291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 83333672731636517111691816754876413770210829949120966002380902647343043903815 88
UVM_ERROR @ 547126394 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 547126394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 113989781456835421086554003114461753375970955064092311160981259857624475159117 88
UVM_ERROR @ 125324002 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125324002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 96373052568902392245263737842268385452909667374190582935506140014852626202114 91
UVM_ERROR @ 67820739 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 67820739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 81159849803907014961612694882307896784008927565674220606482414892398647997070 88
UVM_ERROR @ 120543164 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120543164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 33467926141388237363023993069464281204382751331913587649421957267107035170867 93
UVM_ERROR @ 62029291 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62029291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 13960126376635165384438384006050580401397617117279960536531021999955910047032 89
UVM_ERROR @ 40167388 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 40167388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 20782376319816313447743210207971861528686586413533069604272208954656698401250 197
UVM_ERROR @ 277380784 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 277380784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 90075568905646346674183229055514940833371076439394635776921453850515636967581 88
UVM_ERROR @ 34704546 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34704546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 30569410473133883488408517077443585647082319382235292430944198031647408884156 88
UVM_ERROR @ 130682692 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 130682692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 106265165946704227312796573382058806519876409501416688107288392730107329957922 104
UVM_ERROR @ 36180466 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 36180466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 12270778746699397454932947245856500813973968935896362893477395920711083924079 97
UVM_ERROR @ 95010297 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 95010297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 115289828364130306732843665872193193653602627016679469496939638334740351486975 91
UVM_ERROR @ 31848751 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31848751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 115309158716754351285978381145053629787928597238470255942435193409012343989900 88
UVM_ERROR @ 45364102 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 45364102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 38116193439522423587034714742121529575575091675067845734921552540194946971187 97
UVM_ERROR @ 65240175 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 65240175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 41863522141051535669545518518032738426519267107870114738197588190005301361787 95
UVM_ERROR @ 64308249 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 64308249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 17033872499502318708953611904508918317413242668020234317319349357846753456583 88
UVM_ERROR @ 74197915 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 74197915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 34862263547485671918841994287388635884062733044608613608097482877667753333810 101
UVM_ERROR @ 31543926 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31543926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 86160228290164802156657455276137842615016626533780115481170328750618201447487 88
UVM_ERROR @ 499459769 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 499459769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 9548581337124013415169996907149137148960700099693065457273514340464898240603 89
UVM_ERROR @ 60987587 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 60987587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 63743588803834693682626415158343863933286397756773299911029571752210093371570 92
UVM_ERROR @ 120772162 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120772162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 72256382785111661460931828611906548670714463268144572733964835840533139418039 89
UVM_ERROR @ 54558756 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 54558756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 82382844064803200204369275252947064237987056700123716455368590126553396449691 91
UVM_ERROR @ 505886160 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 505886160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 73318201987658629392117003812211247578826637833736592753278397051247777875540 88
UVM_ERROR @ 62279325 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62279325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 102554788607229055988397802716430715350765730776503336986688795285889834698854 242
UVM_ERROR @ 11844580855 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 11844580855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 13361576907727117038071679211338983125568504969677202054342138692543624889582 100
UVM_ERROR @ 36425007 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 36425007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 65092862763200994606997241161026164684378984691416779771024022078297063088209 95
UVM_ERROR @ 45975368 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 45975368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 68924643795228253326197387676209104599030226709845394738537444282348545964465 100
UVM_ERROR @ 31735475 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31735475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 32078267300834637327860135348921315719228913585407002334864045683427083793906 89
UVM_ERROR @ 48459092 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 48459092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 94559617935400239849043427915896029030518850748451434002454328971309832620257 88
UVM_ERROR @ 51107713 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 51107713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 29094662739867752037981778271399076021767620115221831505741425072515613180984 92
UVM_ERROR @ 30647290 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30647290 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 19073042199103428168655043740243268998083579921952819436829379949053372199343 242
UVM_ERROR @ 264466586 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 264466586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 34665571592816216970609294869666468976233241965180753380461765269743654262710 92
UVM_ERROR @ 33106063 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33106063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 26412009319569727306547062721062727242327712233222068385388422614683969170264 88
UVM_ERROR @ 34543142 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34543142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 29975217874735291989985820501744245033677758461347374114320317265184439596603 95
UVM_ERROR @ 32718416 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32718416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 56134965817429804067541641667491728502908923750656989927408438995351457584945 137
UVM_ERROR @ 38678684 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 38678684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 114802464904600476846612593217165275293663710819289251092897736319725815332950 88
UVM_ERROR @ 62695786 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62695786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 56995350918343264372178021151469790565336147924287470262325669978915296285242 89
UVM_ERROR @ 64419267 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 64419267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 100136868023557749234687090634206087530451506939468300791241677115197165071202 89
UVM_ERROR @ 501530258 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 501530258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 46920162611861769148566349950546302491872924745559946042793329342450240423384 95
UVM_ERROR @ 35379828 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 35379828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 15732472643033703888314489369034379530256964877408686807302405490622583277903 196
UVM_ERROR @ 68597752 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 68597752 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 111241350760862016225383972895584129839861655756741392804100078586781311171912 89
UVM_ERROR @ 33297611 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33297611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 82671763611195099240255936064314140587372385966824082878767027966823027294571 91
UVM_ERROR @ 127497615 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 127497615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 67017432782837831153090096857205479531846140051508144282258177696261322226424 201
UVM_ERROR @ 244097458 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 244097458 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 66907858585346318821702449752527103311721178537784120605267554398459099763957 107
UVM_ERROR @ 32628317 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32628317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 79487683652000058076913579735363955666265115702998530421165312884304727142054 93
UVM_ERROR @ 66327713 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 66327713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 68390897092904529344776031478306985394373448744615537709984643528614909686247 96
UVM_ERROR @ 506750268 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 506750268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 61062711224964983469514246298324660214851946948589737149042926143787386505685 89
UVM_ERROR @ 60726852 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 60726852 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 74218647807958536084355981681371445072614029024723523721097832142039779263234 88
UVM_ERROR @ 63533678 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63533678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 45637222750073244959016306759662747782530601417755826914570335883726178298687 97
UVM_ERROR @ 31944385 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31944385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 21161743112313578262759017131747646648127404848301976369149993013115200083843 89
UVM_ERROR @ 31850781 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31850781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 74714406960688192612764885572303201810050817444301498493159652118008433190766 89
UVM_ERROR @ 499310705 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 499310705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 90288589545556129677950369827411051249126839618775116204935480358120679753004 89
UVM_ERROR @ 62530475 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62530475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 10370316700725070764227593064197800268505091102984376908017532322091453154044 90
UVM_ERROR @ 125816876 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125816876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 42911659579344714664573830425350416953589547368636776180832618756519056409219 88
UVM_ERROR @ 499969755 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 499969755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 101550671884673628689029593696279910372104084398493366508267753858166220149301 93
UVM_ERROR @ 64823085 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 64823085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch
otp_ctrl_partition_walk 30043864203915216789949001044909208094116509702186412405950359086019673216667 120634
UVM_ERROR @ 80930049970 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_partition_walk_vseq] Check failed rdata0 == exp_data0 (0 [0x0] vs 16080 [0x3ed0]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 80930049970 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch
otp_ctrl_low_freq_read 109628836826558040189323205674512477430692289130246817617683982098088016826778 86
UVM_ERROR @ 46074124786 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 46074124786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 28642105217685765113088070217946512552564839509226596942518592439470755250259 5791
UVM_ERROR @ 23331422194 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 23331422194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 73082021885143621744771205615929559572055010900577090021394975215311434769435 87
UVM_ERROR @ 22339297507 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22339297507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 3471110429570338153151692222336141092617689155843305919028480175530365924747 979
UVM_ERROR @ 54231113292 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 54231113292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 89820601094102823364235159529412258265141006731103944835357717054888365438815 87
UVM_ERROR @ 59221489862 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 59221489862 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 113400458091130105056252081696943426838011533234533552256733030880545163088284 87
UVM_ERROR @ 22364084071 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22364084071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 64065161124405784917019763637875134010722295034223648691374080244432067395453 38490
UVM_ERROR @ 47531103100 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 47531103100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 101275373769909383561364026039779013798462720802625275518792713418375545768460 42894
UVM_ERROR @ 47748510340 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 47748510340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 11177563065711191824679700273133485107356309604646082176996149560754637157365 3020
UVM_ERROR @ 65063558354 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 65063558354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 28932266989482848524482978510412701571170419013999532700579293228133795253450 17902
UVM_ERROR @ 23139332693 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 23139332693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1308) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger!
otp_ctrl_init_fail 27620364900066881672479986317469057843336718556712996596971618302934872852457 1407
UVM_ERROR @ 1759881068 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1759881068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 71958629836395442544449126507435176758598459096183491939354738829927636145822 1945
UVM_ERROR @ 272203031 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 272203031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 62735256173393403625900293389813312874342078534191556398455417289385206323523 1161
UVM_ERROR @ 1569269165 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1569269165 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 114271047378321597571855875821643979133360473003384309213928636100153328716629 1631
UVM_ERROR @ 1644197867 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1644197867 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 74097496958368459758524147281687478480303202281400895567135363745058545649593 1881
UVM_ERROR @ 1837910684 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1837910684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 45785174191675132967947398887166599135811556860228257353059631063093338188595 1281
UVM_ERROR @ 423631318 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 423631318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 80546264157964610185438054454791884181079808337819093045786196830875479066915 1423
UVM_ERROR @ 285319184 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 285319184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 113322893071007619945501576796661549122659358214921695817145137182830672092985 1473
UVM_ERROR @ 410490223 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 410490223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 53352575364724389268753394866665577947877536726412641204729868267022402560136 1701
UVM_ERROR @ 2312385214 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 2312385214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 114683359761291330982156303243265207947482197770640142711796035613991001216995 3463
UVM_ERROR @ 1421124856 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1421124856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 46424056385266144208680434771423637932972180799090022513345599805079318273115 1285
UVM_ERROR @ 438024132 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 438024132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 62809484113313708464347328632974283215419837606746211250917322315133901504068 1663
UVM_ERROR @ 259359006 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 259359006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 93018239483780273998768844652371328422759532825041861754147990253461253134006 1413
UVM_ERROR @ 1433446722 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1433446722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 101283322764848595426840283385911046739873202343010169818786728827917398544074 1671
UVM_ERROR @ 492839333 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 492839333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 98790689118692416345516211332249198597964709431427714833219309558990608699890 2057
UVM_ERROR @ 541061675 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 541061675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30432394084002254324787754317817166176459964296442181834452928908803850012998 1133
UVM_ERROR @ 1538482425 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1538482425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63472908972510441128451397725571630249643865014737272931953594053389642413687 2093
UVM_ERROR @ 472901584 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 472901584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_*
otp_ctrl_background_chks 64377810940868511773536376000966780060166203110551307099256262204928555036250 173
UVM_ERROR @ 241085603 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 241085603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 52287533191638767871796073288134697653430561513040128136592233575993958011002 627
UVM_ERROR @ 236522365 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 236522365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 101154613224560217296281467648366654660867967973780319299348042943531877289948 4223
UVM_ERROR @ 231619973 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 231619973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 108903059559967793674830904000910996660909267666629497227943030496557445084598 36196
UVM_ERROR @ 18462636312 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 18462636312 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 24286609944107962077784522426900608908085791281127716857456940986318539346872 1097
UVM_ERROR @ 125767382 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 125767382 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 101916574158905461332202665324140045155703040303459117524661797960337110849360 1933
UVM_ERROR @ 468965166 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 468965166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 26461867104557186389329950112203646319329528886543478431214864109541355300361 2487
UVM_ERROR @ 261254877 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 261254877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 47714390294791374245914270418394416934675735717375456855278747317202699037752 4281
UVM_ERROR @ 3091148418 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3091148418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 23006423787872794234679408155894191497408633238997043353391185730391822167375 1598
UVM_ERROR @ 304585539 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 304585539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 89284984790706615439107596653340659931507516680566852675106670398846407850190 2255
UVM_ERROR @ 77593158 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 77593158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 42155119752921519444000309451823124439358652479023595128685568671528220349439 160
UVM_ERROR @ 1315292698 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1315292698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 78935510469346754623775913077509287754293944867663623577295645625578057259063 1159
UVM_ERROR @ 396810380 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 396810380 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 5746844937458659448953372498800421136390397572354697577465966347432616782545 5456
UVM_ERROR @ 265538579 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 265538579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 98316987263834231079370761232274469254939911931735895870637610191625892450432 3624
UVM_ERROR @ 299760217 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 299760217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 24334054726812690155234414080000528085311152122457024859647883909386683028551 159
UVM_ERROR @ 123787185 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 123787185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 62120799516795317736892181367326737256598055707083546124680418959371414637332 11201
UVM_ERROR @ 903573761 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 903573761 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 93183778199229400289819268779516237987916232248662660948945217417303059836919 2571
UVM_ERROR @ 154403112 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 154403112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 5027874372451344601261945840458488136421455486488859611088896658338097597873 5740
UVM_ERROR @ 409411258 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 409411258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 17007197684613793488998945687429261721862166033563323406325351664227813535938 567
UVM_ERROR @ 250626242 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 250626242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 24371653089061076863403564267111307016068392648634943147937688195624949469669 183
UVM_ERROR @ 131130112 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 131130112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 51844072245114507947867212280520802808585024314695061441910396528524963508871 3475
UVM_ERROR @ 307944649 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 307944649 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_background_chks 103658567758300453606998667916884051377321950055375695616734721756722835733463 929
UVM_ERROR @ 49441209 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 49441209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 53021593100612631079899174052711068471244924588244799100169020293782743560762 157
UVM_ERROR @ 75950405 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 75950405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 21322323967844376519598491756448897562605182644291009649471284970495284137089 2929
UVM_ERROR @ 60590429 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 60590429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 98546507597755251186061091389526555507347664721510367984662413598428298034193 23557
UVM_ERROR @ 769456926 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 769456926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 27257467705140596652314825239411155763714674834925871189198583604707767215231 4282
UVM_ERROR @ 1221903496 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1221903496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 46924302504858097619402361556791965475870904532463994076467611684079955498581 2463
UVM_ERROR @ 359087583 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 359087583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 105618684705657449512797658685672519974594416443517089284729241703779094629346 6857
UVM_ERROR @ 219688390 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 219688390 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 87620642512820043034412631400714903531152113378038140040123561066547632919170 217
UVM_ERROR @ 327620103 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 327620103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 58520256148993125804665827898779081511877629732342083245279427880273946415528 403
UVM_ERROR @ 301656255 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 301656255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 44614048098395088671954592126958079967900672516581324542549467225359791507366 2959
UVM_ERROR @ 131150994 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 131150994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 63802438967884304592086831210479952377840310018999270951672920557639017633176 13560
UVM_ERROR @ 331733972 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 331733972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 15297844498049549833757651620900482814745865738022470204870706694849905724353 2006
UVM_ERROR @ 141012771 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 141012771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 78974725977436382649340486945681005435767483930068386991509640400060849999080 885
UVM_ERROR @ 262826609 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 262826609 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 86047565431295396802596403091199941496542287100508497669787586405193886032737 2653
UVM_ERROR @ 153368444 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 153368444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 111195168390349640812353632853891719116040533550184019952914595885352268004873 335
UVM_ERROR @ 56442754 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 56442754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 16860131327700272922498706340601801207396266044516481069905688771681659961788 1523
UVM_ERROR @ 117949283 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 117949283 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 110665924739787637677509135271158013702636647597008703581404525062846181341910 6376
UVM_ERROR @ 2353004874 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2353004874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 20356260049149863617769189348358782735730268207879352221289139384288175433584 6662
UVM_ERROR @ 196595872 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 196595872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 94670309311242017995618551428072141579724646069273333798784872455089054090722 10389
UVM_ERROR @ 598501399 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 598501399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 98230375018746165630979028146389580900629534158799718925621472895994788821413 4651
UVM_ERROR @ 326753121 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 326753121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 11060907841375834162298996084628473316693828044707030192133020276612116951067 827
UVM_ERROR @ 81964461 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 81964461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 72401321435659130098847157249596591581653354614988757040771366454612081053920 10093
UVM_ERROR @ 275233257 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 275233257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 62292225830943926373346005493794268224265267536909676875629801878288591298032 5722
UVM_ERROR @ 511395168 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 511395168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 76456985456772614170375602519041398414136287408136768148917421356296605243619 4663
UVM_ERROR @ 107335685 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 107335685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 43532852463092033109061615052971809445524505831589292260709809617639456827449 4380
UVM_ERROR @ 1201755291 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1201755291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 112568598379604149170558436932654621558989786021173947311368502468079055043527 3582
UVM_ERROR @ 990038308 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 990038308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 31591581033042779788918609359066052268376274528855712439974553326377826592693 4798
UVM_ERROR @ 251575329 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 251575329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 67710548780433279190296506590952717328676838514522839775699276916422373600117 403
UVM_ERROR @ 100483929 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 100483929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 47527482010476935434166904537444319872797966674644121904493184529131040009401 1699
UVM_ERROR @ 69859931 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 69859931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 43968542283765205757719434303474902639187379170664958494568861900679520040452 3429
UVM_ERROR @ 100900373 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 100900373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 9434275504840097929649315223390527743284555596587259493621669929213221513129 2021
UVM_ERROR @ 179236789 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 179236789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 11437345173048815863152408146462252592429899844798595575013425024172134247628 506
UVM_ERROR @ 126019943 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 126019943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 94590232394785950210801362576715705177234688905776317344703826420302353641962 211
UVM_ERROR @ 129990552 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 129990552 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 87923586145887095325425103297363799793777117446234716610686780977395079237303 3186
UVM_ERROR @ 1401753204 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1401753204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 66370352280384439347329722914293732981918500649378774788851652980882619326830 1365
UVM_ERROR @ 210660367 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 210660367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 37422170537310341249179313204105219236273349720344411185749579944521206684490 2449
UVM_ERROR @ 180850296 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 180850296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 113249752016289189538180034319263624948206738391181934555922832467172197552373 157
UVM_ERROR @ 1069860633 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1069860633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 86092349697744334011114012444352781717305926926358278469819516087038426013800 10288
UVM_ERROR @ 10104318549 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 10104318549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 4692464618020243809678559425304177171125384726728811881496970555202501602986 461
UVM_ERROR @ 624052454 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 624052454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 58352973894270297894629876661595869453173944857957585981509571553788668363997 16396
UVM_ERROR @ 1142025983 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1142025983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 51361767422848399358085716257774281656944787514064354991907155161244363937256 303
UVM_ERROR @ 147501690 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 147501690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 96760654038678331075639289262661752853236729702148517496426303397824202435886 14079
UVM_ERROR @ 1033608623 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1033608623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 41547914747514512669981805010979247612976412806784213394153876333204489177463 5915
UVM_ERROR @ 1834084046 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1834084046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 115557421514468460493688591159179087927662867617147287768096819855826038842695 1971
UVM_ERROR @ 2440809951 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2440809951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 57448498426616174692032450351420638533377541200350611627133347263273548113146 6147
UVM_ERROR @ 201761911 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 201761911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 84608240436461790221266928703164612527194984656902212610248629514354085061744 449
UVM_ERROR @ 85027045 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 85027045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 43668010319948169175521670980822010018820999597354692747600933126496265355687 16621
UVM_ERROR @ 3617255996 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3617255996 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 82452198451341538869998711258727436697630499233696055520746226833406539171989 833
UVM_ERROR @ 543228992 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 543228992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 96685760416803891535694648114929976934333842851507809477417994273558485947321 1699
UVM_ERROR @ 280499654 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 280499654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 98941931454269372594204475251840677231530279414975971611049975315562610035383 6290
UVM_ERROR @ 452849557 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 452849557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 66762705065194539257539761172089412604472154390574789391282822054178950834163 5727
UVM_ERROR @ 13373488711 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 13373488711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 49787705935699918384071382276911450619796381179547570606409862879950332764012 479
UVM_ERROR @ 127733429 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 127733429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 82320318229880910442697855523786720508797386829021427523326572661988199008009 1557
UVM_ERROR @ 97330277 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 97330277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 29920255837987421803397073103069683556548713861414275876478494757572646170384 7638
UVM_ERROR @ 6657624957 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6657624957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 54322907839033975091559237519985412506510528292348863354890185751887274524873 3175
UVM_ERROR @ 360532780 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 360532780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 101840005254829522398313081217594606041670378833831306327007064597076179240505 20081
UVM_ERROR @ 3196113924 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3196113924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 35317415705762245351782885940154512688259824489773641555472120233720081976065 2319
UVM_ERROR @ 254903816 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 254903816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 26995965275048796707125364535498835855833289721047787560126041542894983473046 17684
UVM_ERROR @ 4702498210 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4702498210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 74020841085702463577620883032902305561477210807063277037553667323382778664182 6956
UVM_ERROR @ 323909129 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 323909129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 73129881458474370826027606817213965700684793717062080773046547551667934392654 10751
UVM_ERROR @ 14492406527 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 14492406527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 81172987141553405849571912271310193851195674204090975063970047026970182762268 4838
UVM_ERROR @ 565128218 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 565128218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 100337153890164444486327235258976076261030264014380426358199444433272049076147 4507
UVM_ERROR @ 400567863 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 400567863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 104669358198591423630283830995230912253419499799006638284760167746504650724669 2369
UVM_ERROR @ 158556668 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 158556668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 83277589027186158649391556461487372251739288315402629364242474901322516920516 1953
UVM_ERROR @ 927156751 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 927156751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 90332798165861328665418026672576322874679065592087324078632718003751247804851 5386
UVM_ERROR @ 963695745 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 963695745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 2173410812813501192035024465375570424273366752408494504684106637293206831082 506
UVM_ERROR @ 142786351 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 142786351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 19808976312832319966896910716609346143431536252225717519749214467881714603578 157
UVM_ERROR @ 641934890 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 641934890 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 35275030913849723286305147624888833394027984585580464383760651776562036415320 1553
UVM_ERROR @ 176634176 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 176634176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 9851968173918141467344477669083570982379864247029020351050290333325567852485 1801
UVM_ERROR @ 2240967204 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2240967204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 76028230651435279378327148395570872631998928059990133046682984944118333272284 1151
UVM_ERROR @ 93322663 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 93322663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 11694656029551026765825943441676402251360790460653977864073585539272511265643 2209
UVM_ERROR @ 720217623 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 720217623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 63392056476671490198656358693898398091560944853348848623423325806167740130814 3007
UVM_ERROR @ 225859995 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 225859995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 5507279417217234306604319959303118447436760881579996012657785059237221609181 2923
UVM_ERROR @ 2299021884 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2299021884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 76879092545979172381645310346239202631010081950188398572486200001515787251959 6871
UVM_ERROR @ 1634729200 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1634729200 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 58638596856688191140382846897040056051822724215752845844249077793254045120283 2958
UVM_ERROR @ 252703235 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 252703235 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 46233192409951320133717739583823404967217250236001926067926195048282590046664 6351
UVM_ERROR @ 837311481 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 837311481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 91816768479633933893961576862659307472056037008835868701293699367563804571806 6055
UVM_ERROR @ 1632633315 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1632633315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 54843090443737340142046966087203845047606832824144753499274719043636552803191 7234
UVM_ERROR @ 544196809 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 544196809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 11779400388188972287946280754785632650864568841866025554856359203687693133024 5772
UVM_ERROR @ 1180167286 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1180167286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 33471201033011821553168018829161971415661633227705360772548567085776409074939 2173
UVM_ERROR @ 79880541 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 79880541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 69980433556513513374311883335078217035649033988374831087839081075479508198122 1573
UVM_ERROR @ 793125660 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 793125660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 50206461302451862051071859374901975022713167579470947689437501137293589098493 815
UVM_ERROR @ 284873420 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 284873420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 30812453259287951336275238810996225573516022621867694013572123028903679336248 1825
UVM_ERROR @ 170686747 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 170686747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 15165065698910112496617873150731651264191526063980890608695384136586877691318 1103
UVM_ERROR @ 103185815 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 103185815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 32065281321534272718875098645692994695142481234727435945119553028876616313390 1101
UVM_ERROR @ 77156252 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 77156252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 64300941244191182324347062110470062917206204214838420154522781983690588820266 641
UVM_ERROR @ 238181063 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 238181063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 37258174597898798566183308988120529215160334309194576638016342438438103218159 4251
UVM_ERROR @ 301315805 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 301315805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 86823317630672229311006172250967278908095056177961926021566216911574484139584 1369
UVM_ERROR @ 180724132 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 180724132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 23587762293467787671572459824189243820813116127111916322574656718356374402031 4555
UVM_ERROR @ 433972346 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 433972346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 80373902190887438753725620218682090104594736450359634137459622495972931377597 1357
UVM_ERROR @ 152486824 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 152486824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 108617417581132482804706581482911615891513239921884587154289813206452330442426 601
UVM_ERROR @ 797417587 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 797417587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 38037050844195662949719348700790417137925574765865471448701947742375840378776 415
UVM_ERROR @ 142077112 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 142077112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 60921531476572022800802818818706017932679898269917741537080550039930188761589 3217
UVM_ERROR @ 61941494 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 61941494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 90415561932754737233010814753952471797832143030887300764470682735988243089095 1159
UVM_ERROR @ 86319493 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 86319493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 53089038997842773850837933686349205818720144673948653520689080593321474609601 159
UVM_ERROR @ 50568081 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 50568081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 18597468933481326482958852022522796558592022581265610345464558976158769139018 1461
UVM_ERROR @ 1620877514 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1620877514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 93379823598405172205922281940147374198305808721663409632001903312429479170075 157
UVM_ERROR @ 70284153 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 70284153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state
otp_ctrl_dai_lock 68532960566931227969318761064572366492463533420054047589659067238966349551064 8284
UVM_ERROR @ 5133165483 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5133165483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 85319702894255790873540051245045674426902290083408825905148033632803001232098 10135
UVM_ERROR @ 308377155 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 308377155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 58159232051624749923051679886661724694070912283784863168582675378051313123775 14161
UVM_ERROR @ 864933403 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 864933403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 81092262865801507813310115595136734541101462152551648308886322182187988995288 16323
UVM_ERROR @ 1195982665 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1195982665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 53691911192686984006599063236580979021644185808794517091322481219696964542975 4813
UVM_ERROR @ 5856298231 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5856298231 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 80469946524343597934100607360436017348224192293846487380541277050531882667033 5128
UVM_ERROR @ 282231174 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 282231174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 87253539527484117372428972099659005003117786720234445285907636005395291292585 6515
UVM_ERROR @ 149228888 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 149228888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 49380939225445781007759985240551246591807624758629105597626893825441847156150 401
UVM_ERROR @ 215993998 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3 [0x3]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 215993998 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 79130804819718983199645971059768390442714478795981378497580285980246389041508 3552
UVM_ERROR @ 6749660777 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 6749660777 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 2858333955957610203937709448402770846383810844748849260677772358086514743646 22357
UVM_ERROR @ 1934127889 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1934127889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 7080008395210175419169674430801676190504124778339141876246790192942177165265 11363
UVM_ERROR @ 6658660267 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 6658660267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 6565441650348214944401930689236999297358745496458984854849216087183824731708 17400
UVM_ERROR @ 5511747203 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5511747203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 20423040193275266476983352449083902548308960653411480272605294289729043239802 17462
UVM_ERROR @ 1544361181 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1544361181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 35062887491577309943273160198252002453098869731202342727132002286616468874760 217
UVM_ERROR @ 44863634 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 44863634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 38366506286182756313486141298018927193956231224467649809609928339073826139724 10083
UVM_ERROR @ 276794872 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 276794872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 36160586283871488795051172104467643675456698458039057978920888285553943361678 17319
UVM_ERROR @ 1820049035 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1820049035 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 96454475910847552734130685572167729520744787367865885418250312457875989222123 654
UVM_ERROR @ 1563879528 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1563879528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 84754367378545838016579069402795651186141985981292337926732870625928497838786 11677
UVM_ERROR @ 558881932 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 558881932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 79611145475458971908864081804602973911498301326340925571740446348690149900375 6663
UVM_ERROR @ 272239131 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 272239131 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 48217995674441250699628991983935799131608441485812024700225168216182604233398 32470
UVM_ERROR @ 13224090019 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 13224090019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 35026293806636861183922591722350831979972543275126935736019601639826019127438 10423
UVM_ERROR @ 1051246696 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1051246696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 32753375509537530838464661865536772519177537667437401304640553643127403344258 13234
UVM_ERROR @ 406943642 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 406943642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 61310981905115173798966946210411697651334253511330901423035297772546506979638 6432
UVM_ERROR @ 2891803002 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2891803002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 6630248225788137636817543541516580321895732699969855997326795262423833211416 9477
UVM_ERROR @ 10958699376 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 10958699376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 21842574187008784120786093374858003576505272329299161515845600262863810342641 13154
UVM_ERROR @ 1918330889 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1918330889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 48016954654836399310004184596930808105150467218304970074293799390216313611908 5892
UVM_ERROR @ 156303682 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 156303682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 76646560446751299403531276844709549333410915778095990278376019124621838760068 7557
UVM_ERROR @ 1664643980 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1664643980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 73722684368417412723080223779926747714379041016944122193220991132730295703615 4575
UVM_ERROR @ 1030894614 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1030894614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 103972372188073423863772616573391904524289249302411517759523486294873756009924 4916
UVM_ERROR @ 956231982 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 956231982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 67414533409856328168632194288548498911101995773243243114664189949146212920438 2856
UVM_ERROR @ 4233869070 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 4233869070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 27281535356733386485361501479747783499594473986251193334262677074071620915832 23438
UVM_ERROR @ 571972533 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 571972533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 31778652144599884863836644008916535202568507265497357159607035848069736431590 6643
UVM_ERROR @ 2347089084 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2347089084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_*
otp_ctrl_macro_errs 87593564128252901896191757996923884079408040810876647191044086304204235212414 18793
UVM_ERROR @ 1465562305 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4096 [0x1000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1465562305 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 102721910870641495191096181160906614701981439372593402722270862003933237013002 307
UVM_ERROR @ 191737751 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4096 [0x1000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 191737751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 4733185697479379755250193402580897994568686125929102543326783611282873109799 2498
UVM_ERROR @ 164114757 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 164114757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 71559040545287850274013331202838107602545878795143003335761817425981545311046 539
UVM_ERROR @ 859102803 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 859102803 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 21120213564804152293020293407046955173175884471692785245006174074936710153751 2825
UVM_ERROR @ 6596254749 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1237682763 [0x49c58a4b] vs 1237682762 [0x49c58a4a]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 6596254749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 37415737809406065971909346321201290171692315422742193781317868353950135487271 7832
UVM_ERROR @ 2283747136 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3242370241 [0xc142a4c1] vs 3242370240 [0xc142a4c0]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2283747136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 97527345912856815324741515742427010093204112202865852770405234607588040571938 6068
UVM_ERROR @ 625428639 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1337999204 [0x4fc03f64] vs 1338015556 [0x4fc07f44]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 625428639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 105938892497333444300444020921236616949712641519853200722095841838896666915132 1963
UVM_ERROR @ 207469976 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2626890669 [0x9c932bad] vs 2626890671 [0x9c932baf]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 207469976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 15046025059811808224740933016098253112333508221662524791617082655884758560762 16977
UVM_ERROR @ 1181509310 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2644365506 [0x9d9dd0c2] vs 2644365378 [0x9d9dd042]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1181509310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 38484665000531765850627052832553654661753530371099523788533210330775129576825 5065
UVM_ERROR @ 7088338749 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2789246414 [0xa64085ce] vs 2789246412 [0xa64085cc]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 7088338749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 88475329735124292950720023431013159448267638270197676038266421842802369128123 421
UVM_ERROR @ 96632605 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16400 [0x4010]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 96632605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 29931419027532031748966639341408888971106320332945458079314997063476633650804 879
UVM_ERROR @ 1282409181 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1282409181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 32359109744997822580769022693942298722542243281875686856556991034984116783510 3510
UVM_ERROR @ 247549398 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8192 [0x2000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 247549398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 97162297110175553005988475754220783639750816470540493457249289798149544736531 3996
UVM_ERROR @ 4983063243 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16 [0x10]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 4983063243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 31335120321300515779327835223557022297496297432608955387357784908783140183783 9389
UVM_ERROR @ 512780443 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 512780443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 35936470329259369282034909398192204750749303880173573914278448902503679952345 685
UVM_ERROR @ 1569236352 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1024 [0x400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1569236352 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 69745099254623406030303967763216734113590824437651475334340425397719182564987 12570
UVM_ERROR @ 492594079 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 512 [0x200]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 492594079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 33394944711745787607851245745673735231676014920967661814095640909706914059688 6102
UVM_ERROR @ 835975813 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 835975813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 59449824178832297491993607607507398521707638377908576722091577954284231400949 4573
UVM_ERROR @ 452673526 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3455135380 [0xcdf12e94] vs 3455135376 [0xcdf12e90]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 452673526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 4005893572852531425384756389082376093065595735435941101955012798769271637987 13024
UVM_ERROR @ 1031163295 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8448 [0x2100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1031163295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 83835253638946327415978175614276330482568029363353928416812252595245207402545 1398
UVM_ERROR @ 394910577 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2076250959 [0x7bc1134f] vs 4224422911 [0xfbcb93ff]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 394910577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 26453112544541692610656770280232973272975545988084412970377305813234756280423 2143
UVM_ERROR @ 440575261 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 440575261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 65392984391556661586783028190860568221291624266653944135703493177942955278312 2239
UVM_ERROR @ 408654697 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 408654697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all_with_rand_reset 110950090671407893717434066663530496785643189353989119846713740028955489871905 1771
UVM_ERROR @ 434750246 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3493613464 [0xd03c4f98] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 434750246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 33653653714812782253786738709387510075776191716957371567769569545883286108160 5263
UVM_ERROR @ 564051559 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3738268213 [0xded17235] vs 3738264117 [0xded16235]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 564051559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 36483415772065633058716506534604114222293411106909977129899747239776976808115 109
UVM_ERROR @ 95360107 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 95360107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 89377443957178218000231480715454667142967015689204452092742433035518429003709 6606
UVM_ERROR @ 2225354390 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2221775977 [0x846d9c69] vs 2221776073 [0x846d9cc9]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2225354390 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 44827251558720503400170212902724711754723636568339781426337126555483797564676 1819
UVM_ERROR @ 71739632 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 71739632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 22168382655808511397862523060742263653448924553535556407348420424994141856151 7324
UVM_ERROR @ 1505683931 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16 [0x10]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1505683931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 94408330539374784115799906716680206941929965094459693139809314853415827920056 4347
UVM_ERROR @ 733939126 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4104 [0x1008]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 733939126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 73046325781610797176436519230931267941498848724339017328776628254870148224013 5058
UVM_ERROR @ 472731178 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2660230676 [0x9e8fe614] vs 2660230164 [0x9e8fe414]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 472731178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 77402322096331433467613881643698907006895991737109685376171776468615472186083 8397
UVM_ERROR @ 8943007744 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1024 [0x400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 8943007744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 84930496765201912445576496631257559834151231719504641356965763634368465057931 929
UVM_ERROR @ 313836084 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2255243844 [0x866c4a44] vs 2255244100 [0x866c4b44]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 313836084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 99573913335231102828772588286993638271115915344316567566404924950693481184599 4310
UVM_ERROR @ 284878413 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1024 [0x400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 284878413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 17343540787305835487633104997751384643620740997146288991581589669450504800690 1557
UVM_ERROR @ 88782459 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1245277792 [0x4a396e60] vs 1245277728 [0x4a396e20]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 88782459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 70804566275195098031306591380314802499172892788053218482230492294387496897719 8770
UVM_ERROR @ 1462858528 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2465849011 [0x92f9deb3] vs 2465847985 [0x92f9dab1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1462858528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 35262532301772018526800975197264524998900311273639983630644405239638538819815 10833
UVM_ERROR @ 1390897416 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (697246814 [0x298f245e] vs 3180293342 [0xbd8f6cde]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1390897416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 7691761165211970502713946936706927095209601324607447221594844601490534387772 985
UVM_ERROR @ 78698857 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 78698857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 13859496814115845299642093175308980543668978157296044354698052311723455361180 1838
UVM_ERROR @ 433347086 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3242370241 [0xc142a4c1] vs 3242370240 [0xc142a4c0]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 433347086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 88276277087513510707824809528375434257890222080106951504832277757388296353182 4178
UVM_ERROR @ 445116117 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 445116117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 59612747327660451540197392935439880075870115616796983361354016459545471651727 599
UVM_ERROR @ 109332553 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 80 [0x50]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 109332553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 111443158260157081697509576365183508921390969281617795612017286852776900408400 185
UVM_ERROR @ 39543053 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1230965267 [0x495f0a13] vs 1230998035 [0x495f8a13]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 39543053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 90614921541769673439080876564655796427043640060139591324275460232866107245287 755
UVM_ERROR @ 1605344616 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3586554529 [0xd5c67aa1] vs 3586539169 [0xd5c63ea1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1605344616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr
otp_ctrl_test_access 98422708689572636582343223445097550756132819437420152621492836375736519040972 9330
UVM_ERROR @ 383565219 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 383565219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 100855779361007870255877489920826208311914074653564643945539852285694552207780 7844
UVM_ERROR @ 459044396 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 459044396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 38636795604656622123187205397901810954235550852740980990706955405159136758308 4487
UVM_ERROR @ 1717917974 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1717917974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 77203569708176149685377982228171812699094767528615063065012325864769891236356 17306
UVM_ERROR @ 933352679 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 933352679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 105624056725396484868528505633600700939085503880234895225844786215496791866583 7086
UVM_ERROR @ 274679015 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 274679015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 36140470482649594562561216058204015459080535993464511634787810195049888817311 16568
UVM_ERROR @ 508473706 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 508473706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 22705825106488493373155202972845150215884881554269918829302920710040065169228 4246
UVM_ERROR @ 867906763 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 867906763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 63661212979613472389409755199418444622626674908158799037572728622600600329167 17561
UVM_ERROR @ 1241645363 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1241645363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 39290188156870183069994458641528584911983711258490511375365900754969139616835 20588
UVM_ERROR @ 440772940 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 440772940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 41141003244461163311010926081411701636085191612810553540414958120692717870763 9719
UVM_ERROR @ 1037452643 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1037452643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 25268909975749226449886207028784418814308770244372030023664430562773106735501 12386
UVM_ERROR @ 1783214857 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1783214857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 114195711481269859417433382453123636610137090819719180027874509711569534792079 13053
UVM_ERROR @ 1748945743 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1748945743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 113915881471971548504897630969329567085841324736218119998552487653067116501259 13253
UVM_ERROR @ 668056280 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 668056280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 52694919565412477939633535736401707131471973848804108461015127309950205803780 18479
UVM_ERROR @ 1624930486 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1624930486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 54286161329703527551166377455634738767907936518876996866302209988236854564425 4267
UVM_ERROR @ 720554497 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 720554497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 98059691216805118732145292869444588845948655331911552246937706610570187798544 13267
UVM_ERROR @ 7227170071 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 7227170071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 87570834218101390014622391991476803450660443519737271849827206670768392745801 55817
UVM_ERROR @ 2113289785 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2113289785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 17678504523887520352356369504895115206634315873317601687659729277257090232545 8598
UVM_ERROR @ 651985678 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 651985678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 59402823753424513983047354801607029634617228345250409355969561446252880635369 34185
UVM_ERROR @ 3586466015 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 3586466015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_check_fail 522125400721148732260751124781762942726612299058135670108341332629901953722 10104
UVM_ERROR @ 716202010 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 716202010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 59979955887472814308927389162735906626367001940854535624445084467476388077097 10725
UVM_ERROR @ 763735023 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 763735023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 64913773250187326717757807407813631729882125158894268930129376203225078845754 5667
UVM_ERROR @ 351627856 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 351627856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 71158641828050642263399940090624404930098362867627637709411317518433984944502 13917
UVM_ERROR @ 267641964 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 267641964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 76677511194238961076647740461429125378532060426195032776168868471476718201213 9651
UVM_ERROR @ 947258047 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 947258047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 95101955820925628166292849886674545476230616431819806550359249631457806715469 5594
UVM_ERROR @ 2559559216 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2559559216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 56731347740662839221127960863113387780127435655844051531515819311291240353517 18582
UVM_ERROR @ 1900147679 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1900147679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 114366056870887882768162164663341938135854258691396444444284896380873848445975 7117
UVM_ERROR @ 797774906 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 797774906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 89434199867995737102606790460715336598626254672542184564299948762503461946460 18236
UVM_ERROR @ 890558377 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 890558377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 73480446221579573456289058550567021420125419421432313230467913244644900934778 4836
UVM_ERROR @ 139401982 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 139401982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 82630496702122007468212225504038049343741184351332659358408632748976305085719 5254
UVM_ERROR @ 546488840 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 546488840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 114087842720573854820745309696237308328651816765847634646571211117502853004907 13245
UVM_ERROR @ 3006502105 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 3006502105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_test_access 79295776041008966826812091613100228836067536200488776750548584965156479591016 9482
UVM_ERROR @ 486485667 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 486485667 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 102813193339875208034002187207735017422953097367009272332588469527375306642030 5806
UVM_ERROR @ 2777464988 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2777464988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 32134099928012483638267034074891950246946151607147206285935701588448515852428 23549
UVM_ERROR @ 12511038414 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 12511038414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_errs 109368387355814998533020878360941013486715776834836380952099987762376840572000 505
UVM_ERROR @ 80118047 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 80118047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 42891339168767524152845190400766244456807015330838954748958715796421044114527 6777
UVM_ERROR @ 188567550 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 188567550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_key_req 68365325038563050665984437649305771039534024675414168869108224274976953493598 10522
UVM_ERROR @ 4832444633 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 4832444633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 44497444995440986510721583623208792664114198860136949165907681100704830571619 16341
UVM_ERROR @ 588585183 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 588585183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_esc 49440674331745612668389369546947876659910378103531796757751938443499153970078 1005
UVM_ERROR @ 158800758 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 158800758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_dai_lock 104335718592346755309733698707941733486188329843886065222113096851192248764193 18028
UVM_ERROR @ 2803041759 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2803041759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
otp_ctrl_sec_cm 59285141901937397714411621859668099961736480768915673602996838433364107892660 2874
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1308) [otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger!
otp_ctrl_background_chks 2255126730256678957833919084042413268830498941712782424361330117630207329660 5549
UVM_ERROR @ 16095299060 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 16095299060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 62669630264817114644343749205285382064456000262874995846767351570332844978387 2498
UVM_ERROR @ 601793879 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 601793879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 18301644391528262354217092132795839784228911441642970612488523500425844701088 17233
UVM_ERROR @ 1149649891 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1149649891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: *
otp_ctrl_regwen 82184695240466932658237724262160511997605732700919702356170695346477618113678 3111
UVM_ERROR @ 79977127 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 79977127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 97592834517520070825565207490918692129408079298021825184929336989156117641608 3241
UVM_ERROR @ 1284670354 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1284670354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 15939570351004153615364973678659387673358268136157571938599942015706023242003 107
UVM_ERROR @ 173429003 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 173429003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 49985403132879215833132250739952900731913821931386831058866671086193902358211 2200
UVM_ERROR @ 119009757 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 119009757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 26862192768469532355163478547790773534335843580312155033539361502692838287512 96
UVM_ERROR @ 631262331 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 631262331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 54019086185546670525225527495356911410738326263335552156583001596169710072965 8117
UVM_ERROR @ 560640762 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 560640762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 1329097550025160371725453665538359754276605434609727193351705722943288502263 794
UVM_ERROR @ 107335022 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 107335022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 49109631744888202560504847339405535582486889369040241949562016487337353196509 4067
UVM_ERROR @ 123438412 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 123438412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 30639722464147257813570499953098997567843952112636782378693311241701498573705 1123
UVM_ERROR @ 61840006 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 61840006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 37389206254367656870164531236714986741235042549573408833914829666785845414715 2989
UVM_ERROR @ 160492320 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 160492320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 114169259410045761906580044169146573840966741524207575403317363505178338110352 4377
UVM_ERROR @ 146478988 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 146478988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 46777721095447204066313824829263263829003486265602922507449248775443802562475 1031
UVM_ERROR @ 249368151 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 249368151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 28236658905725285387134806146063159439651991282639501178068177169439937471047 783
UVM_ERROR @ 228002829 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 228002829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 44973857661949653091818362111689000425076730653827903589642471268192407277552 1793
UVM_ERROR @ 156408298 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 156408298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 12176150624272504300341737963023673267530411930465073973222710548688453617703 5239
UVM_ERROR @ 412268562 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 412268562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 99046759147893764410738972308777037482944523529609663534168804307665755678526 7917
UVM_ERROR @ 1084363830 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1084363830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 47292536585504925730134798349723220481973320215556387501941974579700784161792 2381
UVM_ERROR @ 121606497 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 121606497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 85026114160747468699586443666163437731050305266729537225181309901260131611333 8981
UVM_ERROR @ 215067106 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 215067106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 72017159408051285548743631877284341350508879077153704081512217752466013234424 2057
UVM_ERROR @ 200731341 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 200731341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 27103895778419031969116787067406385114971216468661407564584417296550902889578 2158
UVM_ERROR @ 98215695 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 98215695 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 55613774267548345714029432162700332342411311483872479992936340844308050451455 2389
UVM_ERROR @ 199403952 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 199403952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 65583901996215891507884568031327716585147094084009314707193149933710355864378 622
UVM_ERROR @ 54348037 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 54348037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 18661987025597278449357207928727404832000921733867866887943042647177464969464 7315
UVM_ERROR @ 207413328 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 207413328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 113456754446634398033044513680910343642729826756765467060519504089089633849711 572
UVM_ERROR @ 111359024 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 111359024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 49450766906551621724076122384331454985148102337864572204105464675379290861215 1971
UVM_ERROR @ 76940177 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 76940177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 19292670209350110422750550222330660976169509134523321629226328788198605567722 5483
UVM_ERROR @ 771844008 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 771844008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 59452787362605245313980542901486989017313291779923130366148239186351393614488 4881
UVM_ERROR @ 184930219 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 184930219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 101656838164490452813949952377792387863026606556264220725155553080410942513069 1564
UVM_ERROR @ 106799315 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 106799315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30055746481322872192598491478606087724583142664511966971080125822224623218645 302
UVM_ERROR @ 38939428 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38939428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 51711248602924747561481219062922272993295714184012998482892911065170147706391 3343
UVM_ERROR @ 85801315 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 85801315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 91125447515248021623738957642338011785271746968038771448872237615718831974061 667
UVM_ERROR @ 284333409 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 284333409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_smoke 3382273588699508627257684098071620681358730302310465104861660408340945039624 8101
UVM_ERROR @ 196793834 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 196793834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 51339789222631486763984135508712536805548056157266181661850299065200578482835 96
UVM_ERROR @ 125088029 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 125088029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 74340862480698443567947709405697284814413645373989586472642814786994951971342 1481
UVM_ERROR @ 1271417466 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1271417466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 113703336173185021665250666078670203311464860103321556606994110895835948645058 1633
UVM_ERROR @ 314093694 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 314093694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 37899757118739773563934816838891983343897819904455084674557119430705454197006 2590
UVM_ERROR @ 1190519438 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1190519438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 36574094279427564929089336859448983605950237518002896513842935657844900883388 314
UVM_ERROR @ 112242987 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 112242987 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 41033214960648157552187380252910850017976597681975152172738698677749450219589 481
UVM_ERROR @ 287986849 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 287986849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_regwen 35976825691896806588419183705258268485274403433184057491699482883488938806865 941
UVM_ERROR @ 226180167 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 226180167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 49273863847257167241242005949092160477248062181462834913704161760476243145648 238
UVM_ERROR @ 54475766 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 54475766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 54654581216907309033204265229198887246027213599591912395323854711887172253093 1464
UVM_ERROR @ 97023343 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 97023343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 68411962039208474605649128466884819765367637643209954669442410588210914070462 646
UVM_ERROR @ 160030797 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 160030797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 59123379263110978948978201384341669244190929648938856569375919146743719211757 824
UVM_ERROR @ 818665766 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 818665766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 103514850515774997113768275297303350266534770234205739979957153144677087664837 3018
UVM_ERROR @ 123433875 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 123433875 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 49710023395867091564873059804004408698978693353430355028512002978704755731451 96
UVM_ERROR @ 53794277 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 53794277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 14559465983570444965612735698479681894712698649129129248397334274357246877164 1430
UVM_ERROR @ 77042821 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 77042821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52376404633666664851458343907059556061074414275297572447526888162166662432392 854
UVM_ERROR @ 1010187336 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1010187336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 26217867124560528149808075548250486289684214823278464400711519004185426287606 538
UVM_ERROR @ 46144196 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 46144196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 70695154004462113793004293317032183987453177061383442711003447598769142542323 188
UVM_ERROR @ 143885036 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 143885036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 60611460433165071172225066463129617244785450453878678302310463174954008331784 1306
UVM_ERROR @ 784522736 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 784522736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 67198459956811819166380688484208242711373993992487429205627657775941845653000 1102
UVM_ERROR @ 250118940 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 250118940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 112646668656609842286410039917041290314356626787341738559793201385348243331270 1158
UVM_ERROR @ 50341581 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 50341581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 60350768456509119737538418536945841780911954342638922239947760191845191611112 938
UVM_ERROR @ 60102623 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 60102623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 65833967945580027306378813038170000352633529602387134854163182934691045376016 184
UVM_ERROR @ 158044222 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 158044222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 11293368330779283817448245783715003824560641277689235795554010017676429549844 96
UVM_ERROR @ 126361647 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 126361647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41650742186475608829838314540540621353932513047063079758406485054506450969068 1192
UVM_ERROR @ 922856693 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 922856693 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 35352721434358565131567957610918746269850284822808565749475553259264753841812 1564
UVM_ERROR @ 69461758 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 69461758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 109693689596567527639513667597034105604210354995536093045686012658607605912125 1982
UVM_ERROR @ 139223895 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 139223895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 81779012176938911811941507236264069133393339286188061080810281943214031220127 676
UVM_ERROR @ 71481578 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 71481578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 100904539552727607623419609598464447952361892568938271818263786278938340060694 408
UVM_ERROR @ 35876423 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 35876423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 79227886998716806227609457459037450633741082158274283595068651301693858455979 680
UVM_ERROR @ 153485705 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 153485705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 22838854622238025625531748084529306995180253064786439248220725150611326053416 318
UVM_ERROR @ 44104808 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 44104808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 3143219865665021639131571509103008117909757344804899510465217729615417652975 282
UVM_ERROR @ 143421456 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 143421456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 100077573886280621933939999064426207701834638952968766946726654376641082216417 256
UVM_ERROR @ 755700022 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 755700022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41808878083705034880507333408039662622607574666142895730473274906951025580147 1364
UVM_ERROR @ 67011721 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 67011721 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 24752346453994209993333105407447983767627583220434128528147308645891961622376 1090
UVM_ERROR @ 90098916 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 90098916 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 67434292100041657262383908314169979449479916050428346329085395023277827646499 350
UVM_ERROR @ 56752666 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 56752666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 22655986037804886165176327438612872150398823671058568641513606395535476414678 340
UVM_ERROR @ 1019679545 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1019679545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30573995217781490213912910273935571535563457694725648346904189858782419251398 96
UVM_ERROR @ 35044359 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 35044359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 112454709194005253083702841487117182105489985997424217474658136110942088238671 896
UVM_ERROR @ 120592708 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 120592708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 59048219328509651576176985578758503040194238342962899963588331980622397782891 142
UVM_ERROR @ 32805592 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 32805592 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 88402920691311879237666196212369992372805429767213358225605784135443388147192 530
UVM_ERROR @ 38110914 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38110914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 10351442618279406029603299582653133195943274736772658074630978207554967851854 622
UVM_ERROR @ 52313545 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 52313545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 58131309936170918548500582924385907964334879136364123868463485239813853876940 438
UVM_ERROR @ 44993689 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 44993689 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 52638253694950177907854623206313841020817797594502598612585527464891089891706 1208
UVM_ERROR @ 1083305773 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1083305773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 9489170601014559015136800947958762779430057271432069567546084839882590474901 558
UVM_ERROR @ 98574568 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 98574568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 24124292441978666781161550632166919645841947042814764902058253822212709420837 436
UVM_ERROR @ 177080738 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 177080738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 68472665666160363227762655786744458225491548576953587027748394753859520267171 2142
UVM_ERROR @ 133782698 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 133782698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 73296614214266108609292634500428834905074863166963852293408257160649845276755 184
UVM_ERROR @ 124568809 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 124568809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 5840408165977909062375295397514560078506429580741269410231912453797634806143 1016
UVM_ERROR @ 98296266 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 98296266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 4263480299078163459165364536711294516258613170846956807524202446373292365272 138
UVM_ERROR @ 53861492 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 53861492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 100881874218513267217041667789725567048428041186326442879199832649616296161741 1476
UVM_ERROR @ 1068454773 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1068454773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 29929822976042877707279317735113687192359312099943336425024705221751766206050 474
UVM_ERROR @ 45236522 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 45236522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 19295901980037408929600743978202500232296951578753630048662049445944824339812 1886
UVM_ERROR @ 156935087 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 156935087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 73074649831188548515803845665794635035766472611094764738944125505077475087566 368
UVM_ERROR @ 36731786 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 36731786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 50691704886472846508866794413877500323880120143268198059964301216159598189097 1346
UVM_ERROR @ 291081502 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 291081502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 105028556518732665338905402833621296671368466819869439875820075644643409950609 1028
UVM_ERROR @ 87880427 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 87880427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 33893094166144856367855564029433630515905060689877211794993082013826308253670 1524
UVM_ERROR @ 1292780874 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1292780874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 77238332069150100442063746987498662666934625843896683757591174281308853115985 180
UVM_ERROR @ 224048763 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 224048763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 62245875077639424318489952599027590574603781686566792837179065715723384956125 410
UVM_ERROR @ 256707009 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 256707009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 57142108415211323545216915672007520090036786853280287775641627586509826123104 988
UVM_ERROR @ 65445493 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 65445493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 85506861820991150720385754322960734639259160527555466188003147652656817414297 1674
UVM_ERROR @ 51966556 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 51966556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 79909623948740358075929621409789005701456283914634214917790376464800599115056 410
UVM_ERROR @ 147360744 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 147360744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 42755514132736711869774076071940915195961208578882138173672754159935056856662 2678
UVM_ERROR @ 64667294 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 64667294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 26142191012903536676390665423703856395154776631044749825622993434538895290597 96
UVM_ERROR @ 156553732 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 156553732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 41452399254877333452469234253483223240003886526784807926696514130461496472607 474
UVM_ERROR @ 35458890 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 35458890 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 81646302242469385022274160900998740515266933609965996427767705571492595361526 1276
UVM_ERROR @ 65906825 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 65906825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 30745784122801812757916554428360416579013977596121319616626391411516484824542 524
UVM_ERROR @ 108034222 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 108034222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 3290411977762988193147496383030102901773760170949341093755514015265028645852 1236
UVM_ERROR @ 119246006 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 119246006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 63568081563240915441407784895662621368019774902749757802843013627035593046055 1394
UVM_ERROR @ 261140613 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 261140613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 72665678861031973562955594300237215464723785366847031976756662063379463966752 2310
UVM_ERROR @ 75893331 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 75893331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 64946307234787021136041994309505542163503493925821720345459316782041093006500 834
UVM_ERROR @ 172607550 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 172607550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 51143714217420004648165551459411450720327185333010014747351891240053939785302 512
UVM_ERROR @ 102236377 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 102236377 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 18609526963898128069019933854196472818364858026222036219587603942860116271184 1752
UVM_ERROR @ 1303926627 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1303926627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 69087168093759707871464951144799515643879532133519233895281818739524044093092 1404
UVM_ERROR @ 49935945 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 49935945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 46850369824702056491239071748464502076139774258053427479046626189419507770089 1316
UVM_ERROR @ 1244442246 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1244442246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 39337481983753503568044068019632274595038830524134647714361033919181761835341 736
UVM_ERROR @ 41405813 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 41405813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 97553291550490841112476198458787532511076973121153399415856729632411423252112 282
UVM_ERROR @ 167928800 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 167928800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 100816869546998078141201258071667829572938404934445928867250645023466356866206 380
UVM_ERROR @ 129761941 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 129761941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 109257324231153881716336199760686187508895799897414368086757270507865108019708 984
UVM_ERROR @ 195909134 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 195909134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_init_fail 77712439623516361279214272590005631218661791258777065899521973893542436011399 96
UVM_ERROR @ 129908423 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 129908423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1015) virtual_sequencer [otp_ctrl_common_vseq] expect alert:fatal_check_error to fire
otp_ctrl_sec_cm 37933385196275917625421412218610719474537541116154559271061016572875829406170 1067
UVM_ERROR @ 78044579067 ps: (cip_base_vseq.sv:1015) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] expect alert:fatal_check_error to fire
UVM_INFO @ 78044579067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:353) scoreboard [scoreboard] alert fatal_macro_error did not trigger max_delay:*
otp_ctrl_macro_errs 34196683889800122964943518214185447670802455136398803135109125565669865548806 428
UVM_ERROR @ 138282426 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 138282426 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 90506370383632180987953362688901346956123947479291516846224300867485971344799 8409
UVM_ERROR @ 3664932692 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 3664932692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_macro_errs 8089406164316921226137234260221261694878464666940039782179629720532577769571 3988
UVM_ERROR @ 5742631178 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 5742631178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask *
otp_ctrl_parallel_lc_req 98463597381246905989849162838791166642919688331155218941805646728087987621805 8781
UVM_ERROR @ 259599714 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 259599714 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 48364487786743631696479520101681494677462561979483502572810952678914544612815 12404
UVM_ERROR @ 7006987097 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 7006987097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 76656478928160969517004316074599973926600717972677110021254454401566104518661 3451
UVM_ERROR @ 5187545415 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 5187545415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 106898118020309395205546520114058221856117820812422458898729093495316487139736 2939
UVM_ERROR @ 160959228 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 160959228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 82138869201175544853990495478572125837864074398638644499436159579913068682199 5465
UVM_ERROR @ 237374447 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 237374447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 105748102637420507764242724183900029309169480867164026061612309850852012625196 1905
UVM_ERROR @ 106710515 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 106710515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 79511798481159990465606451223586107590372280698987326709003809968694979343189 8764
UVM_ERROR @ 4409492487 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 4409492487 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 95793531451918503640482950711337458592340964412146734930610737522639078256527 9305
UVM_ERROR @ 835250554 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 835250554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 52054759726024468733687048289415394423463227156033143708510324024839365626102 7971
UVM_ERROR @ 591595787 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 591595787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 46673868759494959645957368170662690281283801385663038533633981327811320880168 9428
UVM_ERROR @ 573832478 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 573832478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 29517797778136782972240089347699262923835018474144592638395072391125476234134 10716
UVM_ERROR @ 7109996174 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (258 [0x102] vs 256 [0x100]) reg name: status, compare_mask 0
UVM_INFO @ 7109996174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 61107544878246794388013058621859008191179802306339748214236714902546229236762 12892
UVM_ERROR @ 661173437 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 661173437 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 77593439301146762280303644929933770551434702217967280789111655935925132421309 9899
UVM_ERROR @ 3935727722 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 3935727722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 60960216265011664420726157947229164907515484645301299860984146355567173105999 6668
UVM_ERROR @ 1066295883 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 1066295883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 11013029149707478701620972411345409294465829407009030586825871642981121178907 9950
UVM_ERROR @ 1152659103 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1152659103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 52945025166549486101996050918796873347365949590117187827626676315000978304724 10210
UVM_ERROR @ 1602065449 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1602065449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 38071136769249553382241380785592565241303298856806111341331856934542157158719 8395
UVM_ERROR @ 1081313515 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1081313515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_stress_all 65890463907234580274457885040653515143122973399290794757081068981412328268111 10749
UVM_ERROR @ 2101063499 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 2101063499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 28368426025091211528706003442442390001119340185381397251753097436888477281853 8398
UVM_ERROR @ 264072042 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 264072042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otp_ctrl_parallel_lc_req 54956738819527630433188511004057793160562804836728542689339324143645834895170 4058
UVM_ERROR @ 2457787888 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 2457787888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:353) scoreboard [scoreboard] alert fatal_check_error did not trigger max_delay:*
otp_ctrl_parallel_lc_esc 5693197251354991079766480194988192988973025071848374015146168075975415878476 5618
UVM_ERROR @ 125531198 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_check_error did not trigger max_delay:5
UVM_INFO @ 125531198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---