| V1 |
|
100.00% |
| V2 |
|
98.11% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_smoke | 50 | 50 | 100.00 | |||
| xbar_smoke | 21.590s | 3576.882us | 50 | 50 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_base_random_sequence | 50 | 50 | 100.00 | |||
| xbar_random | 226.890s | 16211.418us | 50 | 50 | 100.00 | |
| xbar_random_delay | 295 | 300 | 98.33 | |||
| xbar_smoke_zero_delays | 7.440s | 62.160us | 50 | 50 | 100.00 | |
| xbar_smoke_large_delays | 398.580s | 22887.572us | 50 | 50 | 100.00 | |
| xbar_smoke_slow_rsp | 457.370s | 53641.637us | 50 | 50 | 100.00 | |
| xbar_random_zero_delays | 82.210s | 424.976us | 50 | 50 | 100.00 | |
| xbar_random_large_delays | 2089.820s | 162080.103us | 48 | 50 | 96.00 | |
| xbar_random_slow_rsp | 2419.570s | 238702.669us | 47 | 50 | 94.00 | |
| xbar_unmapped_address | 100 | 100 | 100.00 | |||
| xbar_unmapped_addr | 138.340s | 2729.030us | 50 | 50 | 100.00 | |
| xbar_error_and_unmapped_addr | 119.390s | 3846.407us | 50 | 50 | 100.00 | |
| xbar_error_cases | 100 | 100 | 100.00 | |||
| xbar_error_random | 211.150s | 5112.786us | 50 | 50 | 100.00 | |
| xbar_error_and_unmapped_addr | 119.390s | 3846.407us | 50 | 50 | 100.00 | |
| xbar_all_access_same_device | 88 | 100 | 88.00 | |||
| xbar_access_same_device | 357.570s | 9467.905us | 50 | 50 | 100.00 | |
| xbar_access_same_device_slow_rsp | 3519.210s | 203228.135us | 38 | 50 | 76.00 | |
| xbar_all_hosts_use_same_source_id | 50 | 50 | 100.00 | |||
| xbar_same_source | 196.560s | 20144.315us | 50 | 50 | 100.00 | |
| xbar_stress_all | 100 | 100 | 100.00 | |||
| xbar_stress_all | 1035.730s | 45760.479us | 50 | 50 | 100.00 | |
| xbar_stress_all_with_error | 1198.510s | 262347.116us | 50 | 50 | 100.00 | |
| xbar_stress_with_reset | 100 | 100 | 100.00 | |||
| xbar_stress_all_with_rand_reset | 1512.860s | 5546.977us | 50 | 50 | 100.00 | |
| xbar_stress_all_with_reset_error | 1532.700s | 13416.645us | 50 | 50 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job timed out after * minutes | ||||
| xbar_access_same_device_slow_rsp | 64631372340047373217753948859686683744278633469897131196241261638955626181344 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 17939139214394401935793818480283021852729412147093291494305653709258753712234 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 96873191783311171306574715307904977917888624430010912553133042231400664249590 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 9879940888289890497286583540191747547521906028037308650950666712181362415876 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 43830173021433477733066458139090724010976762347458149445880236760959094025929 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 26817396548527997132448426904521067180099899864502309308856622891028062319736 | None |
Job timed out after 60 minutes
|
|
| UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | ||||
| xbar_access_same_device_slow_rsp | 33589505801292214084209435424301876421569939682356468577034216020587312032789 | 102 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 107929991712403616483226982048179479272349404826007865665408639922683182960333 | 180 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 66957336215980963842372786491079638766894201976917512969364529603873330309890 | 207 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 98818033876842000120711636618151544247011832406254962753822510863960664190576 | 120 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 7005266743193884632583561214651934008567944044446349813154159799244487503663 | 147 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_large_delays | 85133976348779998344673714311093095767823425638557578139182616739027935264324 | 165 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 43315307191769539405698241325926677753373121260141774512874808428050070776075 | 147 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_large_delays | 37909224888746607249481960147715939071793573240610042217029876360685673298883 | 210 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 97824709222375857129100208885095515643793137512756472931534288205946708767081 | 118 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 91869974309574542959635664915774064066929034886716609792677957834768011555151 | 135 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 56673296597688409491594016143237585734444118371126412148457726143149298706806 | 161 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|