Simulation Results: gpio

 
26/12/2025 17:03:56 sha: 3043786 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.49 %
  • code
  • 92.63 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 98.38 %
  • cond
  • 95.68 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
98.57%
V2
98.38%
V2S
91.11%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.870s 313.103us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.850s 81.687us 50 50 100.00
gpio_smoke_en_cdc_prim 1.670s 99.800us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.580s 161.176us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.990s 60.522us 5 5 100.00
csr_rw 18 20 90.00
gpio_csr_rw 1.090s 42.596us 18 20 90.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 5.980s 206.865us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 3.030s 146.916us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.860s 32.426us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 23 25 92.00
gpio_csr_rw 1.090s 42.596us 18 20 90.00
gpio_csr_aliasing 3.030s 146.916us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.720s 61.493us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.790s 302.145us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.340s 121.586us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.870s 102.018us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 4.420s 555.853us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 4.340s 378.452us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 30.430s 1635.644us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 8.340s 633.228us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.530s 366.586us 50 50 100.00
stress_all 50 50 100.00
gpio_stress_all 162.090s 28625.794us 50 50 100.00
alert_test 50 50 100.00
gpio_alert_test 0.930s 39.020us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.940s 15.881us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.910s 550.125us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.910s 550.125us 20 20 100.00
tl_d_outstanding_access 44 50 88.00
gpio_csr_rw 1.090s 42.596us 18 20 90.00
gpio_same_csr_outstanding 1.790s 250.504us 16 20 80.00
gpio_csr_aliasing 3.030s 146.916us 5 5 100.00
gpio_csr_hw_reset 0.990s 60.522us 5 5 100.00
tl_d_partial_access 44 50 88.00
gpio_csr_rw 1.090s 42.596us 18 20 90.00
gpio_same_csr_outstanding 1.790s 250.504us 16 20 80.00
gpio_csr_aliasing 3.030s 146.916us 5 5 100.00
gpio_csr_hw_reset 0.990s 60.522us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 23 25 92.00
gpio_sec_cm 1.520s 168.858us 5 5 100.00
gpio_tl_intg_err 3.440s 396.425us 18 20 90.00
sec_cm_bus_integrity 18 20 90.00
gpio_tl_intg_err 3.440s 396.425us 18 20 90.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 50 50 100.00
gpio_rand_straps 0.960s 36.910us 50 50 100.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 24.170s 554.066us 0 50 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.960s 14.125us 50 50 100.00

Error Messages

   Test seed line log context
UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -*
gpio_stress_all_with_rand_reset 101597328716341652036701707383814621392405553156514734875361622107579010894062 79
UVM_FATAL @ 408604172 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 408604172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 97752752260390601598926059817580214243804509925489170531166173468604170292397 75
UVM_FATAL @ 4282356 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 4282356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 11764716404586919570294691886499934149361794200742623332954216124195169631509 76
UVM_FATAL @ 305888679 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 305888679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 22141808217781498480190591261703010418167343761701221034374142686097631966946 75
UVM_FATAL @ 8958590 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 8958590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 21602303746352228372162037121126311330582243985329717848660700671482970490591 77
UVM_FATAL @ 438482387 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 438482387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 48566325363894296874441604473886956311160409471945370504296175123641888617245 76
UVM_FATAL @ 1198175307 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1198175307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 58032970244031348595840023566811356026353773395043101128434488617832693633228 75
UVM_FATAL @ 96037946 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 96037946 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 24833953092727522055993436772624586867748393277272952031964513214615340267273 75
UVM_FATAL @ 171848830 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 171848830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 33449300668062487221696160382101103008727377556263941020983208948173620780539 75
UVM_FATAL @ 5258851 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 5258851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 97780895287579033435102864372499700801454798126884581695792641609892750984039 625
UVM_FATAL @ 554065583 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 554065583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 30194874235648451285169793235890055362120141483489706075145350772371253106036 334
UVM_FATAL @ 381957845 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 381957845 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 91882648810454540575786183504762543108692152689219922107593991277393040338039 76
UVM_FATAL @ 111566899 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 111566899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 114962438087389647094715743861127727289548692004892960224535597960190178462066 156
UVM_FATAL @ 671681821 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 671681821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 4941628309145877550189753048948440718789050144518269750907984001054876075105 333
UVM_FATAL @ 380487453 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 380487453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 99371911454720120932287902368725875625240478402708395194706527422235722680613 75
UVM_FATAL @ 5563363 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 5563363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 105055271820701816029230156738781255545799900244829362559380481242351833484610 77
UVM_FATAL @ 1438376934 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1438376934 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 81820838691474337891843097327752945974556613193037245178096901381361360620400 75
UVM_FATAL @ 3962706 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3962706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 92861901752157773414496089210061902917306079034386702200114932451573487751059 500
UVM_FATAL @ 1088001486 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1088001486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104140935029257463525031283447267679434028985156441626395352148699186785624773 78
UVM_FATAL @ 149636422 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 149636422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1163) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 104383210120349339948552206209133751936924874929671733052281167676272400992486 78
UVM_FATAL @ 2764848 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2764848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 24970573361193445903544803531744796930611219808021409178418925405767057896781 77
UVM_FATAL @ 6401479 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 6401479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 41127609546936063750545569235794803922935016875841492461162576530492529380243 125
UVM_FATAL @ 170979195 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 170979195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 25505111534656248542591008666659711053908319585480402615054004452319199428454 77
UVM_FATAL @ 7538905 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 7538905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44888305128674169221512591635529619457834168972117574390621836422720903113626 77
UVM_FATAL @ 86050331 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 86050331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23082414331611046761561387760988428632527731102427925631001561400709780067383 79
UVM_FATAL @ 187140951 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 187140951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 10484522460096040733256811493470119061779203374436874809982750795287694441926 298
UVM_FATAL @ 882337984 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 882337984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 76610089960587104427942931792291818841774747982217857192739595395075400629919 499
UVM_FATAL @ 314164607 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 314164607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 40725790285763692099006811583569461669375466161333410860984499750142890470633 254
UVM_FATAL @ 1357245107 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1357245107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 105621315963523015421494203053779519594957730975994003220171374516058700270275 80
UVM_FATAL @ 6838820 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 6838820 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 107055840736265776323122493911228389954493781332712928582035262444806692253102 262
UVM_FATAL @ 1098501176 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1098501176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45746327749352827138641460284315814664496135149307512256447649768589170968126 77
UVM_FATAL @ 22056836 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 22056836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 115342167383807398204073630721620464206881314245079761678896430954264051340506 79
UVM_FATAL @ 1301253564 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1301253564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 28498327771588763239970268993865615191208460064824366863183962502993027505981 78
UVM_FATAL @ 612753496 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 612753496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23761796578252692590445122448098497310106179089173144603652472952430027122904 131
UVM_FATAL @ 621723339 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 621723339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 59227655597678260668140740245804719001723945080563465128909808181698426840720 80
UVM_FATAL @ 2110464974 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2110464974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 4256618812984465451718331626496833399596927671103119946106651651265201865439 77
UVM_FATAL @ 2092446 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2092446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 77501208701020207221932531233323672117499067919369801319445954414647987721977 77
UVM_FATAL @ 76075431 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 76075431 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 21737820949047179584255491335175435040547157097709298071223595044557538343578 166
UVM_FATAL @ 2675732519 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2675732519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 110360201539198715524332303128869289097527301151625881723468357171273897223908 79
UVM_FATAL @ 8514643 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8514643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 110908644138993952219941893784597530058181086830864072743225362673498367086777 207
UVM_FATAL @ 1705821808 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1705821808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 61602344676729144532518516364367452336986833838756372553821758903585538599076 77
UVM_FATAL @ 21045613 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 21045613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 41283673306993339583896388839418742940454354677432101143578876173451089250477 77
UVM_FATAL @ 5377708 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5377708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 112213951711341817235761647333895978738572910932827848846656532892285970640202 77
UVM_FATAL @ 35295837 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 35295837 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 36943231948708180230090307582666330655595449686446245748499509087760526740086 80
UVM_FATAL @ 1076538535 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1076538535 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 3213475784906027637701228827798489007314796141130786924070448731491323298526 77
UVM_FATAL @ 8126872 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8126872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 12590174586240059322058235588104987660687123296584525020498706544529123069804 77
UVM_FATAL @ 8828570 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8828570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 20359286386975359310584170479711125584727646257947757765079517115925983095677 95
UVM_FATAL @ 200935583 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 200935583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 18781430938542422887727326551017669105747085181474046137176611995188252926846 77
UVM_FATAL @ 18675594 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 18675594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 99940879988999245798815142735948215338191602059202558812470495716308515188581 77
UVM_FATAL @ 25294894 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 25294894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 94041045241070788107330938363442796874447691536807524002696392348701115262116 77
UVM_FATAL @ 65915971 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 65915971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_* reset value: *
gpio_csr_rw 42675613730828847154251232264665809917119903643918648063921930218243705817354 73
UVM_ERROR @ 2885430 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (7506948 [0x728c04] vs 7506949 [0x728c05]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_0 reset value: 0x4
UVM_INFO @ 2885430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_*.enable reset value: *
gpio_tl_intg_err 4034173002554241550380661251063595438240677485099485212797408842239326502055 168
UVM_ERROR @ 541980444 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_7.enable reset value: 0x0
UVM_INFO @ 541980444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_csr_rw 73854377990830056209396444678858489404812396445318105477808790104607669862557 73
UVM_ERROR @ 10958423 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_4.enable reset value: 0x0
UVM_INFO @ 10958423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_tl_intg_err 14807738085092271912924260241483469498276090438729173363123655919840692862554 170
UVM_ERROR @ 55167881 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_6.enable reset value: 0x0
UVM_INFO @ 55167881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:642) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
gpio_same_csr_outstanding 82113159148188732364414047723420033816107709446706683979336386490741955372402 74
UVM_ERROR @ 800556804 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x73277780 read out mismatch
UVM_INFO @ 800556804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 59973737148153255379363672501613426077508273417774221150372964706792427334447 76
UVM_ERROR @ 14595920 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (11170564 [0xaa7304] vs 11170565 [0xaa7305]) addr 0xf607ea5c read out mismatch
UVM_INFO @ 14595920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 45582426834496547639299181941032819494047022406879291230739161710314400253350 74
UVM_ERROR @ 48859803 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (10993664 [0xa7c000] vs 10993665 [0xa7c001]) addr 0xad02305c read out mismatch
UVM_INFO @ 48859803 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 34910942745008125659433934084277776890706538538830630966924878444675574188162 74
UVM_ERROR @ 174188593 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x75a9e668 read out mismatch
UVM_INFO @ 174188593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---