Simulation Results: keymgr_dpe

 
26/12/2025 17:03:56 sha: 3043786 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 66.38 %
  • code
  • 84.27 %
  • assert
  • 97.64 %
  • func
  • 17.22 %
  • line
  • 97.62 %
  • branch
  • 94.61 %
  • cond
  • 90.31 %
  • toggle
  • 63.15 %
  • FSM
  • 75.68 %
Validation stages
V1
99.23%
V2
100.00%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 49 50 98.00
keymgr_dpe_smoke 146.750s 15982.709us 49 50 98.00
csr_hw_reset 5 5 100.00
keymgr_dpe_csr_hw_reset 1.090s 35.084us 5 5 100.00
csr_rw 20 20 100.00
keymgr_dpe_csr_rw 1.230s 81.131us 20 20 100.00
csr_bit_bash 5 5 100.00
keymgr_dpe_csr_bit_bash 15.160s 1805.773us 5 5 100.00
csr_aliasing 5 5 100.00
keymgr_dpe_csr_aliasing 6.100s 1969.941us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
keymgr_dpe_csr_mem_rw_with_rand_reset 1.750s 38.377us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
keymgr_dpe_csr_rw 1.230s 81.131us 20 20 100.00
keymgr_dpe_csr_aliasing 6.100s 1969.941us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
intr_test 50 50 100.00
keymgr_dpe_intr_test 1.040s 12.211us 50 50 100.00
alert_test 50 50 100.00
keymgr_dpe_alert_test 1.250s 25.861us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
keymgr_dpe_tl_errors 3.410s 145.372us 20 20 100.00
tl_d_illegal_access 20 20 100.00
keymgr_dpe_tl_errors 3.410s 145.372us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
keymgr_dpe_csr_hw_reset 1.090s 35.084us 5 5 100.00
keymgr_dpe_csr_rw 1.230s 81.131us 20 20 100.00
keymgr_dpe_csr_aliasing 6.100s 1969.941us 5 5 100.00
keymgr_dpe_same_csr_outstanding 2.680s 98.566us 20 20 100.00
tl_d_partial_access 50 50 100.00
keymgr_dpe_csr_hw_reset 1.090s 35.084us 5 5 100.00
keymgr_dpe_csr_rw 1.230s 81.131us 20 20 100.00
keymgr_dpe_csr_aliasing 6.100s 1969.941us 5 5 100.00
keymgr_dpe_same_csr_outstanding 2.680s 98.566us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 25 25 100.00
keymgr_dpe_tl_intg_err 5.740s 888.338us 20 20 100.00
keymgr_dpe_sec_cm 15.450s 10036.990us 5 5 100.00
shadow_reg_update_error 20 20 100.00
keymgr_dpe_shadow_reg_errors 3.130s 483.463us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
keymgr_dpe_shadow_reg_errors 3.130s 483.463us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
keymgr_dpe_shadow_reg_errors 3.130s 483.463us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
keymgr_dpe_shadow_reg_errors 3.130s 483.463us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
keymgr_dpe_shadow_reg_errors_with_csr_rw 5.120s 1576.238us 20 20 100.00
prim_count_check 5 5 100.00
keymgr_dpe_sec_cm 15.450s 10036.990us 5 5 100.00
prim_fsm_check 5 5 100.00
keymgr_dpe_sec_cm 15.450s 10036.990us 5 5 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:353) scoreboard [scoreboard] alert recov_operation_err did not trigger max_delay:*
keymgr_dpe_smoke 59542539486074368085436994617917076600347937940728871748105740307357415270655 3875
UVM_ERROR @ 1294992248 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:4
UVM_INFO @ 1294992248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---