| V1 |
|
87.23% |
| V2 |
|
65.11% |
| V2S |
|
76.85% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| otp_ctrl_wake_up | 1.930s | 59.121us | 1 | 1 | 100.00 | |
| smoke | 36 | 50 | 72.00 | |||
| otp_ctrl_smoke | 24.620s | 10556.586us | 36 | 50 | 72.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 4.590s | 1709.920us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| otp_ctrl_csr_rw | 2.930s | 88.892us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_bit_bash | 16.310s | 8248.936us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_aliasing | 10.220s | 360.489us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 16 | 20 | 80.00 | |||
| otp_ctrl_csr_mem_rw_with_rand_reset | 5.160s | 1871.672us | 16 | 20 | 80.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| otp_ctrl_csr_rw | 2.930s | 88.892us | 20 | 20 | 100.00 | |
| otp_ctrl_csr_aliasing | 10.220s | 360.489us | 5 | 5 | 100.00 | |
| mem_walk | 5 | 5 | 100.00 | |||
| otp_ctrl_mem_walk | 2.790s | 534.070us | 5 | 5 | 100.00 | |
| mem_partial_access | 5 | 5 | 100.00 | |||
| otp_ctrl_mem_partial_access | 2.590s | 155.601us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| dai_access_partition_walk | 0 | 1 | 0.00 | |||
| otp_ctrl_partition_walk | 232.290s | 106481.060us | 0 | 1 | 0.00 | |
| init_fail | 192 | 300 | 64.00 | |||
| otp_ctrl_init_fail | 9.040s | 2221.359us | 192 | 300 | 64.00 | |
| partition_check | 19 | 60 | 31.67 | |||
| otp_ctrl_background_chks | 14.940s | 6639.319us | 3 | 10 | 30.00 | |
| otp_ctrl_check_fail | 22.670s | 1205.173us | 16 | 50 | 32.00 | |
| regwen_during_otp_init | 26 | 50 | 52.00 | |||
| otp_ctrl_regwen | 14.550s | 4461.028us | 26 | 50 | 52.00 | |
| partition_lock | 16 | 50 | 32.00 | |||
| otp_ctrl_dai_lock | 36.390s | 12994.549us | 16 | 50 | 32.00 | |
| interface_key_check | 19 | 50 | 38.00 | |||
| otp_ctrl_parallel_key_req | 41.190s | 5283.322us | 19 | 50 | 38.00 | |
| lc_interactions | 205 | 250 | 82.00 | |||
| otp_ctrl_parallel_lc_req | 27.950s | 10917.803us | 27 | 50 | 54.00 | |
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| otp_dai_errors | 33 | 50 | 66.00 | |||
| otp_ctrl_dai_errs | 110.050s | 34036.071us | 33 | 50 | 66.00 | |
| otp_macro_errors | 19 | 50 | 38.00 | |||
| otp_ctrl_macro_errs | 38.540s | 2508.578us | 19 | 50 | 38.00 | |
| test_access | 11 | 50 | 22.00 | |||
| otp_ctrl_test_access | 112.250s | 18074.035us | 11 | 50 | 22.00 | |
| stress_all | 2 | 50 | 4.00 | |||
| otp_ctrl_stress_all | 240.740s | 62014.768us | 2 | 50 | 4.00 | |
| intr_test | 50 | 50 | 100.00 | |||
| otp_ctrl_intr_test | 3.080s | 572.763us | 50 | 50 | 100.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| otp_ctrl_alert_test | 4.630s | 853.399us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| otp_ctrl_tl_errors | 11.160s | 2763.789us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| otp_ctrl_tl_errors | 11.160s | 2763.789us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 4.590s | 1709.920us | 5 | 5 | 100.00 | |
| otp_ctrl_csr_rw | 2.930s | 88.892us | 20 | 20 | 100.00 | |
| otp_ctrl_csr_aliasing | 10.220s | 360.489us | 5 | 5 | 100.00 | |
| otp_ctrl_same_csr_outstanding | 5.410s | 248.636us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 4.590s | 1709.920us | 5 | 5 | 100.00 | |
| otp_ctrl_csr_rw | 2.930s | 88.892us | 20 | 20 | 100.00 | |
| otp_ctrl_csr_aliasing | 10.220s | 360.489us | 5 | 5 | 100.00 | |
| otp_ctrl_same_csr_outstanding | 5.410s | 248.636us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| sec_cm_additional_check | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| tl_intg_err | 23 | 25 | 92.00 | |||
| otp_ctrl_tl_intg_err | 42.490s | 23536.208us | 20 | 20 | 100.00 | |
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| prim_count_check | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| prim_fsm_check | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| otp_ctrl_tl_intg_err | 42.490s | 23536.208us | 20 | 20 | 100.00 | |
| sec_cm_secret_mem_scramble | 36 | 50 | 72.00 | |||
| otp_ctrl_smoke | 24.620s | 10556.586us | 36 | 50 | 72.00 | |
| sec_cm_part_mem_digest | 36 | 50 | 72.00 | |||
| otp_ctrl_smoke | 24.620s | 10556.586us | 36 | 50 | 72.00 | |
| sec_cm_dai_fsm_sparse | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_kdi_fsm_sparse | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_lci_fsm_sparse | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_part_fsm_sparse | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_scrmbl_fsm_sparse | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_timer_fsm_sparse | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_dai_ctr_redun | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_kdi_seed_ctr_redun | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_kdi_entropy_ctr_redun | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_lci_ctr_redun | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_part_ctr_redun | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_scrmbl_ctr_redun | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_timer_integ_ctr_redun | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_timer_cnsty_ctr_redun | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_timer_lfsr_redun | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_dai_fsm_local_esc | 181 | 205 | 88.29 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_lci_fsm_local_esc | 178 | 200 | 89.00 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| sec_cm_kdi_fsm_local_esc | 178 | 200 | 89.00 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| sec_cm_part_fsm_local_esc | 197 | 250 | 78.80 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| otp_ctrl_macro_errs | 38.540s | 2508.578us | 19 | 50 | 38.00 | |
| sec_cm_scrmbl_fsm_local_esc | 178 | 200 | 89.00 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| sec_cm_timer_fsm_local_esc | 181 | 205 | 88.29 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_dai_fsm_global_esc | 181 | 205 | 88.29 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_lci_fsm_global_esc | 178 | 200 | 89.00 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| sec_cm_kdi_fsm_global_esc | 178 | 200 | 89.00 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| sec_cm_part_fsm_global_esc | 197 | 250 | 78.80 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| otp_ctrl_macro_errs | 38.540s | 2508.578us | 19 | 50 | 38.00 | |
| sec_cm_scrmbl_fsm_global_esc | 178 | 200 | 89.00 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| sec_cm_timer_fsm_global_esc | 181 | 205 | 88.29 | |||
| otp_ctrl_parallel_lc_esc | 89.830s | 28517.570us | 178 | 200 | 89.00 | |
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_part_data_reg_integrity | 192 | 300 | 64.00 | |||
| otp_ctrl_init_fail | 9.040s | 2221.359us | 192 | 300 | 64.00 | |
| sec_cm_part_data_reg_bkgn_chk | 16 | 50 | 32.00 | |||
| otp_ctrl_check_fail | 22.670s | 1205.173us | 16 | 50 | 32.00 | |
| sec_cm_part_mem_regren | 16 | 50 | 32.00 | |||
| otp_ctrl_dai_lock | 36.390s | 12994.549us | 16 | 50 | 32.00 | |
| sec_cm_part_mem_sw_unreadable | 16 | 50 | 32.00 | |||
| otp_ctrl_dai_lock | 36.390s | 12994.549us | 16 | 50 | 32.00 | |
| sec_cm_part_mem_sw_unwritable | 16 | 50 | 32.00 | |||
| otp_ctrl_dai_lock | 36.390s | 12994.549us | 16 | 50 | 32.00 | |
| sec_cm_lc_part_mem_sw_noaccess | 16 | 50 | 32.00 | |||
| otp_ctrl_dai_lock | 36.390s | 12994.549us | 16 | 50 | 32.00 | |
| sec_cm_access_ctrl_mubi | 16 | 50 | 32.00 | |||
| otp_ctrl_dai_lock | 36.390s | 12994.549us | 16 | 50 | 32.00 | |
| sec_cm_token_valid_ctrl_mubi | 36 | 50 | 72.00 | |||
| otp_ctrl_smoke | 24.620s | 10556.586us | 36 | 50 | 72.00 | |
| sec_cm_lc_ctrl_intersig_mubi | 16 | 50 | 32.00 | |||
| otp_ctrl_dai_lock | 36.390s | 12994.549us | 16 | 50 | 32.00 | |
| sec_cm_test_bus_lc_gated | 36 | 50 | 72.00 | |||
| otp_ctrl_smoke | 24.620s | 10556.586us | 36 | 50 | 72.00 | |
| sec_cm_test_tl_lc_gate_fsm_sparse | 3 | 5 | 60.00 | |||
| otp_ctrl_sec_cm | 350.570s | 18498.874us | 3 | 5 | 60.00 | |
| sec_cm_direct_access_config_regwen | 26 | 50 | 52.00 | |||
| otp_ctrl_regwen | 14.550s | 4461.028us | 26 | 50 | 52.00 | |
| sec_cm_check_trigger_config_regwen | 36 | 50 | 72.00 | |||
| otp_ctrl_smoke | 24.620s | 10556.586us | 36 | 50 | 72.00 | |
| sec_cm_check_config_regwen | 36 | 50 | 72.00 | |||
| otp_ctrl_smoke | 24.620s | 10556.586us | 36 | 50 | 72.00 | |
| sec_cm_macro_mem_integrity | 19 | 50 | 38.00 | |||
| otp_ctrl_macro_errs | 38.540s | 2508.578us | 19 | 50 | 38.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| otp_ctrl_low_freq_read | 0 | 1 | 0.00 | |||
| otp_ctrl_low_freq_read | 114.960s | 46093.790us | 0 | 1 | 0.00 | |
| stress_all_with_rand_reset | 0 | 100 | 0.00 | |||
| otp_ctrl_stress_all_with_rand_reset | 27.350s | 2001.799us | 0 | 100 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Offending '(cio_test_en_o == *)' | ||||
| otp_ctrl_csr_mem_rw_with_rand_reset | 86120950269904101718932716539193537265707531611490953826949285356233781981416 | 95 |
Offending '(cio_test_en_o == 0)'
UVM_ERROR @ 258345975 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 258345975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_csr_mem_rw_with_rand_reset | 75458785203768691864523489299317106369322664469006298753477416773690554462324 | 89 |
Offending '(cio_test_en_o == 0)'
UVM_ERROR @ 61172548 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 61172548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_scoreboard.sv:605) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * | ||||
| otp_ctrl_csr_mem_rw_with_rand_reset | 77793283996436902871048851265125307779460147713921231415270376702076486642894 | 88 |
UVM_ERROR @ 34329255 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34329255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_csr_mem_rw_with_rand_reset | 114031358426831764584200070467170251645718781385676471843011161694797143443200 | 88 |
UVM_ERROR @ 497571796 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 497571796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 19969093790110144973962764148828620667319275080258800651869996093505045963017 | 93 |
UVM_ERROR @ 74560605 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 74560605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 113742477088497334583914947008793141268004138811242423362047843009666141944161 | 203 |
UVM_ERROR @ 1240231994 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1240231994 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 39916142268984997631945073635703652345303521069866245450409217328502245910907 | 117 |
UVM_ERROR @ 47499773 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 47499773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 5431085973691967934493487879578092187703666849234833882632211542265774013748 | 88 |
UVM_ERROR @ 497308940 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 497308940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 103771316639075639061156767511098169181536182495335671585184436521797840640379 | 208 |
UVM_ERROR @ 1338846470 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1338846470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 109019621655410919382496109721308425770435082660217459425887347580686412338589 | 89 |
UVM_ERROR @ 50085492 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 50085492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 80305388073780793722201039542297808035346011726384744261143799239041558684632 | 91 |
UVM_ERROR @ 502050985 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 502050985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 64336337069992173597142473915578914332617825638158195070262567624665724981570 | 89 |
UVM_ERROR @ 63526009 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63526009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 34623214196542190693700460025887644370137168160225795729321049673230576408386 | 88 |
UVM_ERROR @ 31162030 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31162030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 75765142457881786608183822130403487564621288397256292042748562107979583356678 | 2137 |
UVM_ERROR @ 299641420 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 299641420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 100237875141139536012801800349252003326729299165886673372212085222676063509254 | 91 |
UVM_ERROR @ 502616125 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 502616125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 39115070466843482804019604339931521999768287541959593155153298792901472524328 | 88 |
UVM_ERROR @ 86651117 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 86651117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 107060367149880840341401280962070072560082522370678621139797988183474576168031 | 89 |
UVM_ERROR @ 31282039 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31282039 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 98254290200273358075703760576452303541903704579623520512560345780302384310020 | 101 |
UVM_ERROR @ 111924259 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 111924259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 45356309030170475221043584258307226739520603873500414357832446212963776522128 | 88 |
UVM_ERROR @ 32782845 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32782845 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 93532460440309353650283412725324378573485536320839175562924152719601903744440 | 88 |
UVM_ERROR @ 33189939 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33189939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 41553195648948306105032433627947553377888619916825678608873385391992982691814 | 88 |
UVM_ERROR @ 502800272 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 502800272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 58078476670087740057773471570730118360264703023149716506940040532739549155889 | 96 |
UVM_ERROR @ 127760178 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 127760178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 71273077814051163616890965738796142911282311104419579782715901839722100286050 | 90 |
UVM_ERROR @ 39960435 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 39960435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 28167157985910558684820312140572892530402770938991166390026201606617011478190 | 88 |
UVM_ERROR @ 511652233 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 511652233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 27252343958979669219314935833587104708323836842802133274959205357324018488313 | 88 |
UVM_ERROR @ 497143513 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 497143513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 108813786818306917104181321930492025292851793101859936344199832186543812070827 | 92 |
UVM_ERROR @ 34406171 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34406171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 43241623836068616962247162786623455154516395236642538049726391149803405758582 | 88 |
UVM_ERROR @ 33362270 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33362270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 24584526540804899173844711561739465143219960127052763548634488414831099030892 | 93 |
UVM_ERROR @ 122009056 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 122009056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 73654399972138608076611435967044960084480226205953466525440251821203242536892 | 91 |
UVM_ERROR @ 509079527 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 509079527 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 4253041250059596387124085013351055788457386328202539719790983624718253370937 | 164 |
UVM_ERROR @ 68740125 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 68740125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 32548996537394319113624365929991292177683160144704825498609840318667218419081 | 95 |
UVM_ERROR @ 505935543 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 505935543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 29875945105021559756310866797695532679516043719186442109494681131210012083380 | 88 |
UVM_ERROR @ 500529482 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 500529482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 106554120613411592650658919060553307432920570836529684714649757644955541229448 | 103 |
UVM_ERROR @ 60872563 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 60872563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 27912787975506456279978608613747133120292773988224464372017475954418951732428 | 1491 |
UVM_ERROR @ 975311326 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 975311326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 93778524774750454075153498830602016861638476043879820690357425714546264747333 | 109 |
UVM_ERROR @ 32535370 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32535370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 9366059796897950830086957912213262589108803642442962024322641950501648524872 | 97 |
UVM_ERROR @ 31685816 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31685816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 27880410960758920397552123443381732248079162849375755577057807883233799941965 | 198 |
UVM_ERROR @ 544184872 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 544184872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 37288689656977740817689626187558928953564731362599457429374987455331759768390 | 93 |
UVM_ERROR @ 43385926 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 43385926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 21488297933897898916479816388073358524749962863149583854486042366690826232394 | 435 |
UVM_ERROR @ 132590317 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 132590317 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 38919528332688473807686169386318798541737389034179186019356942418234966193738 | 91 |
UVM_ERROR @ 500279091 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 500279091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 2259996609451964449690099711818139580085873771102069228574481847693356741429 | 95 |
UVM_ERROR @ 33490322 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33490322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 84006597391120901741213261725531970849033441050017846238451196321925614113151 | 97 |
UVM_ERROR @ 31712789 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31712789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 41008060763293216966207685038876454796271486228932552711599621559353116716005 | 93 |
UVM_ERROR @ 65593360 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 65593360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 21704126920153964584797774353268630461060606352695835385967143369965705678124 | 115 |
UVM_ERROR @ 136832474 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 136832474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 73254440571777389456701299200464635219603265393542372935785775834265897951252 | 97 |
UVM_ERROR @ 35631432 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 35631432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 65026859750212015432371949294098152076422269972113662477763050067162903433488 | 97 |
UVM_ERROR @ 515277692 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 515277692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 84422424640656351673155151323798750936133664114667184022194368613854880041896 | 92 |
UVM_ERROR @ 30604870 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30604870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 68476823661525391364640993086636603501962154667220318716081716378120163664850 | 99 |
UVM_ERROR @ 126017453 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 126017453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 24831428522223084316693336386418112506836021429354655431482328892127391177973 | 92 |
UVM_ERROR @ 73309702 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 73309702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 107623062375616201919342197535888605610291152067866992240970046713325122343774 | 91 |
UVM_ERROR @ 66961204 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 66961204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 91857626322050401823658743320743221374332576850881179468602439443057970320722 | 91 |
UVM_ERROR @ 131896410 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 131896410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 81890898240523362919979158172638672745305073516128587087727257129633754986638 | 91 |
UVM_ERROR @ 42606121 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 42606121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 48358013000778320601044092125457123489735391300497612073394062228396404496017 | 93 |
UVM_ERROR @ 503306449 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 503306449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 61907730563013335372625974794749226975841727206651727330106782949341672733475 | 88 |
UVM_ERROR @ 122577824 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 122577824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 62940615626863499803487175924567801531360097451169905789805873839181995772058 | 89 |
UVM_ERROR @ 30404590 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30404590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 32215221303074651790008397942566095876514349827969658833707204895727048318499 | 89 |
UVM_ERROR @ 31766912 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31766912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 53639814909188684240425055027445828884761594667266262502163795032827049409257 | 93 |
UVM_ERROR @ 40596735 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 40596735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 16266040322673755706729168571871522856523123417816705146644744533352139605510 | 89 |
UVM_ERROR @ 121987358 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 121987358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 95564244604377098782092799279417883480486869860731760753927152597660638689970 | 4021 |
UVM_ERROR @ 1285700709 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1285700709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 52478477351507419094782314268526180003039555793008151387041890441803804643674 | 89 |
UVM_ERROR @ 31981766 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31981766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 17932339775872647069339593301190024890522177202210531034152511659262728442043 | 95 |
UVM_ERROR @ 65613553 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 65613553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 103059618706693755264073958714967804066234010320496102108850608535859054333424 | 99 |
UVM_ERROR @ 516318076 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 516318076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 36348565675955860175287254513517687793795336227981269269003721363292244481116 | 93 |
UVM_ERROR @ 505046978 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 505046978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 87629117762021353706189634374799905391855727704586413372141342985066749618231 | 89 |
UVM_ERROR @ 62764757 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62764757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 45248614718750996320691695426129567498681575732061119581760021485829159474416 | 93 |
UVM_ERROR @ 33296211 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33296211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 100041767571739345304147647805174938623910464612807341394494255391097119145249 | 91 |
UVM_ERROR @ 33428042 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33428042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 54314149426432422795099800651711331174873068038449459858626282567153679460070 | 209 |
UVM_ERROR @ 1272363296 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1272363296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 64910113532902008405429417083352168508724959324801443797030371831079270101520 | 1215 |
UVM_ERROR @ 442491081 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 442491081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 85639264016200498431403026067209209509373400833463950105428679916100462914600 | 88 |
UVM_ERROR @ 66230749 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 66230749 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 28930269281282899630678712455668255182095281747798818008376383138411309842287 | 89 |
UVM_ERROR @ 60347733 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 60347733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 35260632427046356111038524833066329674807287148167667936988070345398865805728 | 94 |
UVM_ERROR @ 499041240 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 499041240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 61651628934916452829503683567283401303926612917816062212803696821945453724103 | 88 |
UVM_ERROR @ 61683247 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 61683247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 38391056432427004762700206370776712324916894417244275033211182160632299846233 | 95 |
UVM_ERROR @ 31433882 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31433882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 81152694160831152533976516648692011476721940932169642970701189805246663403191 | 89 |
UVM_ERROR @ 130898342 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 130898342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 83152931604050644346329037284741795907630124981320108194773242326114436541530 | 101 |
UVM_ERROR @ 141717020 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 141717020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 63486351095753337898352183211292215864985020589627320723501246237692962619887 | 88 |
UVM_ERROR @ 110862700 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 110862700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 10903449114926104566949207413279655663523970136068709599838812219065638531960 | 89 |
UVM_ERROR @ 500427201 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 500427201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 90018874576420287388631339700182987464115957642149184170515681583695659253482 | 88 |
UVM_ERROR @ 33873862 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33873862 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 15112055954120628754298916285553101946300993756711222932771726783251505980933 | 88 |
UVM_ERROR @ 125160415 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125160415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 59998888492148341766214306024923422623748676779146348004943636653559857132323 | 94 |
UVM_ERROR @ 37777907 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 37777907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 52036506281739308781150035091023899735549869834293785954005071997396600246029 | 97 |
UVM_ERROR @ 32640576 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32640576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 90969791095145643809420170042751185550531520286341513583199804289554676421413 | 91 |
UVM_ERROR @ 503198999 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 503198999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 52079140327460743728854079588063662118369202436267034875772128130815453099863 | 95 |
UVM_ERROR @ 120115189 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120115189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 54166945664725817341909744886741058272644945551715951880065707817693397414099 | 89 |
UVM_ERROR @ 31445542 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31445542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 89727327723167154820898505661552384346245766299357407324222858894992476506340 | 88 |
UVM_ERROR @ 44310713 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 44310713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 1527256060681656075441745961878384951192150392743650185097215943740031043860 | 88 |
UVM_ERROR @ 31681139 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31681139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 81393942256069402058024369079611800522793489139359242789321726643319645639208 | 95 |
UVM_ERROR @ 75350787 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 75350787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 101761572615648850545338418762172320991935269454436707692115406974442584618849 | 99 |
UVM_ERROR @ 31696063 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31696063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 87803968714714179563212344471487584164984900284207455131342215395332085682475 | 97 |
UVM_ERROR @ 125324601 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125324601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 67394138333047615456146171413623285190698528048860771325261342227697997365011 | 103 |
UVM_ERROR @ 33657261 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33657261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 38952493539391452537178379738940469618637208665569121486781450529472449647366 | 244 |
UVM_ERROR @ 1480239199 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1480239199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 12737054009324131220743041667143231786161172886915404105897657968174839603270 | 89 |
UVM_ERROR @ 55503513 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 55503513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 776138682826109268294875744287409439199692295002865845160237292043640303565 | 89 |
UVM_ERROR @ 119724873 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 119724873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 69818768836872572603409917664619035578543708277824204875345019046567877147041 | 88 |
UVM_ERROR @ 79759566 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 79759566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 24843517291753401426417045366429409821274034115907833500663358692247162343617 | 99 |
UVM_ERROR @ 65689742 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 65689742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 24314217055685531656983994220048436318712133718689664214229690619729393487095 | 1891 |
UVM_ERROR @ 2001798533 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 2001798533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 98127977838266266651507553983197208704510575475821915341668437994844267286998 | 105 |
UVM_ERROR @ 83150113 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 83150113 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 75625623423633897245418643317806033911789553856672847925509475437229335972944 | 88 |
UVM_ERROR @ 31342229 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31342229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 13484943362923610253651396392886437919883667634466420346981729655790581070711 | 93 |
UVM_ERROR @ 121098266 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 121098266 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 92852428028046559105879210238738494423694577633207659254577130615790232087211 | 91 |
UVM_ERROR @ 507768770 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 507768770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 100634046728931725225251076689693471039814885706371685964614586380377862115241 | 99 |
UVM_ERROR @ 33353182 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33353182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | ||||
| otp_ctrl_partition_walk | 48769931405328724538690119265203515575610406672595458381507084439769136499195 | 112650 |
UVM_ERROR @ 106481060480 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_partition_walk_vseq] Check failed rdata0 == exp_data0 (0 [0x0] vs 16080 [0x3ed0]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 106481060480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | ||||
| otp_ctrl_low_freq_read | 53855585350903653891122472064071490893536623144074552300894845616073658017379 | 86 |
UVM_ERROR @ 46093789795 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 46093789795 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 62618051318444704443527514916433225270185674963297450446703456783534822333437 | 87 |
UVM_ERROR @ 46133803237 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 46133803237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 76529776491285725235808067013382360328751308166222629028498798711202982233037 | 8692 |
UVM_ERROR @ 27448674698 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 27448674698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 36751251958582777356777254916911763372228130513816832368524912174661131266312 | 51174 |
UVM_ERROR @ 65422916633 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 65422916633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 104475469491507486270360875489748299982607635471927153071995417563330704411877 | 87 |
UVM_ERROR @ 22208101588 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22208101588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 106873704881424819106071307164402223301071403151638554669656463761051780462505 | 87 |
UVM_ERROR @ 22190632651 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22190632651 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 56946684476215435996050095396599331021839445896374511733368171600038673460577 | 174 |
UVM_ERROR @ 22348841002 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22348841002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 72640470197067050432098243698896885980073359031551810502296171972255693171397 | 7291 |
UVM_ERROR @ 46594553254 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 46594553254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 42688083306942813793852308808819297070081254010919779335905319685305657305484 | 46495 |
UVM_ERROR @ 62014767772 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 62014767772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 27900104076440922239152208181485029287963435537253412891539011337923211359764 | 87 |
UVM_ERROR @ 22312782260 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22312782260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr | ||||
| otp_ctrl_parallel_lc_req | 33364163896012004201415715711199235521402632354132236476447320791787330562019 | 10830 |
UVM_ERROR @ 484677600 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 484677600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 12583677135210196511357013224456983710275109710245736197555565659673460803960 | 3104 |
UVM_ERROR @ 501480536 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 501480536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 6452562378655353746557650577416778516702409188814432842627502140128611227399 | 8127 |
UVM_ERROR @ 314365608 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 314365608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 65342204939325720029045784664842054993471081417572333391088397928055716082458 | 19923 |
UVM_ERROR @ 4383790709 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 4383790709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 49685485497286454537248713465121433564725840794975499965742655387447203652287 | 15366 |
UVM_ERROR @ 4707362943 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 4707362943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 42551071631854479247387030244191829338456751971435675312158081906515981639713 | 1501 |
UVM_ERROR @ 244547883 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 244547883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 89921941653328898900422636713673616926137309671600190264104349865274480963763 | 2708 |
UVM_ERROR @ 4402048811 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 4402048811 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 23891162393502117617304978515944265413715036231136331376565371075126638751051 | 10007 |
UVM_ERROR @ 623713984 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 623713984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 1200284788444589000650497241398742855041548632978730774690872891107620441471 | 37977 |
UVM_ERROR @ 1358896915 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1358896915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 59581487711999131695902191161203611588686825988679620913530006940549758367104 | 12641 |
UVM_ERROR @ 1059201652 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1059201652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 94086917833992350565091681233718992601865855809759262716773438653563796648458 | 7582 |
UVM_ERROR @ 523027648 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 523027648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 3052833125876854045366745647140746612263049291765916189082693890162840405156 | 15266 |
UVM_ERROR @ 2699402292 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2699402292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 102961649774204875110027547407656722868753197140721472949978958793049669355402 | 30782 |
UVM_ERROR @ 1159283559 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1159283559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 93629817757775259758616950490113075490075740698141104883364913789458396006572 | 19802 |
UVM_ERROR @ 1001740982 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1001740982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 3326655267533141414044591806903168601560593229002546445932702311849107243791 | 8199 |
UVM_ERROR @ 543978138 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 543978138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 45155586849229655814707934476658701743399854057955096318594640438470252648738 | 6222 |
UVM_ERROR @ 6660837003 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 6660837003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 19874108834714632757435582788378179301755832677279610738350178253582506787868 | 15540 |
UVM_ERROR @ 383150287 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 383150287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 61594827629883370347496137659198265778569493388908837191888114163262716848862 | 20539 |
UVM_ERROR @ 1137902426 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1137902426 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 30212584229363808475271121788252700089352183585913442579152923529046159932604 | 3921 |
UVM_ERROR @ 168646558 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 168646558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 85999308531518487790336364111656745161883589071003306080047789808961868135969 | 47432 |
UVM_ERROR @ 898386883 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 898386883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 73934774242648286352966342059358474377374338476788008692312185271819811436889 | 2820 |
UVM_ERROR @ 287969980 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 287969980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 2594189034088736450723214177271194515060417694507957691983248605117438906625 | 26144 |
UVM_ERROR @ 28016195134 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 28016195134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 59546233873899617621058434512558023868115969345127604474199921072637094304966 | 11511 |
UVM_ERROR @ 278113961 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 278113961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 101418299120623286812398635799620289757643391038386940333717875107610688376165 | 2053 |
UVM_ERROR @ 68622099 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 68622099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 76115332967062449815549294829527272594614365980176184669673306006369820545274 | 4834 |
UVM_ERROR @ 296768443 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 296768443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 20687202119540571644602515121633356636094537880452500319954335140413905475016 | 5848 |
UVM_ERROR @ 938840482 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 938840482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 47092100129503390250337989819418962365610819484946460730778608415274272386293 | 26028 |
UVM_ERROR @ 5283321504 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 5283321504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 31131154571830046749560820219063922674125996002178089747306022040212022963116 | 9243 |
UVM_ERROR @ 507265066 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 507265066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 102803605976944646158202851447253890158560899298973631014332504473719849089962 | 1896 |
UVM_ERROR @ 347132953 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 347132953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 102097502768509427097276586486836114101397209255507216850591548606699293954695 | 7700 |
UVM_ERROR @ 5278281803 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 5278281803 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 68698172014862174690660130696233737860707443956149261937908173142060412386370 | 11093 |
UVM_ERROR @ 2788735548 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2788735548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 102360724913827648458109472206203808397607509344227348400106727359306988376086 | 30764 |
UVM_ERROR @ 3583362247 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 3583362247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 21727672816134418195915729272000184045420807456395174357893791568037554670873 | 20571 |
UVM_ERROR @ 1596950724 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1596950724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 1021902993956331887731961306928990881947151331995801999939411082466523169113 | 3820 |
UVM_ERROR @ 4887014105 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 4887014105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 73867156485469237752793664560775384480565506910531315285521714494509183577444 | 11415 |
UVM_ERROR @ 5418905978 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 5418905978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* | ||||
| otp_ctrl_dai_errs | 50902243910609570327194652167336212313318490926253331562143641295643263727578 | 801 |
UVM_ERROR @ 436397374 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 436397374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 67055220794880506280077318807612454823680009941472449232145301998925926304750 | 11682 |
UVM_ERROR @ 1169963389 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1169963389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 15152091198205669005019584363387219309747587137615177289059278940337102931361 | 3985 |
UVM_ERROR @ 177323812 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 177323812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 75279377433261873642566708865259802579528580025532021379477402441328226909111 | 953 |
UVM_ERROR @ 313815225 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 313815225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 26476236582353936715735980436744534057212323252892871296566270843868554168388 | 15816 |
UVM_ERROR @ 6355913427 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6355913427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 54260383452866151854436553369580769398144484606599713628376068585151370588489 | 8194 |
UVM_ERROR @ 435863915 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 435863915 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 76800736342089152255692114555210262338380491811773403511120117097909867328853 | 5010 |
UVM_ERROR @ 368359350 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 368359350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 33206306062716444708814228316070307567587358463380927035234876513092606274821 | 3225 |
UVM_ERROR @ 291894249 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 291894249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 114817073248225910368455184301621964299836362117947249545017768302400946593497 | 5562 |
UVM_ERROR @ 354845831 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 354845831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 30226192170015623757264264635931807652766328992404950837367811480037728974198 | 3776 |
UVM_ERROR @ 490309083 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 490309083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 101387902598971598305597857414434276842752159792847632589641968443837024237968 | 2855 |
UVM_ERROR @ 298235792 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 298235792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 109057394584259822692614864348479740359715377859121942486131830565316172805413 | 3943 |
UVM_ERROR @ 491525920 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 491525920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 78624585693352233803819582266485065875238475461239137076001091107688344553130 | 3371 |
UVM_ERROR @ 245609036 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 245609036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 48803963159221429583777086837446153914970188849089334342281112926586737197116 | 2375 |
UVM_ERROR @ 60761557 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 60761557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 3929269806119263383921899597128535723567819912659338912527826881141412462897 | 5709 |
UVM_ERROR @ 2196547428 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2196547428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 96284652251564329378378397170926621964049391694829373830204352364766190530020 | 853 |
UVM_ERROR @ 145189599 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 145189599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 15124432231753353557763106476747233290937364737223869803680658910526164717601 | 5608 |
UVM_ERROR @ 6205688237 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6205688237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 60270108099893958029595879984942452022421116075131683000563673454963894770312 | 157 |
UVM_ERROR @ 865233417 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 865233417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 13363625077994611950662265852697609966431678257082490905927931362809929788458 | 2379 |
UVM_ERROR @ 126704107 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 126704107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 71655471113267817146026915710380756022463928592008664212086481656333002753420 | 39608 |
UVM_ERROR @ 2090607346 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2090607346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 79565122865562484154499131745583699709440045215539587661113167106320389462421 | 3875 |
UVM_ERROR @ 79347735 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 79347735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 70055669633359617385803896386523938660362820913027136945986077655846619673147 | 401 |
UVM_ERROR @ 133689209 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 133689209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 48421092473500215529786400556192223185433343173337784052106425517988969720418 | 9116 |
UVM_ERROR @ 188641148 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 188641148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 88332973470088846462479190089515506144477503915282986326847891079908921293636 | 1027 |
UVM_ERROR @ 142123658 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 142123658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 106007077723570858411716572901624341973725061808453133037233349491485877366927 | 4044 |
UVM_ERROR @ 105018418 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 105018418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 3919311284886131818793806540151684334573392902125177863237672864037942111359 | 231 |
UVM_ERROR @ 128250700 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 128250700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 104585864592770690810935482904484692339205690767627384889572663860905858497809 | 3927 |
UVM_ERROR @ 255519147 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 255519147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 88483913576220137332780953254209626410291786120309308591334494952188270841798 | 1013 |
UVM_ERROR @ 64988108 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 64988108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 31273303965472220165769149767499853261721498347448541440548214183671163128642 | 1692 |
UVM_ERROR @ 2487564163 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2487564163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 63929104753101739649441391261345902544937768127322566815694999025766592147113 | 1787 |
UVM_ERROR @ 222052090 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 222052090 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 63669755168354493229758747225397325333028260622218090164692877542188187989488 | 1557 |
UVM_ERROR @ 122491046 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 122491046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 110389203149893563550903726077492063482441702231043104463168208270420127657228 | 7253 |
UVM_ERROR @ 567773682 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 567773682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 112764472746864555455000476050019453343757514490939651048030736020721980019013 | 4044 |
UVM_ERROR @ 113040528 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 113040528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 54288893006819770323904590002023404871571573810793995876489071993031855993856 | 2857 |
UVM_ERROR @ 110905099 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 110905099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 57749938819525560375916080708790629920665575332936162248632050099441480815542 | 18104 |
UVM_ERROR @ 384157221 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 384157221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 1492866231699468185021377654118414738042354656417775757189170277154865688768 | 1845 |
UVM_ERROR @ 138339629 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 138339629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 41141911140177750713752446791458445446002073456471881256958446493777156154132 | 1781 |
UVM_ERROR @ 1072287626 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1072287626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 114900982206343289614430658413159381301367539197735350196724717899657622130272 | 1851 |
UVM_ERROR @ 139846112 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 139846112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 34828789787694977271225065332565508434845636078189240897081870612647439531658 | 1897 |
UVM_ERROR @ 108180083 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 108180083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 70147387777599034160283848048212616784908943485497816552488384920393611630833 | 5272 |
UVM_ERROR @ 971264208 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 971264208 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 104105501897925408650701062555228323710088756707626654551317508168507651582675 | 523 |
UVM_ERROR @ 346869891 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 346869891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 39806097675202754936757955995815177094714215726993455119689941572918717917116 | 7083 |
UVM_ERROR @ 461282240 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 461282240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 11506464192717600267006792866292936536882781968367441169067274480497569251135 | 3052 |
UVM_ERROR @ 155447299 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 155447299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 45054614405483772656410685216768648592458458434108554065715522470590780162391 | 3957 |
UVM_ERROR @ 96983844 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 96983844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 71448389694551536686390707168541644074596476898864651929944197688128402301846 | 1449 |
UVM_ERROR @ 250385444 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 250385444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 35086630375953444474969251242895285525855298335227940800360552578573438838891 | 2651 |
UVM_ERROR @ 959138687 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 959138687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 110507260555478940369304008708357036130799533206724589114459726082678342704999 | 2095 |
UVM_ERROR @ 278019269 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 278019269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 46665910404119244607228081109971088106644885591555168031770091028205846932889 | 475 |
UVM_ERROR @ 76668410 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 76668410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 82612641338377126211505807186747334448229667967261879319670698210596279272707 | 525 |
UVM_ERROR @ 1576301403 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1576301403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 63129027386486107001622607940055751427133399045046922290177347800331578627521 | 3083 |
UVM_ERROR @ 184430842 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 184430842 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 89289738706129748800858750729638868570601164648754874889014838800931998278367 | 157 |
UVM_ERROR @ 145408218 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 145408218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 51018881233603728960808141963094694716041850565364608823347118963714893769395 | 5772 |
UVM_ERROR @ 6553991623 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6553991623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 98899773784533295440920170722119389050425196026689760433259994336714638791000 | 15088 |
UVM_ERROR @ 1335376206 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1335376206 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 63278714371597258509995385067805201160271562959474278430344580027743858772724 | 4731 |
UVM_ERROR @ 219974978 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 219974978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 78415701780084714974130321726244113486147195023386420983949023789019595674730 | 1485 |
UVM_ERROR @ 110472327 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 110472327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 78181792931369172230299308704597722236018796986722888679238343372092266797592 | 2448 |
UVM_ERROR @ 190865209 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 190865209 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 53714249865066390648400602721070620279448305642830169052080009436576493619729 | 1503 |
UVM_ERROR @ 113736345 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 113736345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 21383581552972268417354774130461970217116121012973281241756996240919455604938 | 2437 |
UVM_ERROR @ 1362008126 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1362008126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 53368670098866699990005003965893261852247740509960822394777003324723749674418 | 7117 |
UVM_ERROR @ 768446184 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 768446184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 29896671337480751215896781617572645834684216247401518682367706481972059581584 | 5814 |
UVM_ERROR @ 1340511398 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1340511398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 41583981024576631643761781132431700757530416981794769207560265341378355066471 | 7831 |
UVM_ERROR @ 267093906 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 267093906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 51435444819886573290851410912372699578618760026772955413332117642030400973820 | 12330 |
UVM_ERROR @ 547194611 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 547194611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 65867140776230285033315026524338567195052982966252831238331900305619052654360 | 1361 |
UVM_ERROR @ 121608769 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 121608769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 68821991096443836616187585669727689777010959647305769682211589319870518678097 | 867 |
UVM_ERROR @ 337643073 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 337643073 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 30285964516279167133038763287810818780211300500911254897507801216265828649502 | 16084 |
UVM_ERROR @ 517299420 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 517299420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 53665402732065301922695604223027623456327106317293936635771695543201522011944 | 2487 |
UVM_ERROR @ 729102387 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 729102387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 98398763125854729900254061422557686536275766237300936745537965866208344945014 | 9255 |
UVM_ERROR @ 7373438171 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 7373438171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 80674147277048039429720962104947899607145799110470674997705239291336177028363 | 2761 |
UVM_ERROR @ 1290903430 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1290903430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 46137151013857018900246210838657271279060820669575228055334803099852597985742 | 3727 |
UVM_ERROR @ 271481562 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 271481562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 115139400045496820939936195130552247334288304680028746337863168346869289123549 | 909 |
UVM_ERROR @ 60439251 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 60439251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 57732115264006366498145958247816649401994165216586120989377760554460492455798 | 4070 |
UVM_ERROR @ 4516079907 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4516079907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 86196770099382986998908682507962439903710233355933453613138284861908085471441 | 335 |
UVM_ERROR @ 727127376 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 727127376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 107359522795605542941994424678152828418687060172163150878935265210265015260812 | 7138 |
UVM_ERROR @ 8059340574 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 8059340574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 103207278373666931104035123712285750488225054849207650431948887530591334954358 | 1177 |
UVM_ERROR @ 1379025265 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1379025265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 12563232960860214644767600418768524862194964056818537828304807449708951422479 | 21892 |
UVM_ERROR @ 3992414523 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3992414523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 89353152530894972669302095794205811021047976175880183064611827383366256304266 | 11063 |
UVM_ERROR @ 406684645 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 406684645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 23454486483830533639770952277652565334928251002532597554827274840224173111650 | 2097 |
UVM_ERROR @ 688765825 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 688765825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 45426099191623178121870001091572826362143508592790560122169630565539780581734 | 49355 |
UVM_ERROR @ 728648826 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 728648826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 41421815856587731412042901095309227622780207955487066360230390030775055722272 | 3663 |
UVM_ERROR @ 72470712 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 72470712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 1853759851363079026904080770635173272302159564535623116863406561186911265 | 6934 |
UVM_ERROR @ 702083304 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 702083304 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 81554358424626613232679984977550591094739577532812484351115626390404325256282 | 6767 |
UVM_ERROR @ 238505504 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 238505504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 82490421469445075697960009982655702094997803583387689559890821711622952885788 | 3799 |
UVM_ERROR @ 269742546 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 269742546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 76423168505807287844457750278700685951441482968893144448177229252678988935239 | 6524 |
UVM_ERROR @ 5451715909 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 5451715909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 106003532280205224320356352244785764631419343811527776926578627943755516703411 | 239 |
UVM_ERROR @ 35660319 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 35660319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 112250050984933029202337518111865256233413187296156636859851120156329908088173 | 14151 |
UVM_ERROR @ 1074428883 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1074428883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 24466630689815996887955749538204664746636055845360557239411599310068765287294 | 6051 |
UVM_ERROR @ 4119102459 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4119102459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 19873486274972487444032223858948479219323015508500963905353958365190666788612 | 651 |
UVM_ERROR @ 57393789 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 57393789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 36199703185994631556287971890678338416964703891546250985836278230877764187435 | 7790 |
UVM_ERROR @ 1393662631 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1393662631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 94633800744264856017844061274719271691235688324691879955137013077236009512654 | 2550 |
UVM_ERROR @ 736596697 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 736596697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 7703623490585123831177379038645950009571768547505207609427374541721785232698 | 2035 |
UVM_ERROR @ 214949811 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 214949811 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 105826654598181556088497832575555740934400239712956119870525520644516536256636 | 1719 |
UVM_ERROR @ 77949582 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 77949582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 36202507296605691890720130110757513229687621833830448831518596863358193444915 | 2274 |
UVM_ERROR @ 449303087 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 449303087 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 49975683930787764048159535263276684163651291474701189849366254800311478150203 | 18694 |
UVM_ERROR @ 7206327223 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 7206327223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 33604154101473008228733489424015849124247238784854308073236586866037972496135 | 2735 |
UVM_ERROR @ 119644949 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 119644949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 86155990914746817997387168826041117449969415002489579216927432178700029764219 | 11290 |
UVM_ERROR @ 864176511 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 864176511 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 22101281390380723346672208879363225025265119596527459473797973717613381655388 | 2061 |
UVM_ERROR @ 264920881 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 264920881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 35207597502172226237216313069898382827807858096669896159097063344125345440017 | 1195 |
UVM_ERROR @ 78422532 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 78422532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 44533599563276074946028255408305711308321365165842358371397133692029216457123 | 1117 |
UVM_ERROR @ 2588713854 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2588713854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 79370542449936123079779667733935429964831671744143091666071120414292190311266 | 12104 |
UVM_ERROR @ 12994549181 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 12994549181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 110762015634216899082561554461556727916800349523535846264746234736441448068121 | 4253 |
UVM_ERROR @ 264688017 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 264688017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 86916228969713647150705795044352207755084807220495029812389249199784400522734 | 11725 |
UVM_ERROR @ 602872883 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 602872883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 10015950827527518131137542238957419736091185455662749758621487932869172588635 | 656 |
UVM_ERROR @ 78529470 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 78529470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 82113770931435112616982818364127313212180956317758328845790634801249890731321 | 4487 |
UVM_ERROR @ 155410914 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 155410914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 99175742450950320916643441166729559219053986024068766711009809286921337905779 | 2936 |
UVM_ERROR @ 536352456 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 536352456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 26355478013311631908212705256043050071623240116319747250723181392769937232269 | 4633 |
UVM_ERROR @ 176894983 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 176894983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 62076919091598835098050817402828251747200934183377334440125412105272276942729 | 5219 |
UVM_ERROR @ 3581625740 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3581625740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 96626844044250779834627310757818266475512504601878183506059613966305981989360 | 5193 |
UVM_ERROR @ 231355503 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 231355503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 89669079239172105058365376459212596754754677204290678326685806711123683121218 | 33940 |
UVM_ERROR @ 9403613094 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 9403613094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 37994400780929297687444041869886969669850565730294448578912699974532220086695 | 1857 |
UVM_ERROR @ 94807116 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 94807116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 9308346171663714825958756427397409237473411286005780157590773491417531066673 | 1252 |
UVM_ERROR @ 424107267 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 424107267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 72803947391787849383899670099894542262661192251739258949905842197800688263671 | 4915 |
UVM_ERROR @ 3352451250 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3352451250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 13968352960200761993602552143682522336675580495319128806233861865535969116735 | 541 |
UVM_ERROR @ 1358598290 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1358598290 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 19911690718994110673050130348881898843335793445888182840776688151628401240926 | 661 |
UVM_ERROR @ 1548347394 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1548347394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 79615891782556463979730396452487940391085868152483332446816580703944285944508 | 1515 |
UVM_ERROR @ 116152955 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 116152955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 100043760865956686446317772389903222467570239513806241850382172816064615607249 | 14144 |
UVM_ERROR @ 6068213094 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6068213094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 51249788089377061853456690582921356611322414235075028158949993973229395065260 | 1855 |
UVM_ERROR @ 406036116 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 406036116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 114599852884960986977308637459030092935012134733057996956736477134821271708987 | 2133 |
UVM_ERROR @ 69606921 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 69606921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 18529107312234942313187432619780998554927511427382420338153831015976459320034 | 10659 |
UVM_ERROR @ 978833641 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 978833641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 48432767173197698282493013921581563721807359773006797852706578618728372569660 | 4245 |
UVM_ERROR @ 285434594 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 285434594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 28233190135797103594326257169842817784460836685492506440730626330667649582845 | 893 |
UVM_ERROR @ 62294723 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 62294723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 56666300857526941904854271838398924698627974849034632863747385083136240348871 | 209 |
UVM_ERROR @ 71108972 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 71108972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 108607166443625047220246731110327317626594902332366312214439216025955198408865 | 3157 |
UVM_ERROR @ 86925733 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 86925733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 62749325857503050964389154014363597054914238176878744304177918501482816763936 | 2957 |
UVM_ERROR @ 88171533 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 88171533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 41129969115525137309813661016282305958686885122491972178885271993034572452200 | 1033 |
UVM_ERROR @ 93510732 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 93510732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 27405082386925925023711382542442465407292297593679769964537017107178116635486 | 243 |
UVM_ERROR @ 41159481 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 41159481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 57020514183996382704485906529978095055471158277746867959465943822623708603449 | 1731 |
UVM_ERROR @ 192727136 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 192727136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 4223740393706052061643624569907056594689368979708170913416010002576291822144 | 2139 |
UVM_ERROR @ 106280226 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 106280226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 98439624717831851697886735850084602872714863155824699928165622563783344383365 | 1065 |
UVM_ERROR @ 228101469 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 228101469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 80161227855145412935589873184462828021677340006886022099328422861513177219321 | 157 |
UVM_ERROR @ 72179081 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 72179081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 6668951140170087052601683710144241772089776682697308186104948420756611308694 | 3849 |
UVM_ERROR @ 70269206 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 70269206 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 20866714823823526965532828859254442030280733816515585745964281537612804378008 | 663 |
UVM_ERROR @ 148643959 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 148643959 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 11267834791852107004480574885051278712188574482964774161789461880464367417199 | 2517 |
UVM_ERROR @ 266885768 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 266885768 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 8413275532427903932652322615486381522465825431382455329204662824441143687103 | 3465 |
UVM_ERROR @ 350457655 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 350457655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 83253437161834940594713328174900934497873864275255082290090160148961779867595 | 897 |
UVM_ERROR @ 884757871 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 884757871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_* | ||||
| otp_ctrl_check_fail | 31927552335325813863131207613304278457164710560415770841490947523135055462060 | 2529 |
UVM_ERROR @ 116425228 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 116425228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 95158858930997835176532217305545903865835438938148703739121460618567494029829 | 3777 |
UVM_ERROR @ 231231135 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 231231135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 11415629565907056792790359041654307340233545951123370115958390940116677190082 | 473 |
UVM_ERROR @ 190512571 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1045409355 [0x3e4fae4b] vs 1045425739 [0x3e4fee4b]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 190512571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 60514375297483200757775572475447013383634206082310636780494171039883642113357 | 7799 |
UVM_ERROR @ 443450794 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4096 [0x1000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 443450794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 105635224218618098720555809269289407950259251864935995679397819026540497759485 | 6883 |
UVM_ERROR @ 536939406 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 64 [0x40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 536939406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 70114730450497699855077207461017413509966618057778555167077483588666442019295 | 6423 |
UVM_ERROR @ 8469688168 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 8469688168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 40795668757104425272159414566064253398546890618087583320405677433649954110360 | 833 |
UVM_ERROR @ 107434748 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2754752780 [0xa432310c] vs 2754777356 [0xa432910c]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 107434748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 73345310856871707182643764015585007380904841629640382436385842415153337243541 | 9976 |
UVM_ERROR @ 947717594 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (993506838 [0x3b37b616] vs 993474070 [0x3b373616]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 947717594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 103164559068875144200505304498129331207598474874764871776331914200216363529523 | 6577 |
UVM_ERROR @ 568882236 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3943269340 [0xeb0983dc] vs 3943273436 [0xeb0993dc]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 568882236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 1696641626072928054810964407581011222479950359617665416769265041591272317157 | 7511 |
UVM_ERROR @ 9085533513 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 9085533513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 100953304046212998507814871795931214050507964085798476841280548658061586245643 | 16380 |
UVM_ERROR @ 7185134682 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2437203163 [0x9144c4db] vs 2437203659 [0x9144c6cb]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 7185134682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 30134521554639690328932143479144910979528867858038164833621092653571035594956 | 3517 |
UVM_ERROR @ 291786910 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 72 [0x48]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 291786910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 91874319394147534327194807763839446041200319361519454268895620624616628587973 | 435 |
UVM_ERROR @ 196961882 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1390358111 [0x52df2e5f] vs 1390358109 [0x52df2e5d]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 196961882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 98576169425933560716513543740896378620989489380150954025713551940356457619592 | 1616 |
UVM_ERROR @ 668745732 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3242370241 [0xc142a4c1] vs 3242370177 [0xc142a481]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 668745732 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 106996390043094842126258813597580746530250602911644467501158293767679729264453 | 5135 |
UVM_ERROR @ 188990655 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1152 [0x480]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 188990655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 78451114973593542101594549375771111315708707491909448891758818165309682229155 | 6487 |
UVM_ERROR @ 249614547 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1800667509 [0x6b540175] vs 1800671541 [0x6b541135]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 249614547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 29895601197962963926808535956885983317041398487690888293506254069307689710727 | 13116 |
UVM_ERROR @ 17056914429 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 17056914429 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 87144569041815795797321168258064398609551414007685346376300194095860366976866 | 2318 |
UVM_ERROR @ 707464048 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8192 [0x2000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 707464048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 71190088302488871236708398957545635631838499858176351454794052366570164813355 | 6111 |
UVM_ERROR @ 3434776974 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3434776974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 82391175502580182310504123206133316140046159300960282152933768075036873797343 | 2652 |
UVM_ERROR @ 467378076 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 467378076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 94007991209385951406610908956782959987621213331611552676075226818377370592953 | 939 |
UVM_ERROR @ 858794785 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 858794785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 71273039788133876864175478498131602466503283471945410926415765961418859215156 | 2315 |
UVM_ERROR @ 895215765 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16 [0x10]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 895215765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 100075338760155303831225726672383866701366140105326944720511247905616795751079 | 1345 |
UVM_ERROR @ 503275902 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 503275902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 7781482188320853276398771055991536373892605965869098992970394432078485920937 | 11883 |
UVM_ERROR @ 11212692923 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2936036038 [0xaf005ac6] vs 2936068806 [0xaf00dac6]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 11212692923 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 2574615284081080273313217056402894087409183282071674242682684823480870842711 | 804 |
UVM_ERROR @ 301827793 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3242370241 [0xc142a4c1] vs 3242386625 [0xc142e4c1]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 301827793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 43668442408040672730125242676133264728158377174453179840648441789399102620509 | 4164 |
UVM_ERROR @ 718568568 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 718568568 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 588218679586313614227781463503984215142058659130224901505742802951205219070 | 15172 |
UVM_ERROR @ 724116217 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 64 [0x40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 724116217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 100921359274033551480938711273495625529394357855008725534882157349934108873406 | 8546 |
UVM_ERROR @ 4916175451 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3862883107 [0xe63eeb23] vs 3862883239 [0xe63eeba7]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 4916175451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 42091219164798492489457905062880750309162958630851420227333346657543108059752 | 2534 |
UVM_ERROR @ 877673719 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32768 [0x8000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 877673719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 112862672081102028206506174870871521235771797182110681567714917714419079474355 | 8486 |
UVM_ERROR @ 1544366518 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (550086596 [0x20c9a7c4] vs 550090692 [0x20c9b7c4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1544366518 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 34355999684956408385979876209769316423438443262801208599774167409312704463121 | 169 |
UVM_ERROR @ 50321805 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3970687603 [0xecabe273] vs 3970688627 [0xecabe673]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 50321805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 46230021499272344326548287857220193370877144994928805392766001661710515027752 | 299 |
UVM_ERROR @ 202622796 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 202622796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 80250810774613257031675250399009262122451391965463927783949330206034901805458 | 2554 |
UVM_ERROR @ 323965559 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16 [0x10]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 323965559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 15295983902096487040885664950838653849182865252481911460091025132916300613880 | 12010 |
UVM_ERROR @ 846118084 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1024 [0x400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 846118084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 1173973933354645136493662314481325435469350209091147787366606722045352388941 | 3513 |
UVM_ERROR @ 1142353013 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32896 [0x8080]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1142353013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 53073157996602257580937102990048306381175984832544079456087341082782603236150 | 6521 |
UVM_ERROR @ 6455118794 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1015465386 [0x3c86c5aa] vs 3199729083 [0xbeb7fdbb]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 6455118794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 23424329397378324441969525467551239718185847128847423740155768147874439583684 | 2392 |
UVM_ERROR @ 1415395848 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1415395848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 107259665159048907823779639878434958862898652258219539293610156000272956620322 | 4947 |
UVM_ERROR @ 3586597318 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 64 [0x40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3586597318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 16763295346806663965610530922269615121514072579937442716064366520046440432644 | 4340 |
UVM_ERROR @ 922864709 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 922864709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 110389158526503868107174969550929630606700827258259782626160354112366764110113 | 711 |
UVM_ERROR @ 1254364903 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (612413992 [0x2480b228] vs 612413993 [0x2480b229]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1254364903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 101605477410414133910123372292815200562770682482653323763657865911348455574972 | 9323 |
UVM_ERROR @ 463335528 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2888692694 [0xac2df3d6] vs 2888688598 [0xac2de3d6]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 463335528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 107111992522303029989442296651608240311463152643754434268381717032777401558799 | 3352 |
UVM_ERROR @ 318491234 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 318491234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 8209250545340610743574756707577623363332657235253220404647692577565799751172 | 301 |
UVM_ERROR @ 187355969 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2686849745 [0xa02612d1] vs 2686849617 [0xa0261251]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 187355969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 109495870007675453716121302966561034054015488882580463488036754150684207537980 | 5742 |
UVM_ERROR @ 637293933 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1654314956 [0x629ad7cc] vs 1654314988 [0x629ad7ec]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 637293933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 9488505384876766533901553458939746534277523319711422491679623879068244803990 | 6048 |
UVM_ERROR @ 5798431189 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4279644661 [0xff1631f5] vs 4279644613 [0xff1631c5]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 5798431189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 41250486788622505582025835073775309169842539772480827712998043927658829070807 | 6195 |
UVM_ERROR @ 110069188 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4075569151 [0xf2ec3fff]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 110069188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * | ||||
| otp_ctrl_regwen | 60636283050347819780876283459712021703931167685897153637443292515498001032132 | 7227 |
UVM_ERROR @ 261021301 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 261021301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 102842097046536813772463057696902672475831010533966075649795454608465231957032 | 2327 |
UVM_ERROR @ 652431121 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 652431121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 106369981160683185571043099134260166972702709165893019623292644113564111129545 | 462 |
UVM_ERROR @ 127762669 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 127762669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 62964272372852613699659337134448859655473506291426740833058698621273328563555 | 1474 |
UVM_ERROR @ 113667874 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 113667874 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 42106699426829103889018826605886590587367825814961946910632134306362255828152 | 2133 |
UVM_ERROR @ 1422286297 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1422286297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 27891134905988366124600117166037564261093634656030947040894378712629233338638 | 1857 |
UVM_ERROR @ 134869118 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 134869118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 28399766661767887350698379013419538197038737321108011712271890919061795746914 | 1453 |
UVM_ERROR @ 123275385 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 123275385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 95898854986676388848373119236816578216465856040045368182177072401902176305977 | 516 |
UVM_ERROR @ 144786296 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 144786296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 112157172384629324667732875518831189409702299246970311994418839604894684661067 | 6479 |
UVM_ERROR @ 476051015 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 476051015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 91056811369753724899831593411097645176979601665163372599377399468044910884374 | 1358 |
UVM_ERROR @ 200420212 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 200420212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 23083234828474449670064741199057573659285078064605535212894034401973042362524 | 726 |
UVM_ERROR @ 79636648 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 79636648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 102175645858006861889799143145584810699802726889344735949348115560307869143409 | 2345 |
UVM_ERROR @ 138986611 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 138986611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 29829663815081377928134082528591217236635432779531668608632101045013099802205 | 6221 |
UVM_ERROR @ 372482034 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 372482034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 96031279154241641728380944655439778237613116398435436675912775162399772273431 | 1191 |
UVM_ERROR @ 61205775 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 61205775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 101528687520609650863624698263060259802564160884463929991149850818444055777352 | 1585 |
UVM_ERROR @ 267867255 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 267867255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 100866965878835477819484920485933295793327213336349795685305659524080508249728 | 1669 |
UVM_ERROR @ 177066244 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 177066244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 4649873839137376573278024732104988468289095437894364430767538704243168977867 | 7549 |
UVM_ERROR @ 246891775 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 246891775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 72328212864917340021156135536942408689800606841132552033134246044254060966461 | 2005 |
UVM_ERROR @ 931662647 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 931662647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 54708934554780529083836333109510557295115417172717532373645409668649461635503 | 180 |
UVM_ERROR @ 91239787 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 91239787 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 76267610992083157632206906465358603871055866939356597788411268035268414435640 | 4119 |
UVM_ERROR @ 2597609251 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 2597609251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 91173782583700811734891787173783362647099128812880699596229357470850610279804 | 146 |
UVM_ERROR @ 96561733 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 96561733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 42214260331308173244505250259785983251052526750683270277828505575281029733147 | 3797 |
UVM_ERROR @ 1169795831 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1169795831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 65281374886053718811693867566751866938848078759170802191789357999353205238759 | 2845 |
UVM_ERROR @ 63419899 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 63419899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 33459102635472494288781742984337009734790187799689653764989611465233320595918 | 1231 |
UVM_ERROR @ 90874306 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 90874306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 67673877955194876599323307107462308997285500043102589460113434961174534734932 | 2937 |
UVM_ERROR @ 175832408 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 175832408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 84288265314693539552621269776147145040414142466802923710006552082427195890177 | 1350 |
UVM_ERROR @ 68971110 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 68971110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 80108164203902437438785634297208335686544404585965906769547364597689271179816 | 1204 |
UVM_ERROR @ 91577628 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 91577628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 39038106675625916703889300209216059715309174952339873231039676672917084736520 | 7403 |
UVM_ERROR @ 369879138 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 369879138 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 51275930622859872249792153524616402629376211219040810836930405097197555288800 | 673 |
UVM_ERROR @ 129562723 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 129562723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 15477103568960152919605498183988096814662063395000630546952292895021842487359 | 1182 |
UVM_ERROR @ 94118252 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 94118252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 48983113546209206007793386426839141666341388274837597360274344060672722906752 | 1971 |
UVM_ERROR @ 77806792 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 77806792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 24985089282818482987627029287016997314996131867036119238569428160525168350555 | 7565 |
UVM_ERROR @ 863363267 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 863363267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 57376203502598582830225664079612936242087572627791579451362180661297379264790 | 604 |
UVM_ERROR @ 183653884 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 183653884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 93294036523372793643933064441526927363646215260946633565709838913748386285479 | 853 |
UVM_ERROR @ 352348821 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 352348821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 37584343909659946691039437123733916731543645546810422155775226767919062856271 | 3571 |
UVM_ERROR @ 120086204 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 120086204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 20785484343326172544396813679473838082863401496936693705978177801297354106174 | 3653 |
UVM_ERROR @ 110662155 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 110662155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 3565776825161461172430570933612703243552032467822198438932129447992697977651 | 636 |
UVM_ERROR @ 105036989 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 105036989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 81983099258051281086350603936486216793204555009545806149077760969516103829267 | 411 |
UVM_ERROR @ 53781822 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 53781822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 55330308905436860863227832388519717647363614674947005272651068981265514745570 | 1440 |
UVM_ERROR @ 101692111 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 101692111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 33934789730276272603926069179634941989344053736126617838084334839622777553596 | 3401 |
UVM_ERROR @ 188883754 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 188883754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 55135449214540840077876907566636482498974090718449476423035582401368909266767 | 887 |
UVM_ERROR @ 712163586 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 712163586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 81120243727888916075510467681737005694258497682580635909745336767795806441269 | 96 |
UVM_ERROR @ 746026391 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 746026391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 108117414946378117196071837103306859461324871775563745640522343266076790758516 | 107 |
UVM_ERROR @ 111697198 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 111697198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 16646096179260921458422745628414470374588610105053258836006799974883144261427 | 5639 |
UVM_ERROR @ 517285188 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 517285188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 68228375158320195782315637022161171031489603577983754114177166017385121263023 | 2579 |
UVM_ERROR @ 79067643 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 79067643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 14255746598028839468455092960075419809602269581017103551677696680959365638864 | 1669 |
UVM_ERROR @ 129688467 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 129688467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 61052247926315436831282795581661764263454570004945858767839324875610845093093 | 2315 |
UVM_ERROR @ 134394930 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 134394930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 38080657791404930281212165402548465860020872194112383057148494716637678890634 | 2240 |
UVM_ERROR @ 124223775 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 124223775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 9425988004748483852035521430892436662633174023670605075700347752228429250944 | 4691 |
UVM_ERROR @ 251337563 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 251337563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 46322603298451636099286115624277253018793362478841583938631663306141049599382 | 4281 |
UVM_ERROR @ 356386995 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 356386995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 69401339407006129887683092986453067487152894109127091921428430507694204434869 | 96 |
UVM_ERROR @ 199066901 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 199066901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 26010859840406983630547364946450893953881643292708333788993911624778727342011 | 2085 |
UVM_ERROR @ 1260115659 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1260115659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 114736672038752825863382979925395268993837805008153206583926403004230229859092 | 584 |
UVM_ERROR @ 1082535347 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1082535347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 40483667468569918028087515433659198659090808754677049194982286507807535858953 | 3113 |
UVM_ERROR @ 96737791 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 96737791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 94417899803717664369306932683292791917827981229158448526235664842719091049615 | 1292 |
UVM_ERROR @ 142577809 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 142577809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 45527274727909959020608372181871984247338617231814136352579231970451274446397 | 2949 |
UVM_ERROR @ 65529900 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 65529900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 6946568235889270152932534544445495283971583754667842950423638804380625866496 | 664 |
UVM_ERROR @ 80473931 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 80473931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 57203861156968357195982066613470940693706881517592612330071101470017349004705 | 558 |
UVM_ERROR @ 50880044 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 50880044 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 71945996365143074299402326357837925009605167991377391895935360661442674574160 | 1068 |
UVM_ERROR @ 49875049 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 49875049 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 101795286372264089824662453176545315050850189822294594078514021159170445542012 | 96 |
UVM_ERROR @ 118454070 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 118454070 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 68753257682764519873061435502696324683765504807225052312887947521016236389034 | 2296 |
UVM_ERROR @ 129030316 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 129030316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 22347344773412144342459141131822250029550169564608711288398685202812359556434 | 764 |
UVM_ERROR @ 270856398 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 270856398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 54057209176419510921619796320979574825032555641326552882521616949466284741991 | 626 |
UVM_ERROR @ 39697832 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 39697832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 80856698906993908404118698583996707169349655689716583106526097817772336506970 | 490 |
UVM_ERROR @ 596901955 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 596901955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 66733827055612724173711079547608651523776753635181548897663253490255533641763 | 184 |
UVM_ERROR @ 63900629 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 63900629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 113815553263557598256134572269894268919804953028996627957139205693503136233857 | 2034 |
UVM_ERROR @ 56762516 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 56762516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 112183012276510805949513525383947639947608350427229051870573327465350311008207 | 1208 |
UVM_ERROR @ 85817393 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 85817393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 82703310074464911873929645202137004232174997690050121179676328404764431861452 | 556 |
UVM_ERROR @ 45476708 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 45476708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 66047756891899380420331533595195438325314347123925044643941341605162110959891 | 1512 |
UVM_ERROR @ 61722680 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 61722680 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 25924587216790433277960536010044321215016053004912156106636385191328992453390 | 196 |
UVM_ERROR @ 221532449 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 221532449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 58464531089204515357619646198175751435548704394731342910423793445341639730887 | 1262 |
UVM_ERROR @ 96975596 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 96975596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 62928951031397881539453871767537312102566321214816684094983118334731782933799 | 440 |
UVM_ERROR @ 39867699 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 39867699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 50300870839879987581339412460510107269719208990056314805795203697238477906607 | 310 |
UVM_ERROR @ 558089103 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 558089103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 93557886963253065863640481854963241727526877856881481727529078898157285524318 | 548 |
UVM_ERROR @ 40262578 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 40262578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 81038732443947716684021400625610864070535378372414587886451954716987427102901 | 2034 |
UVM_ERROR @ 124440189 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 124440189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 98021890347130044933924176125399305787736908119659461927265407555797176736406 | 1886 |
UVM_ERROR @ 915128338 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 915128338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 43727146709074519567317754537433011629134210296282538872338580713143002749425 | 748 |
UVM_ERROR @ 138823228 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 138823228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 66393223361792624932464017808161189035576249643387929289308157589158566136619 | 1724 |
UVM_ERROR @ 242996778 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 242996778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 72444516624688267768600013149621869696439149134243485510247262416249137775927 | 1440 |
UVM_ERROR @ 97850155 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 97850155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 68430810311213068632148680973399503482905886659538471740036151186097175302579 | 434 |
UVM_ERROR @ 585637624 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 585637624 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 63521855660619550744809667948656860418935139903546968383863975363953703149620 | 1468 |
UVM_ERROR @ 196920368 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 196920368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 18291435866739065531913225846770858090563333514885343261281810191377198511861 | 96 |
UVM_ERROR @ 547079631 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 547079631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 33145282173053042385818081279870922698426788763360476168914820043545542269031 | 690 |
UVM_ERROR @ 133534610 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 133534610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 86889926703630553394528022161624405806047156034433777413159495189724276654841 | 1798 |
UVM_ERROR @ 108628350 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 108628350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 111715250037970399719813892657608189706750567995556203305348489798200813886821 | 1118 |
UVM_ERROR @ 63048631 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 63048631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 91594606880577057716314996116138924996583437679024005195628102891180110361389 | 1928 |
UVM_ERROR @ 93266441 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 93266441 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 95558983383842770356623363564343319463389536009624790391262121810610358957299 | 2452 |
UVM_ERROR @ 65026438 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 65026438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 981013196524996042449536230189225597929815622239383870545962929974470614608 | 402 |
UVM_ERROR @ 146678127 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 146678127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 57802270625513249957056940812864828029053440895879682063894087605043512237141 | 654 |
UVM_ERROR @ 55930014 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 55930014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 92191678233931360529441881101921638265449035072778180924948804597800359208811 | 944 |
UVM_ERROR @ 202194051 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 202194051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 96048511319296094698908875729254193842315902296853475200473518723320925623006 | 820 |
UVM_ERROR @ 675931048 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 675931048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 70324777234266048411721610135875445829157179185994936109133102222430555434924 | 782 |
UVM_ERROR @ 161475803 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 161475803 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 39699773961733639820555827229639726125523432269046965838790182875896225572438 | 96 |
UVM_ERROR @ 73910765 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 73910765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 44765187512011007993639937232760605429038732388503876366395463801303566404991 | 662 |
UVM_ERROR @ 75112817 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 75112817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 9132970949729958535121756652138628878172748281721810893205795823247147484266 | 946 |
UVM_ERROR @ 90111567 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 90111567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 8130858873803554724204458545690026698342152259400261860483355989271892310762 | 1062 |
UVM_ERROR @ 717507665 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 717507665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 72728615328689665912140344036030496506377376063307562496057427996946387005036 | 226 |
UVM_ERROR @ 168888173 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 168888173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 89262344155698431824567493395910018205614051412647791094612456736735080697233 | 1952 |
UVM_ERROR @ 228557417 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 228557417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 105226970152118078233454116160862274746292416025805875858463265035884813496343 | 254 |
UVM_ERROR @ 532315884 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 532315884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 83425668973431645301719869127446048935151215482420852619112419477775610581178 | 760 |
UVM_ERROR @ 60590226 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 60590226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 15526652951908752388754349910363843788773190759016149907071403016409638525694 | 1570 |
UVM_ERROR @ 838907474 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 838907474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 66833482582362241100146007563355183293059794415462476408877340544808346585593 | 612 |
UVM_ERROR @ 164006006 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 164006006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 19738276522642211071356691107390053326296885217187213879556498592340569744634 | 272 |
UVM_ERROR @ 541799096 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 541799096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 89423168475946638533259298413138873727834212308881409599622737089567679726883 | 1382 |
UVM_ERROR @ 102405499 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 102405499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 83117458847414265674369428095735366786651764074586925377383755624923891694226 | 1316 |
UVM_ERROR @ 217351191 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 217351191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 11410605954934748074384043766420217589874352117476398416654923395985753289272 | 550 |
UVM_ERROR @ 147514660 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 147514660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 34516653378816563000666428240338128713164293475800447343344448436090647989983 | 238 |
UVM_ERROR @ 546848071 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 546848071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 10940348172584998343854122148826809818051815411301066499783817107528736634222 | 602 |
UVM_ERROR @ 155183703 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 155183703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 19963017378500603714556822155278621005677956766272143266777137223144254917130 | 380 |
UVM_ERROR @ 106299637 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 106299637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 105312344021940528700102999059576315837137082061079406890982573850810532993755 | 1954 |
UVM_ERROR @ 86099239 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 86099239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 53840101334778627807407235126286632317700489772677514999969384881690082087452 | 3248 |
UVM_ERROR @ 73798348 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 73798348 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 55649755731834330353110632503422226246808077975577700945921041164955140227819 | 180 |
UVM_ERROR @ 69944586 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 69944586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 114710662933763884613805216077816788783900537709754285979920074999102315135753 | 678 |
UVM_ERROR @ 162017389 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 162017389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 79206279094751964521296702127335012915566213875264681666793840910475911126916 | 138 |
UVM_ERROR @ 31652394 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 31652394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 106943772417009540005610244742149438092273947109364214511547973782542045457664 | 2448 |
UVM_ERROR @ 991317515 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 991317515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 41544032597489021648087642538112285477596345520313789139856153809675549961001 | 186 |
UVM_ERROR @ 692879310 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 692879310 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 7969375398872967771397184070180648208234065863822081184352802678120553659629 | 1758 |
UVM_ERROR @ 1204457414 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1204457414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 135073173265764494350710753615704104580018739811288697645489656471583662295 | 310 |
UVM_ERROR @ 46491080 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 46491080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 67288568318733172398409328216334667233428253453334058496738960463825452034140 | 450 |
UVM_ERROR @ 145149888 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 145149888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 76437714412242449756309223913970143933993910086812131092688148217767592643860 | 1054 |
UVM_ERROR @ 64790836 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 64790836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 84980609550553042112066686533687973002832895935172036862007281853726993982909 | 2946 |
UVM_ERROR @ 1617914223 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1617914223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 19490375242432337983882064291272434592016264616059932930172941947432409267886 | 632 |
UVM_ERROR @ 159158067 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 159158067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 8577517925131468236897183423978365541175470114631464803901484534596702700651 | 184 |
UVM_ERROR @ 74666405 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 74666405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 15312503559778359288047948679614896860722434609341879128468952557836212907690 | 1830 |
UVM_ERROR @ 74867095 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 74867095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 7903345080268587103346366343143975977109463694814752653584363783434611977434 | 1130 |
UVM_ERROR @ 189367336 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 189367336 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 109442272224722982998243261153359858853148949693302986328469558557608945149027 | 138 |
UVM_ERROR @ 61040351 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 61040351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 5398911317788425720849192201161136210989092182386490127681781660858000038761 | 96 |
UVM_ERROR @ 516206614 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 516206614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 24379137003362938279746244808698501089934191059527632243882756944909961233278 | 816 |
UVM_ERROR @ 42084345 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 42084345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 48676908417758920193128406394076145027673509020964165131015031623854243656703 | 1336 |
UVM_ERROR @ 62365698 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 62365698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 111784279611430183760745266755312323415599834657726615412513226233390043674052 | 1778 |
UVM_ERROR @ 157177596 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 157177596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 65178363752611901772848333999304216173401510041845552568382556000496215178138 | 138 |
UVM_ERROR @ 222840779 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 222840779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 57308088192516209142986703398749327747732408872900741483909713625310990508313 | 358 |
UVM_ERROR @ 34696360 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 34696360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 50543177834146819903588557313446339074690981163655230203381669623864210929380 | 2624 |
UVM_ERROR @ 75601854 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 75601854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 3247353590582372087332549686615162556412258461481106424587503890528182058372 | 322 |
UVM_ERROR @ 91137276 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 91137276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1308) [otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger! | ||||
| otp_ctrl_background_chks | 60515662098063815893416985215178875499987303407966105202233202693995258077916 | 9137 |
UVM_ERROR @ 6639318525 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 6639318525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 111856353407201868740933262927368375733975797788664786971278079495737699144924 | 5633 |
UVM_ERROR @ 8358787626 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 8358787626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 62887444386390513315735900360464195082373767224823723208904802721425146484563 | 8280 |
UVM_ERROR @ 938308462 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 938308462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 60489133998946417686339105374114127983432757845456392007864281331725062093354 | 20551 |
UVM_ERROR @ 1239164589 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1239164589 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 95583430081069178176060479798328610610942837782462433097918421699220439721317 | 1079 |
UVM_ERROR @ 744334541 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 744334541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask * | ||||
| otp_ctrl_parallel_key_req | 108731821418454274162554942866525786372206219957502686209472610802158372323047 | 9522 |
UVM_ERROR @ 2406381775 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 2406381775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 111291160912717183324155805908419731286359728676291995919889797136114941988785 | 6685 |
UVM_ERROR @ 585116997 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 585116997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 107406484352958908409311635628235612212536152868535960745284697135302416400912 | 7446 |
UVM_ERROR @ 420929967 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 420929967 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 87017405525438482320767509721364606411431498933604038992283642553390433428061 | 16107 |
UVM_ERROR @ 308607866 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 308607866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 29736868705454640302742388683547966065096511821854850961321524127225453604715 | 14227 |
UVM_ERROR @ 1360337601 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 1360337601 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 70747354737212662172980568299691238907400191497458333878290958125585893744315 | 10269 |
UVM_ERROR @ 518308125 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 518308125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 27700115487678905576259208450445860532420287556464862422614834192205718473907 | 7088 |
UVM_ERROR @ 210077213 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 210077213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 103367444270677571884133599515525076571979320279677773388579662218246810860034 | 8406 |
UVM_ERROR @ 730079536 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 730079536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 111548651579514432872849746808475341077871319474719959980652174675201122609780 | 5252 |
UVM_ERROR @ 321678521 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 321678521 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 105439522115256772166825647395018226146961054370102281313387132965415841946544 | 68742 |
UVM_ERROR @ 1580034452 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 1580034452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 43680361430346757695099839154879726658504724924377686088674897142663992434305 | 16225 |
UVM_ERROR @ 9122424852 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 9122424852 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 55412040553745751540351425730097556903043338331394780685461238461991329181569 | 4961 |
UVM_ERROR @ 3280194105 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 3280194105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 22980453342791731847416462317702632667020442226849402071878291757670908406269 | 15156 |
UVM_ERROR @ 2131472422 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 2131472422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 40870734889200854765942444188325445118221616954663665013352318764006688481323 | 7754 |
UVM_ERROR @ 868162152 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 868162152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 42240841547348275388874591296352399643123950603610364518390077200544613217079 | 12448 |
UVM_ERROR @ 9326303450 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 9326303450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 66266319654404980832249093692437471559631729647937245590638156465552560565712 | 10662 |
UVM_ERROR @ 5129079764 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 5129079764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 111027196274174339041212457532536632925678079627460470114361715268400642665626 | 11077 |
UVM_ERROR @ 6611239017 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 6611239017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 73784008204473117325566680699788174345763977304145639692775428806087835812099 | 5819 |
UVM_ERROR @ 517986629 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 517986629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 24781544878921754731102366848446992443649302617018227671077132806079475315941 | 10024 |
UVM_ERROR @ 1339707307 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1339707307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 88283416976417593503028523398085414697490763395683145791902062355515384752026 | 8192 |
UVM_ERROR @ 618723198 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 618723198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 51285437815571080488665541303966655312942262815168405314392761194459577853002 | 19320 |
UVM_ERROR @ 875295299 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 875295299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state | ||||
| otp_ctrl_stress_all | 73263039484929602407719616456075099231244354350454513118295024397410098095541 | 3581 |
UVM_ERROR @ 7657814913 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 7657814913 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 14826963662535366511221690102503149176019280827824642991988190478210396919531 | 6824 |
UVM_ERROR @ 5731852307 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5731852307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 77103068815232169344124589592305705568476111376290110157011917760337863957068 | 10126 |
UVM_ERROR @ 1156613000 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1156613000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 114860297137184500924266823880853855581585022947809706829665490700941157893972 | 4087 |
UVM_ERROR @ 1614927819 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1614927819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 8621936180777380623878056947342829352782657616140714779994327662892470644202 | 4487 |
UVM_ERROR @ 1567804724 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1567804724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 114349187264958354190514925159363147815091922340846981495377219114124536359058 | 3264 |
UVM_ERROR @ 159997439 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 159997439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 57888440912790319440671696310800328380935550555217951939517195603127228885418 | 7698 |
UVM_ERROR @ 4022052727 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 4022052727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 54464269822179638021226206074607759924707078031933304958254275339838244317239 | 16554 |
UVM_ERROR @ 2259826452 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 2259826452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 111152481750284702760053538463173397627708805474127814521726276825468360568280 | 12262 |
UVM_ERROR @ 1093495575 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1093495575 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 12660265694928682941013847605583357858146050533812452787925647062302691029499 | 9359 |
UVM_ERROR @ 374174499 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 374174499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 73069105815419663065357291843755196605629185365471383044462471704938251144972 | 10619 |
UVM_ERROR @ 728657664 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 728657664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 66728635923866384476889228833502523057200973928056200086510437035024927482169 | 8627 |
UVM_ERROR @ 1833220921 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1833220921 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 104562539848768450176830686980735582746865763159701228657126746262554972638568 | 16196 |
UVM_ERROR @ 400549284 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 400549284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 53585644672940935634343684941508557129149420625720507908911506496470298283145 | 4404 |
UVM_ERROR @ 169811238 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 169811238 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 86723669703557211478013785426245615954760721498322271681403611673799865218563 | 25283 |
UVM_ERROR @ 529176010 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 529176010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 50681666421735883730133853089423089777968421456731574614619603433878456709356 | 21331 |
UVM_ERROR @ 5756508272 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5756508272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 97298035135052536322438293922929839925465380864137788446881831725333208103185 | 5744 |
UVM_ERROR @ 1869372656 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1869372656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 42966937546553461705637538295540839857695510894394445766298682672514048104976 | 20457 |
UVM_ERROR @ 3348593742 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3348593742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 96709156703954957320920956016240736727646754502804049808455081199998827772860 | 16100 |
UVM_ERROR @ 1995358993 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1995358993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 14791020181822658757036917827951441487570356176003034487944121585142764309724 | 14749 |
UVM_ERROR @ 639316194 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 639316194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 4241800497098255391829292194679545451700505311493079670032540318260936365531 | 2755 |
UVM_ERROR @ 1004885382 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1004885382 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 31275792435223586908921481964408961273006973994205538395653805191443323000314 | 5096 |
UVM_ERROR @ 1137246474 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1137246474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 115143022855379377361224908396100126181367377154847922305659378347486835184134 | 4715 |
UVM_ERROR @ 1552824566 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1552824566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 42996538294570168829827026674451897707412160930074165070474903967389950069103 | 14290 |
UVM_ERROR @ 8499508984 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 8499508984 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 73256280036277354931222278163020133712269412318508626614309116743781648498243 | 9651 |
UVM_ERROR @ 348968881 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 348968881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 44344785923951208675325562960623690148457600941414035416335036602185255405291 | 15034 |
UVM_ERROR @ 1463679164 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1463679164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 29812318401009110964357412760080918570106897542454285446927485551885321128605 | 21976 |
UVM_ERROR @ 7883334036 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 7883334036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 24612414414227701570710176446941074161422953268821928021836122896278647227572 | 9483 |
UVM_ERROR @ 616824645 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 616824645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 87597027198765018905986855151349927903671872080296008249787721650333654327258 | 6224 |
UVM_ERROR @ 417692517 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 417692517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 21973146078889914401697296845228617549971630710307221526584542464464959407591 | 14680 |
UVM_ERROR @ 4339999006 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 4339999006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 13048995774767481931246076553243646718088454426828570644698736057199259489778 | 3296 |
UVM_ERROR @ 5412408036 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5412408036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 53938413728813254900673291232978874668470966934543639925649447220559905775885 | 6564 |
UVM_ERROR @ 5335529942 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5335529942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 63843099662666917500461023674872091795581455285383861554029294081804098369969 | 3218 |
UVM_ERROR @ 1198188005 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1198188005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 107848957029905312502266610807901018357532911644578699417271975516231717780076 | 5853 |
UVM_ERROR @ 193202856 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 193202856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1015) virtual_sequencer [otp_ctrl_common_vseq] expect alert:fatal_check_error to fire | ||||
| otp_ctrl_sec_cm | 62400082050461779512521599569513150215740574705648787443681138187134159709779 | 105 |
UVM_ERROR @ 1039344009 ps: (cip_base_vseq.sv:1015) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] expect alert:fatal_check_error to fire
UVM_INFO @ 1039344009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_sec_cm | 11290450738675149325996992106841966114235356408499674240259285302054727067702 | 142 |
UVM_ERROR @ 4010851498 ps: (cip_base_vseq.sv:1015) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otp_ctrl_common_vseq] expect alert:fatal_check_error to fire
UVM_INFO @ 4010851498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_scoreboard.sv:353) scoreboard [scoreboard] alert fatal_macro_error did not trigger max_delay:* | ||||
| otp_ctrl_dai_errs | 12104859628952688052844242810732594632737891463637401330492354384055638395091 | 2817 |
UVM_ERROR @ 382281117 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 382281117 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 6738486606537621188084135878340593527856969970864435371468729265898418054084 | 4996 |
UVM_ERROR @ 2353741396 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 2353741396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 107073705141081320453662399058595190099446005638275138004442228538991928143438 | 13330 |
UVM_ERROR @ 1436495703 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 1436495703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 53515439667476551308855709418421960002571543522088578290193704957960411555888 | 5095 |
UVM_ERROR @ 440032948 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 440032948 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 20791079610392774558105151368233751273286482508832443881625683290559518092879 | 2047 |
UVM_ERROR @ 405921971 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 405921971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1308) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger! | ||||
| otp_ctrl_init_fail | 89779361143766472293592666159323026840116179974501330107859351573953400084462 | 3499 |
UVM_ERROR @ 329511128 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 329511128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 87907144498467998287168932875764086771289136367327430586754549825598270634398 | 3013 |
UVM_ERROR @ 1272826815 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1272826815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 64909670412777770646680817956142853334110165478460708647297594217352014327547 | 1513 |
UVM_ERROR @ 1886011297 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1886011297 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 9264402052276421908454584523464416955370772613489277037948540473274095262965 | 1523 |
UVM_ERROR @ 550730148 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 550730148 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 83912188074212642028210119277275675036272628385538397497701239402363658960435 | 1247 |
UVM_ERROR @ 428901180 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 428901180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 54883612271580728370630242346936378619595225763821907109518263518761639496655 | 1509 |
UVM_ERROR @ 390078835 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 390078835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 100639553117312183328894136946870755407973409771921914045592663719837607254444 | 1351 |
UVM_ERROR @ 1730217092 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1730217092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 46432830099480600125279668917937344826007374472799082265537453297135538191879 | 2239 |
UVM_ERROR @ 293695109 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 293695109 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 93265508261570951448611902494695855382766116604861546952501848580498900774317 | 1989 |
UVM_ERROR @ 132481584 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 132481584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 13062332757243580657775890742952856231518796745999520171640259022786623639730 | 2795 |
UVM_ERROR @ 1259939018 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1259939018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 24021840168510460751543905135619704976812550842317452835583279958874771922858 | 1841 |
UVM_ERROR @ 828656710 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 828656710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 55650034101494140170257046167712944773747026059275675027605634240236289185755 | 2219 |
UVM_ERROR @ 1900475860 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1900475860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
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