Simulation Results: gpio

 
02/01/2026 17:02:06 sha: 05ff44d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.49 %
  • code
  • 92.63 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 98.38 %
  • cond
  • 95.68 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
100.00%
V2
99.19%
V2S
95.56%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke_en_cdc_prim 1.270s 85.230us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.170s 94.275us 50 50 100.00
gpio_smoke 1.670s 172.905us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.690s 774.968us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.770s 30.040us 5 5 100.00
csr_rw 20 20 100.00
gpio_csr_rw 0.980s 18.097us 20 20 100.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 5.390s 414.850us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 2.080s 1747.118us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 0.990s 64.827us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
gpio_csr_rw 0.980s 18.097us 20 20 100.00
gpio_csr_aliasing 2.080s 1747.118us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.390s 132.173us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.420s 116.023us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.250s 56.497us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.790s 91.255us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 3.930s 972.243us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 3.380s 160.639us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 21.320s 961.780us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 6.270s 1958.493us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.380s 97.140us 50 50 100.00
stress_all 50 50 100.00
gpio_stress_all 204.150s 84148.873us 50 50 100.00
alert_test 50 50 100.00
gpio_alert_test 0.930s 44.987us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.690s 17.191us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.450s 368.110us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.450s 368.110us 20 20 100.00
tl_d_outstanding_access 47 50 94.00
gpio_csr_rw 0.980s 18.097us 20 20 100.00
gpio_same_csr_outstanding 1.460s 161.585us 17 20 85.00
gpio_csr_aliasing 2.080s 1747.118us 5 5 100.00
gpio_csr_hw_reset 0.770s 30.040us 5 5 100.00
tl_d_partial_access 47 50 94.00
gpio_csr_rw 0.980s 18.097us 20 20 100.00
gpio_same_csr_outstanding 1.460s 161.585us 17 20 85.00
gpio_csr_aliasing 2.080s 1747.118us 5 5 100.00
gpio_csr_hw_reset 0.770s 30.040us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 24 25 96.00
gpio_tl_intg_err 2.300s 209.289us 19 20 95.00
gpio_sec_cm 0.910s 72.883us 5 5 100.00
sec_cm_bus_integrity 19 20 95.00
gpio_tl_intg_err 2.300s 209.289us 19 20 95.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 50 50 100.00
gpio_rand_straps 0.900s 20.126us 50 50 100.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 23.690s 897.537us 0 50 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.930s 29.612us 50 50 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_vseq.sv:642) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
gpio_same_csr_outstanding 94768711232006978513268968647289849800895403404421409424001283198148526407614 74
UVM_ERROR @ 16869681 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (11171328 [0xaa7600] vs 11171329 [0xaa7601]) addr 0x13f1b448 read out mismatch
UVM_INFO @ 16869681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 11218806241148481779841218611078957813069855998561705244655731389724262506314 75
UVM_ERROR @ 62714139 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (28 [0x1c] vs 0 [0x0]) addr 0x24430670 read out mismatch
UVM_INFO @ 62714139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 53610074463097304891170594995763839130586762746840227719801562758257341439537 74
UVM_ERROR @ 105471334 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (11405828 [0xae0a04] vs 11405829 [0xae0a05]) addr 0x63b16464 read out mismatch
UVM_INFO @ 105471334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_*.enable reset value: *
gpio_tl_intg_err 91818312952515494085036474557210844298560122207024968622794685455292323095377 230
UVM_ERROR @ 130453677 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_2.enable reset value: 0x0
UVM_INFO @ 130453677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1163) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 38395199468269874009398958782053725404165263517310677020220825358983597719771 77
UVM_FATAL @ 3975769 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3975769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68862297507028917622436678476528285881168737122370875002891207197009059014799 207
UVM_FATAL @ 8342926308 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8342926308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 12235940733959671275101965372603884297384537899464568345502444530299673670601 202
UVM_FATAL @ 273794836 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 273794836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 61572315412891522441801517382129070411319978265146361694536395542048120745228 78
UVM_FATAL @ 184446830 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 184446830 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 29764885850718228164498198774110143631096594135321535045472812921319553357836 77
UVM_FATAL @ 57027160 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 57027160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 29806970262024172705161055661754341470862596265154593263009733056170668361967 326
UVM_FATAL @ 3014966482 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3014966482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 39539626673288461562676010853497189162075765042437816648745561355675480999018 309
UVM_FATAL @ 2458438879 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2458438879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 112117734084619392423378244855216167588391137438397155286371078301648699397921 77
UVM_FATAL @ 22493181 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 22493181 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 38134554856792155636680912885939190932556611270641102694331580832865589598362 77
UVM_FATAL @ 17644020 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 17644020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 69640987014629333733466124301469500891534594288603200695850466337857892816436 77
UVM_FATAL @ 3599388 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3599388 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 34005737857474574742504879003768693977374075034992353657290417856123132578772 368
UVM_FATAL @ 1906703677 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1906703677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 77111700167621235375959126335854276271211883882208349296564616945241702872264 315
UVM_FATAL @ 1381414829 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1381414829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 8557093822704705339558245999911012687411268021907905651316010327894799918605 89
UVM_FATAL @ 43671401 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 43671401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 55303929297265539572091527254640821641727849586018946872748549120446498672303 77
UVM_FATAL @ 29191330 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 29191330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82145984015128248804684696143567684172083468583512517406438817171381056354287 79
UVM_FATAL @ 1119266032 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1119266032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 83088142542251692078740030941690679412951133715019185487428088307026018116126 226
UVM_FATAL @ 2769934610 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2769934610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 71524432550806064155318773690764356117882338230058919478288506483004177634774 77
UVM_FATAL @ 4836214 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4836214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 97701148021086603867828383563678240608205607946395458891535525233529948846694 77
UVM_FATAL @ 21818957 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 21818957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 5068323154379566077830475243743795293108685886654422667813360869514544739202 202
UVM_FATAL @ 452532813 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 452532813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 103554925309482891327952268095041295296614052667888455626451656712077580646771 206
UVM_FATAL @ 2892247804 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2892247804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 52716242811407762919986747744805951318718789613474994110767154452926325431454 136
UVM_FATAL @ 528595990 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 528595990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 61819684840152100365792764686793734625797436696184576133958924010155537164983 77
UVM_FATAL @ 22550040 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 22550040 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 84213887897905350649835083813492547460613507716209216567696085723565908644290 120
UVM_FATAL @ 1117112461 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1117112461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 57884830318752318779239108052298406274163099946419953373633921195023443507137 77
UVM_FATAL @ 35332856 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 35332856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 106237458427453250952141841551229087753010461792467093897502604041331096101783 77
UVM_FATAL @ 3986708 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3986708 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82364818908431784110990763647457219018420862725097703640632215533259129702461 77
UVM_FATAL @ 30988362 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 30988362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 18914413831802742784324569586653731571917631315857574330042793925457723493028 318
UVM_FATAL @ 929880608 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 929880608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -*
gpio_stress_all_with_rand_reset 485083016295187137931730869308877914966665179255152467214424516230007577054 75
UVM_FATAL @ 11958197 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 11958197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82445709353233422603916934104421375569003105929978412150121566544486264570489 79
UVM_FATAL @ 1629024685 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1629024685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 71434374824668261975633108378370650904603898465174556648675613648776006266897 75
UVM_FATAL @ 1562290 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1562290 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 74613079163559192289671730902517781675772722404600072260283519790272942068583 75
UVM_FATAL @ 147669882 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 147669882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 54223683269916014992924548171890974167446964298335742510570866028042661966697 77
UVM_FATAL @ 12527648 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 12527648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 100863281754957476586251108020287330418974049326121784528739874920514822233411 75
UVM_FATAL @ 83990534 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 83990534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 80946969025383491253658829279953626062439277931328032106184581572185607299238 75
UVM_FATAL @ 2592071 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2592071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16801383979525272820759151902127157308213677784000912613461936103376316864300 75
UVM_FATAL @ 2669037 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2669037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 75798774308545251236645097557084246943260991263537540204036813338547330038327 75
UVM_FATAL @ 202422113 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 202422113 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 50843332384214158517475610138930848040455991425496142482611013025999670879432 75
UVM_FATAL @ 5881219 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 5881219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 21568232578708247439166659584624912551633771705137087655145444893032529722057 146
UVM_FATAL @ 506069218 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 506069218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 95656931671638158259340689814741307286133903145467022255506073349523272953825 75
UVM_FATAL @ 3940303 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3940303 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 88205481013066085092526649876305223193152033134970039683636461675258425560372 75
UVM_FATAL @ 2417595 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2417595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 18040127924658838153535623466812051881772523295299645351620489988027397837414 75
UVM_FATAL @ 9727536 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 9727536 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44228240698353215312770290612359597028801199762059198453073215817714314093134 751
UVM_FATAL @ 897536924 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 897536924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 90584292720287783673589413896778245236011337224064403220222833699094994003975 217
UVM_FATAL @ 2405024493 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2405024493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 57504784780948083531829512600293397417134458775840362955678794438148170230010 301
UVM_FATAL @ 146483818 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 146483818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 87719179360896193364015087315247582329015227083099049971118939702006167852529 77
UVM_FATAL @ 275209302 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 275209302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 79156854047950764949759349060463684451957627037080942570410136221534579423066 75
UVM_FATAL @ 4243780 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 4243780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 18138173218224610087388781075062658219886132973545041038397788999643124601625 143
UVM_FATAL @ 1071191489 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1071191489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 100794756163815028193634065112112832235787887828357840264311204323129738984835 143
UVM_FATAL @ 77683232 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 77683232 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 56136801406279185111263433175144374846890909000428720179157830762791653286422 75
UVM_FATAL @ 9057512 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 9057512 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 52330658183100979988575666581345533839181088372790084591145524808326817177283 446
UVM_FATAL @ 1710144105 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1710144105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---