Simulation Results: gpio

 
09/01/2026 17:01:39 sha: a18de42 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.48 %
  • code
  • 92.61 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 98.38 %
  • cond
  • 95.61 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
100.00%
V2
98.92%
V2S
91.11%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.400s 255.526us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.520s 85.774us 50 50 100.00
gpio_smoke_en_cdc_prim 1.560s 373.561us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.260s 181.928us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.900s 17.383us 5 5 100.00
csr_rw 20 20 100.00
gpio_csr_rw 0.920s 35.499us 20 20 100.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 6.090s 1071.631us 5 5 100.00
csr_aliasing 5 5 100.00
gpio_csr_aliasing 2.550s 140.378us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.180s 24.459us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
gpio_csr_rw 0.920s 35.499us 20 20 100.00
gpio_csr_aliasing 2.550s 140.378us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.290s 327.705us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.260s 31.799us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.030s 41.590us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.210s 233.091us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 2.900s 225.155us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 2.770s 91.176us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 16.900s 940.903us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 4.750s 1117.207us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.190s 559.658us 50 50 100.00
stress_all 50 50 100.00
gpio_stress_all 166.560s 63501.861us 50 50 100.00
alert_test 50 50 100.00
gpio_alert_test 0.760s 19.331us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.890s 33.500us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 3.240s 514.496us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 3.240s 514.496us 20 20 100.00
tl_d_outstanding_access 46 50 92.00
gpio_csr_rw 0.920s 35.499us 20 20 100.00
gpio_same_csr_outstanding 1.500s 149.018us 16 20 80.00
gpio_csr_aliasing 2.550s 140.378us 5 5 100.00
gpio_csr_hw_reset 0.900s 17.383us 5 5 100.00
tl_d_partial_access 46 50 92.00
gpio_csr_rw 0.920s 35.499us 20 20 100.00
gpio_same_csr_outstanding 1.500s 149.018us 16 20 80.00
gpio_csr_aliasing 2.550s 140.378us 5 5 100.00
gpio_csr_hw_reset 0.900s 17.383us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 23 25 92.00
gpio_sec_cm 1.000s 223.814us 5 5 100.00
gpio_tl_intg_err 2.450s 405.627us 18 20 90.00
sec_cm_bus_integrity 18 20 90.00
gpio_tl_intg_err 2.450s 405.627us 18 20 90.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 50 50 100.00
gpio_rand_straps 0.820s 45.364us 50 50 100.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 10.150s 3633.537us 0 50 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.790s 10.942us 50 50 100.00

Error Messages

   Test seed line log context
UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -*
gpio_stress_all_with_rand_reset 6624425407020257498995950901997723573718236448008471314868310578896724035858 237
UVM_FATAL @ 869141716 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 869141716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 17884762840692965364027611410533547613739730989607932647744682459385251880476 75
UVM_FATAL @ 31158267 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 31158267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 28819530216218293508434940102686702090889603019885821512879258198220984715576 76
UVM_FATAL @ 218830160 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 218830160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 80992285354677610955709690456715681934843935305956510251377960612826818697169 75
UVM_FATAL @ 58880900 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 58880900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 93477618359125565657699962563810983064743720229221829754002523588014483092864 76
UVM_FATAL @ 194977195 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 194977195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 37232803714790378290019716658909629008914577079774907329653774032189515134409 78
UVM_FATAL @ 333724653 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 333724653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 22832144864584648554640370979129603537256157397720492248947113904856896791953 75
UVM_FATAL @ 101621180 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 101621180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23753803336752074601236367758114232056395558894107859517750608693832678943792 76
UVM_FATAL @ 277990907 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 277990907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 12306444626747525126773831479521237024926642265493397659072236655472136421371 75
UVM_FATAL @ 8036990 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 8036990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 14637955763072802155148329178926605913634170192642525933348973781406697399736 171
UVM_FATAL @ 114485369 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 114485369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 3315782688400833061163389271111490706455545777884941203529669748633470081369 75
UVM_FATAL @ 390676790 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 390676790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 42453870211098380713956603806897268317838212295089274401140223703796619083757 250
UVM_FATAL @ 1176405973 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1176405973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 87899182085613624692429721855697628162920779507867556754593102715592279223673 75
UVM_FATAL @ 2252171 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2252171 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 104771003175973318347551450915167168068973033480939547467917484271775640950577 75
UVM_FATAL @ 380562677 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 380562677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 89650834670650696966368570417471856571103181265202107696966908016992088175270 77
UVM_FATAL @ 188649229 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 188649229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 115215243922747360822741912064301830617958807117762142379727406369608116626217 75
UVM_FATAL @ 343495561 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 343495561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 96468466759501381543492319121798689374438459412100525191756828220300489525489 75
UVM_FATAL @ 533524833 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 533524833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 96195577767217106460855407281517786183318685070478795082290238057723047196358 75
UVM_FATAL @ 1714981 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1714981 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68358851084013762652164404179623455666167248609678103099532795556364065585916 77
UVM_FATAL @ 420326582 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 420326582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 19989813502020011069056852914643110537614800783328951298214061790788204792335 75
UVM_FATAL @ 54664605 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 54664605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 10056262677649276742501912418392849265803872863480965416532297748322621355066 75
UVM_FATAL @ 41558149 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 41558149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 25643169787416743056165970422017497372916865335290854818541153885735210110436 75
UVM_FATAL @ 3020321 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3020321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 66823343435976914954948411563950431139457780217786207444446522251536259167782 75
UVM_FATAL @ 152253725 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 152253725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1163) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 114939430578252062080201606648642950892482373369669192455777545190830159079059 213
UVM_FATAL @ 434333009 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 434333009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 25948550764695597116746859791518659415879318823214707972111183335145894522962 321
UVM_FATAL @ 705858354 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 705858354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 62647553763724723627520516187575421264083794800741071944273079032507784552074 77
UVM_FATAL @ 9584982 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 9584982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 20802028549146654596599346913468839470313057807519310893140589093467006188537 77
UVM_FATAL @ 366775876 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 366775876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 39581581220280430922907335048130834296396503828195035757889573017657670192332 362
UVM_FATAL @ 3633536954 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3633536954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 60428252857145218619887746954555540048209006046135271150046242725962651053860 77
UVM_FATAL @ 18122674 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 18122674 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 88968759771077409929899133505220651626041580266285945775736686044496902574418 100
UVM_FATAL @ 4751555085 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4751555085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82156425022275931390371701975754141010892509753867266503702483301940320655869 132
UVM_FATAL @ 796821943 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 796821943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 76805931872925211585182805422267310263539333211223567585609042651080506230553 211
UVM_FATAL @ 592642192 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 592642192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 83361182301123576366869554282977854377827814934042645241144632130436823222136 91
UVM_FATAL @ 797642639 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 797642639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 50120154681090970368440402730903934500205853771976749365718379094879251556255 77
UVM_FATAL @ 22014591 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 22014591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 95165573583620269726727252843084409169125271459912393061287489903960647024262 79
UVM_FATAL @ 23237682 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 23237682 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 4668104617694157703181673381956322090862805362203788380213426372695414937432 85
UVM_FATAL @ 34210936 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 34210936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 107343213895099327174591661817548222462321018694519745652934069386279467008070 77
UVM_FATAL @ 25264094 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 25264094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 4488239432967370067797140250917678024403472524354182999260738863846893649809 80
UVM_FATAL @ 106799361 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 106799361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 66423223875879880609554435039163338585998481529133072965467347421667044808179 77
UVM_FATAL @ 4349384 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 4349384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 5690544857066038218923305641343326868414776676815902817320147335741354884126 77
UVM_FATAL @ 2236989 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2236989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 8522136892707541459774549496652360822557260495355359503903389870765145612560 77
UVM_FATAL @ 2662578 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2662578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68012692014471525957205388503532733058040385486734483754330044910726487712986 77
UVM_FATAL @ 3102484 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3102484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 87044966232798723070465367401134869281224163851819573519861279041859264468013 77
UVM_FATAL @ 38763038 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 38763038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 16755404688629908605056005573447519254694398515263426633762237038292240887562 81
UVM_FATAL @ 33709423 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 33709423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 9838976640543003470046276114416519948651493668359891997125341442337238665601 206
UVM_FATAL @ 440856898 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 440856898 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 38155687528924725699737177255050589127199853077186229926903095181516114241269 77
UVM_FATAL @ 5668833 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5668833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 38422685266477874472021845994836397485555205507222993253798079098669202789964 77
UVM_FATAL @ 614488785 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 614488785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 4828065647221895362446286746390833120035375800283480896152442177280477966132 279
UVM_FATAL @ 692752465 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 692752465 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 26795594978105111760868500475851526370644054775789557276491392226493692070760 77
UVM_FATAL @ 2707986 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2707986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 76202144178992429194582625042402648084598195799758519555706824775545625978179 77
UVM_FATAL @ 8944270 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8944270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:642) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
gpio_same_csr_outstanding 53652456004542096738648855932276199709820489108021599316697423546864173875250 74
UVM_ERROR @ 145330971 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (16003840 [0xf43300] vs 16003841 [0xf43301]) addr 0xacee9948 read out mismatch
UVM_INFO @ 145330971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 50134020004590598065653118297868793702775034601620706404292918718857651382523 74
UVM_ERROR @ 301540918 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0xf4fba084 read out mismatch
UVM_INFO @ 301540918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 115159074451554689222446082856724200859595316100121609035349309714392958631179 74
UVM_ERROR @ 12734728 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (9758720 [0x94e800] vs 9758721 [0x94e801]) addr 0x6be45a64 read out mismatch
UVM_INFO @ 12734728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 16173310869734393996863641797573475315015814896835602169828866107216479369713 74
UVM_ERROR @ 274776229 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0xd3bde84 read out mismatch
UVM_INFO @ 274776229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_*.value_* reset value: *
gpio_tl_intg_err 98570021991656789295665453947994217274255934089225231373414563181978536289132 129
UVM_ERROR @ 375354993 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_0.value_0 reset value: 0x0
UVM_INFO @ 375354993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_* reset value: *
gpio_tl_intg_err 5564674825734411863982828173935040740795755399234806038879890568307007254678 118
UVM_ERROR @ 31684156 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (12852740 [0xc41e04] vs 12852741 [0xc41e05]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_0 reset value: 0x4
UVM_INFO @ 31684156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---