| V1 |
|
90.07% |
| V2 |
|
66.61% |
| V2S |
|
80.92% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| otp_ctrl_wake_up | 2.720s | 807.699us | 1 | 1 | 100.00 | |
| smoke | 41 | 50 | 82.00 | |||
| otp_ctrl_smoke | 26.430s | 7193.344us | 41 | 50 | 82.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 4.450s | 255.731us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| otp_ctrl_csr_rw | 3.600s | 588.771us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_bit_bash | 11.090s | 1349.327us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| otp_ctrl_csr_aliasing | 10.040s | 1398.491us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 15 | 20 | 75.00 | |||
| otp_ctrl_csr_mem_rw_with_rand_reset | 5.710s | 1785.867us | 15 | 20 | 75.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| otp_ctrl_csr_rw | 3.600s | 588.771us | 20 | 20 | 100.00 | |
| otp_ctrl_csr_aliasing | 10.040s | 1398.491us | 5 | 5 | 100.00 | |
| mem_walk | 5 | 5 | 100.00 | |||
| otp_ctrl_mem_walk | 2.400s | 138.798us | 5 | 5 | 100.00 | |
| mem_partial_access | 5 | 5 | 100.00 | |||
| otp_ctrl_mem_partial_access | 2.920s | 538.579us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| dai_access_partition_walk | 0 | 1 | 0.00 | |||
| otp_ctrl_partition_walk | 205.130s | 106496.968us | 0 | 1 | 0.00 | |
| init_fail | 200 | 300 | 66.67 | |||
| otp_ctrl_init_fail | 9.320s | 2112.313us | 200 | 300 | 66.67 | |
| partition_check | 13 | 60 | 21.67 | |||
| otp_ctrl_background_chks | 35.160s | 14464.962us | 4 | 10 | 40.00 | |
| otp_ctrl_check_fail | 38.670s | 18319.805us | 9 | 50 | 18.00 | |
| regwen_during_otp_init | 26 | 50 | 52.00 | |||
| otp_ctrl_regwen | 18.670s | 4974.650us | 26 | 50 | 52.00 | |
| partition_lock | 19 | 50 | 38.00 | |||
| otp_ctrl_dai_lock | 51.480s | 24020.250us | 19 | 50 | 38.00 | |
| interface_key_check | 15 | 50 | 30.00 | |||
| otp_ctrl_parallel_key_req | 51.840s | 17400.889us | 15 | 50 | 30.00 | |
| lc_interactions | 213 | 250 | 85.20 | |||
| otp_ctrl_parallel_lc_req | 26.870s | 1732.744us | 30 | 50 | 60.00 | |
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| otp_dai_errors | 37 | 50 | 74.00 | |||
| otp_ctrl_dai_errs | 110.360s | 40301.600us | 37 | 50 | 74.00 | |
| otp_macro_errors | 17 | 50 | 34.00 | |||
| otp_ctrl_macro_errs | 92.370s | 33265.549us | 17 | 50 | 34.00 | |
| test_access | 16 | 50 | 32.00 | |||
| otp_ctrl_test_access | 130.700s | 17724.164us | 16 | 50 | 32.00 | |
| stress_all | 4 | 50 | 8.00 | |||
| otp_ctrl_stress_all | 151.560s | 59130.644us | 4 | 50 | 8.00 | |
| intr_test | 50 | 50 | 100.00 | |||
| otp_ctrl_intr_test | 3.440s | 649.958us | 50 | 50 | 100.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| otp_ctrl_alert_test | 6.730s | 406.551us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| otp_ctrl_tl_errors | 8.420s | 231.680us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| otp_ctrl_tl_errors | 8.420s | 231.680us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 4.450s | 255.731us | 5 | 5 | 100.00 | |
| otp_ctrl_csr_rw | 3.600s | 588.771us | 20 | 20 | 100.00 | |
| otp_ctrl_csr_aliasing | 10.040s | 1398.491us | 5 | 5 | 100.00 | |
| otp_ctrl_same_csr_outstanding | 6.060s | 351.000us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| otp_ctrl_csr_hw_reset | 4.450s | 255.731us | 5 | 5 | 100.00 | |
| otp_ctrl_csr_rw | 3.600s | 588.771us | 20 | 20 | 100.00 | |
| otp_ctrl_csr_aliasing | 10.040s | 1398.491us | 5 | 5 | 100.00 | |
| otp_ctrl_same_csr_outstanding | 6.060s | 351.000us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| sec_cm_additional_check | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| otp_ctrl_tl_intg_err | 58.330s | 23556.981us | 20 | 20 | 100.00 | |
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| prim_count_check | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| prim_fsm_check | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| otp_ctrl_tl_intg_err | 58.330s | 23556.981us | 20 | 20 | 100.00 | |
| sec_cm_secret_mem_scramble | 41 | 50 | 82.00 | |||
| otp_ctrl_smoke | 26.430s | 7193.344us | 41 | 50 | 82.00 | |
| sec_cm_part_mem_digest | 41 | 50 | 82.00 | |||
| otp_ctrl_smoke | 26.430s | 7193.344us | 41 | 50 | 82.00 | |
| sec_cm_dai_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_kdi_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_lci_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_part_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_scrmbl_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_timer_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_dai_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_kdi_seed_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_kdi_entropy_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_lci_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_part_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_scrmbl_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_timer_integ_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_timer_cnsty_ctr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_timer_lfsr_redun | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_dai_fsm_local_esc | 188 | 205 | 91.71 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_lci_fsm_local_esc | 183 | 200 | 91.50 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| sec_cm_kdi_fsm_local_esc | 183 | 200 | 91.50 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| sec_cm_part_fsm_local_esc | 200 | 250 | 80.00 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| otp_ctrl_macro_errs | 92.370s | 33265.549us | 17 | 50 | 34.00 | |
| sec_cm_scrmbl_fsm_local_esc | 183 | 200 | 91.50 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| sec_cm_timer_fsm_local_esc | 188 | 205 | 91.71 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_dai_fsm_global_esc | 188 | 205 | 91.71 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_lci_fsm_global_esc | 183 | 200 | 91.50 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| sec_cm_kdi_fsm_global_esc | 183 | 200 | 91.50 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| sec_cm_part_fsm_global_esc | 200 | 250 | 80.00 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| otp_ctrl_macro_errs | 92.370s | 33265.549us | 17 | 50 | 34.00 | |
| sec_cm_scrmbl_fsm_global_esc | 183 | 200 | 91.50 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| sec_cm_timer_fsm_global_esc | 188 | 205 | 91.71 | |||
| otp_ctrl_parallel_lc_esc | 60.840s | 24302.523us | 183 | 200 | 91.50 | |
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_part_data_reg_integrity | 200 | 300 | 66.67 | |||
| otp_ctrl_init_fail | 9.320s | 2112.313us | 200 | 300 | 66.67 | |
| sec_cm_part_data_reg_bkgn_chk | 9 | 50 | 18.00 | |||
| otp_ctrl_check_fail | 38.670s | 18319.805us | 9 | 50 | 18.00 | |
| sec_cm_part_mem_regren | 19 | 50 | 38.00 | |||
| otp_ctrl_dai_lock | 51.480s | 24020.250us | 19 | 50 | 38.00 | |
| sec_cm_part_mem_sw_unreadable | 19 | 50 | 38.00 | |||
| otp_ctrl_dai_lock | 51.480s | 24020.250us | 19 | 50 | 38.00 | |
| sec_cm_part_mem_sw_unwritable | 19 | 50 | 38.00 | |||
| otp_ctrl_dai_lock | 51.480s | 24020.250us | 19 | 50 | 38.00 | |
| sec_cm_lc_part_mem_sw_noaccess | 19 | 50 | 38.00 | |||
| otp_ctrl_dai_lock | 51.480s | 24020.250us | 19 | 50 | 38.00 | |
| sec_cm_access_ctrl_mubi | 19 | 50 | 38.00 | |||
| otp_ctrl_dai_lock | 51.480s | 24020.250us | 19 | 50 | 38.00 | |
| sec_cm_token_valid_ctrl_mubi | 41 | 50 | 82.00 | |||
| otp_ctrl_smoke | 26.430s | 7193.344us | 41 | 50 | 82.00 | |
| sec_cm_lc_ctrl_intersig_mubi | 19 | 50 | 38.00 | |||
| otp_ctrl_dai_lock | 51.480s | 24020.250us | 19 | 50 | 38.00 | |
| sec_cm_test_bus_lc_gated | 41 | 50 | 82.00 | |||
| otp_ctrl_smoke | 26.430s | 7193.344us | 41 | 50 | 82.00 | |
| sec_cm_test_tl_lc_gate_fsm_sparse | 5 | 5 | 100.00 | |||
| otp_ctrl_sec_cm | 369.950s | 48818.728us | 5 | 5 | 100.00 | |
| sec_cm_direct_access_config_regwen | 26 | 50 | 52.00 | |||
| otp_ctrl_regwen | 18.670s | 4974.650us | 26 | 50 | 52.00 | |
| sec_cm_check_trigger_config_regwen | 41 | 50 | 82.00 | |||
| otp_ctrl_smoke | 26.430s | 7193.344us | 41 | 50 | 82.00 | |
| sec_cm_check_config_regwen | 41 | 50 | 82.00 | |||
| otp_ctrl_smoke | 26.430s | 7193.344us | 41 | 50 | 82.00 | |
| sec_cm_macro_mem_integrity | 17 | 50 | 34.00 | |||
| otp_ctrl_macro_errs | 92.370s | 33265.549us | 17 | 50 | 34.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| otp_ctrl_low_freq_read | 0 | 1 | 0.00 | |||
| otp_ctrl_low_freq_read | 97.080s | 21967.590us | 0 | 1 | 0.00 | |
| stress_all_with_rand_reset | 0 | 100 | 0.00 | |||
| otp_ctrl_stress_all_with_rand_reset | 47.890s | 17656.884us | 0 | 100 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Offending '(cio_test_en_o == *)' | ||||
| otp_ctrl_csr_mem_rw_with_rand_reset | 89436067593886947289873890829153169617353417046539352335108306923132924753524 | 89 |
Offending '(cio_test_en_o == 0)'
UVM_ERROR @ 128556001 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 128556001 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 63584032249979364433149884706687633255907297708241444949761438653592200829661 | 89 |
Offending '(cio_test_en_o == 0)'
UVM_ERROR @ 64075072 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 64075072 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 52957112567589988752494926584578648837486561224424473416963826169902150951746 | 89 |
Offending '(cio_test_en_o == 0)'
UVM_ERROR @ 120394779 ps: (otp_ctrl_if.sv:389) [ASSERT FAILED] CioTestEnOWithDftOff_A
UVM_INFO @ 120394779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_scoreboard.sv:605) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * | ||||
| otp_ctrl_csr_mem_rw_with_rand_reset | 15185733649326120163974152431470354021456211612648017764299637124236511710242 | 94 |
UVM_ERROR @ 74865451 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 74865451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_csr_mem_rw_with_rand_reset | 18455957073493157076674238088127639618700321570966734748058921397191746219791 | 88 |
UVM_ERROR @ 30887214 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30887214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_csr_mem_rw_with_rand_reset | 32301732723355249500755297711536362963519010240604524551308111870717324741392 | 94 |
UVM_ERROR @ 73977150 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 73977150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_csr_mem_rw_with_rand_reset | 88618537535804981007724337071088207732577029139654115295187122662126736347146 | 94 |
UVM_ERROR @ 70127625 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 70127625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 24768015121472536329184829651125562916127362455154652013689385530221595296356 | 93 |
UVM_ERROR @ 121298065 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 121298065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 17476872456109767558290512704652238131833281373955122429781841298763639659083 | 89 |
UVM_ERROR @ 43889810 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 43889810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 100803164806188123522089647446555057182411776277640006478915439868209459139245 | 88 |
UVM_ERROR @ 42198740 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 42198740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 1801469587895584687048852304378087765897972869857917952884692708392785475938 | 97 |
UVM_ERROR @ 86023531 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 86023531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 23671641404975225558458954768619848204456778863102288958922382770883192960008 | 91 |
UVM_ERROR @ 32618520 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32618520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 51903491110933032118435841955683288588763697131600503426545931282835748372614 | 95 |
UVM_ERROR @ 505480561 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 505480561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 35895421297952543160979102206307843015985045155013465556336624883473470556433 | 193 |
UVM_ERROR @ 213597647 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 213597647 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 50155058306004943645667957290081835127118377934451891535274980621765681717203 | 591 |
UVM_ERROR @ 146308756 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 146308756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 27848721478169644199527065207903701277264518553137791898930422347329361448847 | 520 |
UVM_ERROR @ 1912073602 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1912073602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 50620117306802742556612650045246985616311454927015376584253901236600196350899 | 97 |
UVM_ERROR @ 33250894 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33250894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 199674766116477039597091488562210402306356643191982596604368923830563460718 | 95 |
UVM_ERROR @ 62758011 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62758011 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 82648435725954735425016155027688629585604272119462555259389327663354459374075 | 89 |
UVM_ERROR @ 61234616 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 61234616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 89549847267270754265946989386470641820301007345711246647076766350553781805437 | 98 |
UVM_ERROR @ 504294062 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 504294062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 44174723656896869581830907352142284871481103055092159028901553571991419274022 | 92 |
UVM_ERROR @ 503658327 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 503658327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 37220821081863096119715440452920740468368800704464581343410734059862269367572 | 1321 |
UVM_ERROR @ 164185491 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 164185491 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 2857102368627743166112458643812292411013836109620640618940982443289271018853 | 88 |
UVM_ERROR @ 121878315 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 121878315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 39877378443640280945867211548732029483774741788666084998555692840463641391305 | 88 |
UVM_ERROR @ 49725886 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 49725886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 94685634835374128479281050713780661967480003470797558016358800014781734129319 | 93 |
UVM_ERROR @ 69308362 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 69308362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 76606562592758394608153288912689447000840982922126074113024766857596898926211 | 93 |
UVM_ERROR @ 121146078 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 121146078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 89310603804524671509538874176475097573167197972848325899952052896985526187195 | 89 |
UVM_ERROR @ 62863164 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62863164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 100007031246253500654651597440154266625123092084673078288574074813632115475777 | 95 |
UVM_ERROR @ 502214255 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 502214255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 87613400903308591137985793714935771706754756036020947162790356610067005457995 | 89 |
UVM_ERROR @ 125339979 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125339979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 67672683860128149400324275744689200136715028494171167969150609757479920453556 | 93 |
UVM_ERROR @ 31417963 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31417963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 95264096522830998833640956418721038507887916129064880198382222807087162109450 | 89 |
UVM_ERROR @ 31319446 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31319446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 61821199587533715175034591876819260339023480470082322896322508237178206860147 | 93 |
UVM_ERROR @ 62692778 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62692778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 5974673062456363621848099722952847643638203364910224028327443073742035546364 | 88 |
UVM_ERROR @ 45691816 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 45691816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 11251910179431836067158552995478595865760201745588517920090220462255999125781 | 88 |
UVM_ERROR @ 60433301 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 60433301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 51277580812462591727291739104885564146379392142050351211977897575129374779870 | 92 |
UVM_ERROR @ 38606158 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 38606158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 34924191476111158299192470597233393064224439315540927259454138158004842117422 | 88 |
UVM_ERROR @ 133078140 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 133078140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 111276052801060460579994288079563794703949462393223274282801017466603318677907 | 99 |
UVM_ERROR @ 542547015 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 542547015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 7280578222887649014041297703681252043050815830000777849820267808522734327239 | 90 |
UVM_ERROR @ 30614824 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 30614824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 1780948423607973217068040695355311093992747937156579224769896786775205905929 | 201 |
UVM_ERROR @ 17656883728 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 17656883728 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 29035130491420421649947770536279869254421536611858205484835618309003313308434 | 95 |
UVM_ERROR @ 35240720 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 35240720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 71593361846919494953179880252957361482425147678791096868147071928992734281883 | 94 |
UVM_ERROR @ 31686965 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31686965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 105159209621376304191702327597950274369301555111415103686065370633428168371335 | 259 |
UVM_ERROR @ 13536075198 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 13536075198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 89573483355916214698885591517830253336235703711376222428721694654747444987757 | 596 |
UVM_ERROR @ 537434618 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 537434618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 58894991036617612206671045386940160627593163401587205072900836514731581706586 | 89 |
UVM_ERROR @ 126288993 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 126288993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 103669017469088862870893360530668594970196397653935342652226558272692547996515 | 91 |
UVM_ERROR @ 40795789 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 40795789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 87397425024777631437937777701947029512407608885264766868926004292165132974760 | 91 |
UVM_ERROR @ 31890331 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31890331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 104012833997471858468632309944054340176617335348520269737226362030529295910131 | 89 |
UVM_ERROR @ 119941039 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 119941039 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 27681787494382036445800004259570980601979478685850505858513181301132333090261 | 199 |
UVM_ERROR @ 149634559 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 149634559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 75530140473261045462903108881526714477877659457589129662857100280183026093458 | 95 |
UVM_ERROR @ 507568669 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 507568669 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 29889953597719493139510966548649274042716869515963745398261715647489266941018 | 99 |
UVM_ERROR @ 32279230 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32279230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 62997587862774467926357934477634782975273724132832385991172247565790211624879 | 101 |
UVM_ERROR @ 73694010 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 73694010 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 86287190491687457132526920339182722815846695862225424361607829646315104424340 | 88 |
UVM_ERROR @ 32443215 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32443215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 19892202360090977292403870015593226001677817049942124430022980630858668538382 | 91 |
UVM_ERROR @ 503159917 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 503159917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 110115483553080250052160124580057223276338186350063411319878949150842105373833 | 89 |
UVM_ERROR @ 32955930 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32955930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 112835517506060530479567934858585832012096093413432139441252254574831821315814 | 91 |
UVM_ERROR @ 31735730 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31735730 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 13303153433835685892409696770811156759238445458351000058785110902953893143801 | 1297 |
UVM_ERROR @ 1621976299 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 1621976299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 12526315434621482043027342263711988206140732158131146720980529019289117164846 | 197 |
UVM_ERROR @ 136999023 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 136999023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 74942352593994110389264339008471755736332081306812854405537314649382409634195 | 89 |
UVM_ERROR @ 120708988 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 120708988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 99505049717509515864309328597095107986025839872568700810166917171990204261189 | 88 |
UVM_ERROR @ 161731251 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 161731251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 33453608126047342812196279156922521376865063182620688950343523505954215369491 | 113 |
UVM_ERROR @ 128487166 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 128487166 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 56316079296690097660522305157530562089229155279283274399156375603326619211220 | 95 |
UVM_ERROR @ 31198800 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 31198800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 23221046282795755074619263859684703321013661804075861209206749925718947627992 | 89 |
UVM_ERROR @ 502460541 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 502460541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 39096917031582661127073477033252617935566753326653920593472032284702244938055 | 93 |
UVM_ERROR @ 514177401 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 514177401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 35905855963119543054450905779464660422615632047843864302791687169138028696946 | 99 |
UVM_ERROR @ 510722881 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 510722881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 113516980514313954681879372674581857960545483752476863401715394928897468396603 | 93 |
UVM_ERROR @ 33226579 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33226579 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 31037150802203189828458787261253959168618945346846265407971958553228137897190 | 93 |
UVM_ERROR @ 507823628 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 507823628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 71529966255629775107537621725135741457356206637388149672409114544899947564303 | 163 |
UVM_ERROR @ 81551949 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 81551949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 112505554158504633144085992534637668238106481041255179180041512321723583372037 | 89 |
UVM_ERROR @ 34499863 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34499863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 19326490662195541282562357808341288001677732644692320719769237706565106952689 | 89 |
UVM_ERROR @ 500972221 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 500972221 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 8128483041524926643476607239088983254984526402819424473246257111533263987507 | 89 |
UVM_ERROR @ 62746959 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62746959 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 38214974659056939031217538417682442392666781186822462696577562478678269973024 | 2066 |
UVM_ERROR @ 678042156 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 678042156 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 47724067664343058572385923367718556188709587846298235898478258385941646140490 | 88 |
UVM_ERROR @ 130976364 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 130976364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 6502204976361785677386840769454333967245613932163447776764486962600250270221 | 493 |
UVM_ERROR @ 323924516 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 323924516 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 11253865037840569177384730082802023179732657775754198184392954649379926295207 | 88 |
UVM_ERROR @ 62488969 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62488969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 96804250768815240617484037041443009041894033419398798500041826920443784220368 | 88 |
UVM_ERROR @ 503487461 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 503487461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 109277851583515976318925657489615573512519654813889121932984969180696894670266 | 99 |
UVM_ERROR @ 125023524 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 125023524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 34365117536582791685342673333429389196787361650707459556782265936322883798603 | 98 |
UVM_ERROR @ 35035393 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 35035393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 18019367608268026744436980781920259437145892415944415498472116401126302356800 | 168 |
UVM_ERROR @ 133751167 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 133751167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 18901509983105068080441957377201297293807914539752910732246178653849056514583 | 88 |
UVM_ERROR @ 71505026 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 71505026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 36377669648049545550396769681428903715839853893975300718712513581309573949897 | 103 |
UVM_ERROR @ 64913253 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 64913253 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 40714143548443675299216310547342948235519308710832911560210580451389977926577 | 89 |
UVM_ERROR @ 34615409 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 34615409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 88513390144552868665792656436905997555292949950630412192591985499838413960930 | 95 |
UVM_ERROR @ 504657817 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 504657817 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 4117676462552573160773822991719656948049438816376320040414662772730721982750 | 95 |
UVM_ERROR @ 501170744 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 501170744 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 20374213038856028074681909771133551041620982076942273703897792102186415977023 | 88 |
UVM_ERROR @ 37571772 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 37571772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 29024656729471804796590230693439572855556722177217583068453494049316604985708 | 89 |
UVM_ERROR @ 135208626 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 135208626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 82183392644500698598172051710681636980211047728938605699725461504152882160073 | 88 |
UVM_ERROR @ 33751544 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 33751544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 80908029940877993337938575671210830566920213724425299639252625229557789604367 | 91 |
UVM_ERROR @ 116102183 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 116102183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 61758824510066388820981091404852505572037723804561023607385064375295271109652 | 99 |
UVM_ERROR @ 63271459 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 63271459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 78073918010557499773267084684605049429300498575766099966444875333057439123501 | 232 |
UVM_ERROR @ 279719673 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 279719673 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 58449028865678192487383417735078303138677207112360919239984077875785445867662 | 90 |
UVM_ERROR @ 128101526 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 128101526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 34496701809396832471091481576401791260508556057554936407200015162798411630217 | 89 |
UVM_ERROR @ 62770560 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62770560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 22525438693924150858756910382793758578731873426012288859691468021076314026416 | 91 |
UVM_ERROR @ 504394264 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 504394264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 45403352067101518999913385863840807192879231041367253528224381311979240835966 | 91 |
UVM_ERROR @ 128681753 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 128681753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 8053174938806833524066153674081690947164124982758339263996275787293682091682 | 91 |
UVM_ERROR @ 62423758 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 62423758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 101997925618267084507316220951961391656921593024863715143252622024858185507095 | 93 |
UVM_ERROR @ 59709801 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 59709801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 61443986636658078102306694795031925373310661813247718074316196069764793877150 | 95 |
UVM_ERROR @ 61829942 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 61829942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 110765320120178212874464908981076599865917160222320799282412057083595439199553 | 109 |
UVM_ERROR @ 145589604 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 145589604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 45715828409941119465432512319899521732894435326154329929480680948859178842146 | 89 |
UVM_ERROR @ 501423570 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 501423570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 2100051456266257918938362200000851567132835115339347455332463528936291215383 | 99 |
UVM_ERROR @ 511035763 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 511035763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 97405582667735932928906036631879681603653632788424386480992192871626270934352 | 93 |
UVM_ERROR @ 122408793 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 122408793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 91720129437978465668653865560274438426095779519509873681914438335667850962613 | 90 |
UVM_ERROR @ 119292961 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 119292961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 62092419575308514854076285265288283195538590676504180299797728869508338079083 | 89 |
UVM_ERROR @ 500008417 ps: (cip_base_scoreboard.sv:605) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 500008417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | ||||
| otp_ctrl_partition_walk | 18167000570882402191868877267846264061726954733994291869669840483039450071512 | 112552 |
UVM_ERROR @ 106496968246 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_partition_walk_vseq] Check failed rdata0 == exp_data0 (0 [0x0] vs 16080 [0x3ed0]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 106496968246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | ||||
| otp_ctrl_low_freq_read | 88287528122902152763873042138274199159730824410645153124566535698270362094088 | 86 |
UVM_ERROR @ 21967589927 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 21967589927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 29996679123406704563230052008345030633890291294677929201076690016133950510265 | 87 |
UVM_ERROR @ 59130644257 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 59130644257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 27588995527725014646791183154235084479352207534206372120710320229911316399811 | 87 |
UVM_ERROR @ 59004382974 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 59004382974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 36395978298388660674089849131251548190411194336652073242232357081600382197557 | 41645 |
UVM_ERROR @ 73873577201 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 73873577201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 72966011428968204657250187811944365065797686684003079976767642831953600261899 | 87 |
UVM_ERROR @ 59084811402 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 59084811402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 100759096441556226825376545822382908047608667262483615629800583529422013597964 | 24829 |
UVM_ERROR @ 57725500745 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 57725500745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 113587175075286843672979375279524302004625285411503055761456515490696622692471 | 5479 |
UVM_ERROR @ 22859684136 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22859684136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 101009140087225932698254854593575716661721239493430992687558513422854938950847 | 87 |
UVM_ERROR @ 54299200567 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 54299200567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 108421086754145887588794350030311596012596758124482837704091989529975327634179 | 38743 |
UVM_ERROR @ 49009569135 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 49009569135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 5072277875121351839105623618048441124336983098586086947701138278222077559019 | 135 |
UVM_ERROR @ 47702078539 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 47702078539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * | ||||
| otp_ctrl_init_fail | 29016367725717631102582604977768959275805049266448709733878152888648068104323 | 786 |
UVM_ERROR @ 84283419 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 84283419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 94603588610160622542425299913994780785904243288277219133086826987925027097213 | 2143 |
UVM_ERROR @ 103227403 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 103227403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 76031765282577022365530836540567714534983806360117802715081311204675242648317 | 9095 |
UVM_ERROR @ 922471938 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 922471938 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 52658378557438521254635078608798374973609920168988964063378379760895106815418 | 3399 |
UVM_ERROR @ 3507680259 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 3507680259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 75766026606240191132365759329341139446862848980565382270182801783164288861929 | 6689 |
UVM_ERROR @ 122279719 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 122279719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 25347876172352473713735971931501941715916025885845902899981034443931833024269 | 96 |
UVM_ERROR @ 664305066 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 664305066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 11229619205307824577727073580784520281124872432769168612120365957128595045385 | 2969 |
UVM_ERROR @ 1510108013 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1510108013 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 2948630839456763331819793211472778784855087144161318676391628295724677436714 | 2441 |
UVM_ERROR @ 266263123 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 266263123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 96606511575559947705828948121678994351057615914827596747984876098453641254018 | 3927 |
UVM_ERROR @ 329083960 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 329083960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 27954489124427459482829435690422488114539030158260111340621739286965541080571 | 3529 |
UVM_ERROR @ 218475170 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 218475170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 21904029232746554508596892060932291892861795209576251447075779040026793846221 | 473 |
UVM_ERROR @ 886790829 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 886790829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 44389769376702559859909927874386065333751375715596380234095135726620128681147 | 4209 |
UVM_ERROR @ 176269635 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 176269635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 71651232513630482962313206064535705883068560587395757146048137530403257054419 | 362 |
UVM_ERROR @ 138878286 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 138878286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 88404238958567745124997646966462473731298902899223144839445674143514388368468 | 3945 |
UVM_ERROR @ 180444386 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 180444386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 98555707595126336674635453297014386285688968030965541394920803568592726249737 | 2025 |
UVM_ERROR @ 57679570 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 57679570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 69021390409073482541805327027982254582278920568993722223040447231793407990512 | 446 |
UVM_ERROR @ 37178797 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 37178797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 4790286469709515094536983165096507214329038859382551979877538471179033749922 | 5983 |
UVM_ERROR @ 1601936180 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1601936180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 48885501264732810452100163311613994889410722155098981290905486878513290891656 | 966 |
UVM_ERROR @ 710732419 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 710732419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 110253775631411221492002377796222202222768354413209586807539429706319652281738 | 3425 |
UVM_ERROR @ 162265322 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 162265322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 49907280081827753833411481173161498576649195607446254127737114811617425514821 | 1420 |
UVM_ERROR @ 204166957 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 204166957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 3683269638715037255730691738392894803615740042187815199969081274060447770619 | 7329 |
UVM_ERROR @ 754261052 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 754261052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 30446539118735556230961955608269480669253105082697621924659928568009622168920 | 1128 |
UVM_ERROR @ 111030394 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 111030394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 38063569345023388962801494271222107980596697242634829795727857949656791630342 | 496 |
UVM_ERROR @ 149513053 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 149513053 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 52926955770034236854872274037815866628945960697025315313700552162533896220712 | 546 |
UVM_ERROR @ 38125369 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38125369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 66451611585225226727747324351423850817949843689209320194036686221965434228082 | 3211 |
UVM_ERROR @ 165987661 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 165987661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 105012888905680686758873731289302679639011142150548691614589188141298318858237 | 1031 |
UVM_ERROR @ 57193497 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 57193497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 56849828992904463097758292191431404323105071353580486957094905701795940640255 | 770 |
UVM_ERROR @ 82525350 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 82525350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 53151419453865507323163141440952551041504642542840168472994771260813095920559 | 1741 |
UVM_ERROR @ 100870771 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 100870771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 84869054408308665823707824121111926891526750266560333610021280903073120387862 | 8273 |
UVM_ERROR @ 418536666 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 418536666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 13151791780392870257681337559076782319109460718653695831620551668590617474453 | 419 |
UVM_ERROR @ 115043596 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 115043596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 77333619800336869988019652195004316791858859844259536709593611573505590363632 | 1279 |
UVM_ERROR @ 181271973 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 181271973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 107571752829008837299424341499136197838740801230234202149331972121441626191328 | 308 |
UVM_ERROR @ 83163735 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 83163735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 67024051569385861181575242564773360123690178587384644768762240378621832611001 | 2321 |
UVM_ERROR @ 1234651764 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1234651764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 99053813777920944046087713219039864392642033379711926672080188651167411349920 | 3091 |
UVM_ERROR @ 100290524 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 100290524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 67908059327553918914773175482212578220974173646209061739467496405721785925247 | 1928 |
UVM_ERROR @ 116816311 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 116816311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 79030486819159135506939996952024800246817871303596637168144541453069670269490 | 3783 |
UVM_ERROR @ 94538498 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 94538498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 84595748549831242667199097655078030208563811769657334061761058752450818461668 | 1400 |
UVM_ERROR @ 867328020 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 867328020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 23239201989949187080519886660165652789746745406501289546152845304094142587556 | 1523 |
UVM_ERROR @ 175428627 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 175428627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 82623095625377142047507427234078166729670768613594200119890673850107884887116 | 3079 |
UVM_ERROR @ 224427631 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 224427631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 33967102438578260289806053670695410361759641131818832620038657683951188017338 | 10419 |
UVM_ERROR @ 1090022105 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1090022105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 18282277722535845858396333648486897321876473304583901527781115383294515856288 | 1004 |
UVM_ERROR @ 58704433 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 58704433 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 94432448575704758073860598488523211436662890470976292849491389349508050342499 | 655 |
UVM_ERROR @ 40707571 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 40707571 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 48125120909795189276547026161094273999982624847386440369014243718995060073948 | 1329 |
UVM_ERROR @ 148463836 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 148463836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 77419300558125848497763715190424924234782468396216784307908978343587114227670 | 2825 |
UVM_ERROR @ 1040589920 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1040589920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 70880474161505038256330304505297890662215192951368613050297696971037283808462 | 825 |
UVM_ERROR @ 72231295 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 72231295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 42181215410374347136688381793681429027291834179732577003319239343030785820482 | 1236 |
UVM_ERROR @ 190353661 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 190353661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_smoke | 108221597546836005915063988834705477108036865133414605349020731154237857268035 | 3629 |
UVM_ERROR @ 636784494 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 636784494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 25497316278683406735865847468365587663599351555360711724192349731952959590186 | 1283 |
UVM_ERROR @ 263348167 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 263348167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 113876924489110174992674794960969281975133892731662534093620923686170430568926 | 2898 |
UVM_ERROR @ 72348368 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 72348368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 78397981487678770390023743688862778793139700200842559265670701978100439625801 | 1190 |
UVM_ERROR @ 151442658 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 151442658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 113165800864198189739805571588128118776951342006252852946642962515215768933969 | 330 |
UVM_ERROR @ 142626638 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 142626638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 33535031328483603609398616239231497119223981459792050610974414820267163717870 | 610 |
UVM_ERROR @ 71317084 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 71317084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 35999266380043610452428576491974288196537689354142563513683586205728547505179 | 1272 |
UVM_ERROR @ 52729347 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 52729347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 60404039799407422854912243120441559867459050066792880452996518986776074993267 | 1008 |
UVM_ERROR @ 85344368 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 85344368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 39018123080236403435314168381658495392195295262208663940053453379777708066524 | 138 |
UVM_ERROR @ 140881012 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 140881012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 23809121790239573370999418118170925498693304349689210335108512884197482041360 | 554 |
UVM_ERROR @ 77546163 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 77546163 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 5850645126036867856939871719713807570908610744839732225037329955976602035331 | 1014 |
UVM_ERROR @ 73556448 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 73556448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 13605930469697136702991753722377392113212167916598646787551486092101397492862 | 360 |
UVM_ERROR @ 76502199 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 76502199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 25915133928941515295975914459719430880506195641712183223077646359029371677629 | 2998 |
UVM_ERROR @ 99859365 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 99859365 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 27187514983542735361516365916562239273228805848146005994406040109468880148218 | 1564 |
UVM_ERROR @ 65209710 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 65209710 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 52083644372931057193748073693819344854079465252570242217261722257917990778829 | 354 |
UVM_ERROR @ 38422247 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38422247 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 70451212812614293235693136885665527086770453433365866781982371409988783168353 | 382 |
UVM_ERROR @ 152039174 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 152039174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 29306006633261478739776242225671761876552109237796452608467392018394477950723 | 410 |
UVM_ERROR @ 55497132 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 55497132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 6745244318087752317351834894754248161761846289395563061939116424178189551245 | 2334 |
UVM_ERROR @ 255146956 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 255146956 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 95739945717247340423533007094618619074911291843697820779996668151289404300108 | 656 |
UVM_ERROR @ 59468425 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 59468425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 94274234717662827491467211794484697718501752399505838255309069748368114451377 | 2298 |
UVM_ERROR @ 130371640 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 130371640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 90100893491533334009401143097877422145803941828587712544066015731717108207220 | 1804 |
UVM_ERROR @ 241468279 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 241468279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 57575778746912060246389974645133936695690295474245360610799098817430897774940 | 1028 |
UVM_ERROR @ 724074459 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 724074459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 46918439830471875368618479527364488644872424750034932156163124289322154044549 | 1412 |
UVM_ERROR @ 51389757 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 51389757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 22580337663461821109400873505944919317808747046312203777696991490781438166934 | 1014 |
UVM_ERROR @ 68293046 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 68293046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 19891930122286999992287894056436830894313574917623249783496351763402285469703 | 282 |
UVM_ERROR @ 59151125 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 59151125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 50712628465718491844895619268833304590257321082081620177591055182880730940053 | 1722 |
UVM_ERROR @ 123831999 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 123831999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 34516744419992746310488098334245819052324942473238056404520155859750904324712 | 1446 |
UVM_ERROR @ 174764188 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 174764188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 75890402763715458284900337627423093949553019157743418946540420045369104809109 | 440 |
UVM_ERROR @ 145312764 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 145312764 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 1834237649840651748330911253102016779999210275876616608138827958207706657312 | 288 |
UVM_ERROR @ 68759308 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 68759308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 45102833116782612361028236530733945892619195252961600846023623318979354666424 | 142 |
UVM_ERROR @ 506472369 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 506472369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 90426392994492460629650164236095137684170047260944131922915415560943513611411 | 96 |
UVM_ERROR @ 518288102 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 518288102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 3886737730644871032056795433951554401060842243516720629634371538408926377394 | 2654 |
UVM_ERROR @ 231820942 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 231820942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 113340753676460990136368447712020190098520029271848703698468397894853992543729 | 2108 |
UVM_ERROR @ 69145955 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 69145955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 102582755816099998867403463986739273533803901532445007775662208419380729210125 | 342 |
UVM_ERROR @ 565932101 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 565932101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 99588944207507921970511428138700599622059800378773516447982141612747765985011 | 280 |
UVM_ERROR @ 36327093 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 36327093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 39185247575493195253942016157146137886162191889556453150487433838270098498759 | 868 |
UVM_ERROR @ 92166876 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 92166876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 24394959479988661000064218397132329834381307225670643569159500712775883409601 | 1770 |
UVM_ERROR @ 111501999 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 111501999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 56221941969794739923812428650482335624280532087736102157039607361562929012327 | 1010 |
UVM_ERROR @ 170615758 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 170615758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 49861831922587632672773204109922781012932571038444360643160302974963483312259 | 1382 |
UVM_ERROR @ 112425872 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 112425872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 55350521635148529316861164345976674059803835102871732954567325762341161098497 | 548 |
UVM_ERROR @ 260860497 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 260860497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 55656079414152475570500875163146910322537366070708022402369278655434703723782 | 924 |
UVM_ERROR @ 700976637 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 700976637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 18940534458398025889035873894027926474509396541185394806574311734182785808677 | 470 |
UVM_ERROR @ 173590329 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 173590329 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 13968570911411888454420573821149871581581726243451100478524254808196252907931 | 1622 |
UVM_ERROR @ 136480844 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 136480844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 2021697407572227461613179452175758730267958777037356246255014327060124158726 | 1452 |
UVM_ERROR @ 205572484 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 205572484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 65261064614076346177113164834731396152365542722630280081513443011588358522284 | 404 |
UVM_ERROR @ 202721340 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 202721340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 100202553819516848252699479609848864442877130337604496846942802450808945193922 | 432 |
UVM_ERROR @ 77777362 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 77777362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 72858713457140109065454475882584076874124835351376110092703329660700741333101 | 226 |
UVM_ERROR @ 38392823 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38392823 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 54766783960937259439518284626836731599848329420412487107843388288655989272834 | 2608 |
UVM_ERROR @ 133374931 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 133374931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 110136009132589502824561133157614970648256689854517359154646126887304743384810 | 558 |
UVM_ERROR @ 85916934 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 85916934 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 8825139862223950252638849808247850718880825366951062344622943360487847172337 | 1188 |
UVM_ERROR @ 232939756 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 232939756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 104342709477773316905122539445745412811547309547537027165388295634176321347577 | 636 |
UVM_ERROR @ 148503880 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 148503880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 63715002949954170170425941060014225231128896309586001878929433640486773399416 | 326 |
UVM_ERROR @ 69564042 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 69564042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 40636208524104164000848016392390755942055279692459199761774888584140225788220 | 180 |
UVM_ERROR @ 114505871 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 114505871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 5888609869263584959056194432940861729487041303319390284659157185433547033767 | 1136 |
UVM_ERROR @ 107223296 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 107223296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 86942987084001536281022966904247680777541326024395401270611428606875616906732 | 1050 |
UVM_ERROR @ 233103797 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 233103797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 89363525516693647404029150160259042685690701691968702910773672081560985015359 | 1002 |
UVM_ERROR @ 67916057 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 67916057 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 103075543730800274117954603827539018791281186907123235301740890672093637065360 | 1264 |
UVM_ERROR @ 310843935 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 310843935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 52953898849576145564486963666522558178873877117771565603401120635907303205750 | 484 |
UVM_ERROR @ 53506885 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 53506885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 107224678466918875866791792186990130039310388969513792167431719100798851786039 | 184 |
UVM_ERROR @ 130204849 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 130204849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 25631893565785639817242697056221987450875491117987974815912790706923237200759 | 598 |
UVM_ERROR @ 103473026 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 103473026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 113853562681534405563862065493372730753604207886708969094828351114286702788430 | 1032 |
UVM_ERROR @ 44881626 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 44881626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 51730190517283868287397244748322014384025870156489887957177108361583868162203 | 864 |
UVM_ERROR @ 920104020 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 920104020 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 77252093612409617618031037007571989853114207589702995063393656563309976420347 | 330 |
UVM_ERROR @ 38351879 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 38351879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 109645347644105508384818798822248726213784547220029972372594761177043665667485 | 466 |
UVM_ERROR @ 199175182 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 199175182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 105905579335682607572647098891986664523333155296154174201889969914278686427683 | 1640 |
UVM_ERROR @ 855437244 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 855437244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 8369127969760261777548246886247808426521905315946574236435720139565396246446 | 402 |
UVM_ERROR @ 679332847 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 679332847 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 87784913503192858338812161687731071601674015720731969508506593181201625059179 | 1122 |
UVM_ERROR @ 91427380 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 91427380 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 40367529670767684618774962347010246869752312712827436954535244261781454003919 | 2302 |
UVM_ERROR @ 68851676 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 68851676 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 790170049246079133326972306209214636043088458690377697324760540731122547634 | 242 |
UVM_ERROR @ 141144448 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 141144448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 855523793160811909466331303903924174934041601511651741921342644281670927976 | 1172 |
UVM_ERROR @ 1197936758 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 1197936758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 115127753593611251626473621996663015047841751726094751919570287905738534430610 | 256 |
UVM_ERROR @ 84644340 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 84644340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 43991668279140385219138308019520973505454671471267091405284383021509076823834 | 264 |
UVM_ERROR @ 138104951 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 138104951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 34554704108912642129655685281458087394306491123422375793620265742633215801306 | 1698 |
UVM_ERROR @ 233837593 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 233837593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 100937884279140585250191740781975205525032636182057584584765812611701848307180 | 2160 |
UVM_ERROR @ 260128079 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 260128079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:958) [scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (* [*] vs * [*]) reg name: status, compare_mask * | ||||
| otp_ctrl_background_chks | 91017383615036947450181535611837349515282140986592782044119648959240259985586 | 19852 |
UVM_ERROR @ 2894925608 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 2894925608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 105408302824005307361637663249022121830713526050618375901938279719885220793396 | 11050 |
UVM_ERROR @ 445931342 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 445931342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 8115011909755849907608351993392385891455205912548471038824742549129390715286 | 4619 |
UVM_ERROR @ 965347578 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 965347578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 114166149910872456883014371819207485593633178930384043424715193465337085064706 | 7494 |
UVM_ERROR @ 289914895 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 289914895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 3758384938820220515552967079284743220672593683361469245314350410872163553711 | 7238 |
UVM_ERROR @ 1452939501 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1452939501 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 2337011727458484743833932490166668404077871080766671388693057035588496356512 | 10628 |
UVM_ERROR @ 4638837230 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 4638837230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 30345769567856030994082353321707264444400412871988693610104647135148593976353 | 14897 |
UVM_ERROR @ 1395692736 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1395692736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 10595741304589875770269478531914936633733779613168352749429430742273381437537 | 4480 |
UVM_ERROR @ 2213357774 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 2213357774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 106215411524586747292574930879702979501021896966881756584817657022962350340281 | 3901 |
UVM_ERROR @ 175681392 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 175681392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 65521773688080035531659135346051496108782036100290423393547504675320648886580 | 2968 |
UVM_ERROR @ 312113274 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (262 [0x106] vs 260 [0x104]) reg name: status, compare_mask 4
UVM_INFO @ 312113274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 89293648842324999049741308227705757683622244980329714783524093968596087070802 | 17628 |
UVM_ERROR @ 1355416159 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1355416159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 61980538797274196989763036173381474541493182499641966470672732878928464645180 | 4900 |
UVM_ERROR @ 1568575122 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (259 [0x103] vs 257 [0x101]) reg name: status, compare_mask 0
UVM_INFO @ 1568575122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 14775331094389769486824532161284170197944974642013398243298384525185859488823 | 7567 |
UVM_ERROR @ 3466763331 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 3466763331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 33638994359136279352598612401507408193195316459614727392063310455886970960753 | 8255 |
UVM_ERROR @ 228852632 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 228852632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 16575344680473760472832145486017197079247538965707630537007932290155890595401 | 11928 |
UVM_ERROR @ 1286769379 ps: (otp_ctrl_scoreboard.sv:958) [uvm_test_top.env.scoreboard] Check failed (csr.get_mirrored_value() | status_mask) == (item.d_data | status_mask) (263 [0x107] vs 261 [0x105]) reg name: status, compare_mask 4
UVM_INFO @ 1286769379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_* | ||||
| otp_ctrl_check_fail | 88123262269339803154237411191608103622630178894533730257971026972979242794568 | 4646 |
UVM_ERROR @ 1737553177 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2982931972 [0xb1cbee04] vs 2982932100 [0xb1cbee84]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1737553177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 10533747800376835804246316098274311869644356119131491372787808074826747487237 | 9483 |
UVM_ERROR @ 3706180651 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4098 [0x1002]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3706180651 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 82223541760989756060966299224225541569149985606241212049638137519508607923129 | 935 |
UVM_ERROR @ 1234454972 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1234454972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 17540529046337442706186012733716298950346338794217078626069108858195099750243 | 1713 |
UVM_ERROR @ 432826781 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3383305891 [0xc9a926a3] vs 3417042659 [0xcbabeee3]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 432826781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 110068780800902219700380793812669192635018097707756183254263662769100495141538 | 23211 |
UVM_ERROR @ 512151638 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 512151638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 106634637316035474028516979141086057272744277032782436923741578610728987967174 | 247 |
UVM_ERROR @ 89761239 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3887327167 [0xe7b3e7bf] vs 3887294399 [0xe7b367bf]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 89761239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 72534623934678738070753427893153352244108844796952050322559486363312619140591 | 3475 |
UVM_ERROR @ 145866482 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 3657015159 [0xd9f99f77]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 145866482 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 40335498699325652611040572227904917888631355549856070326607039442977465594808 | 9641 |
UVM_ERROR @ 5785690132 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1284081155 [0x4c898603] vs 1284081159 [0x4c898607]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 5785690132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 74232447520538625479402648434931966429453895402414680606936065383666698328219 | 107 |
UVM_ERROR @ 196353226 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1536 [0x600]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 196353226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 21415088749925123710636694532676822883922630173446679550459629928277213265988 | 4562 |
UVM_ERROR @ 7857738067 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 7857738067 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 58189500307410357587572366942363831292811899966980015175286528604820600719816 | 8377 |
UVM_ERROR @ 489792834 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 489792834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 12339259814670093061302328157727961576503302138696938467823287296515828307595 | 6077 |
UVM_ERROR @ 254650978 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (79646791 [0x4bf5047] vs 4294966527 [0xfffffcff]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 254650978 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 54225172043218133520155207561698706409998321014397478906624118145288924779840 | 4459 |
UVM_ERROR @ 1697972172 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1697972172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 6397936654659038792289268596804923524206348582218584385980923924292517706367 | 9784 |
UVM_ERROR @ 1700716339 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3427467070 [0xcc4aff3e] vs 3427446590 [0xcc4aaf3e]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1700716339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 78405920526819441211667693333111347127800392949056437696596584781415332670807 | 8164 |
UVM_ERROR @ 10224199625 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1702525610 [0x657a7aaa] vs 1702525626 [0x657a7aba]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 10224199625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 22790403302030407606439834093754659802076074733623080121418051021752315248711 | 6043 |
UVM_ERROR @ 3107310071 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8704 [0x2200]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3107310071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 55136420001509905124111680861876864053467163401406016841393511519133306904242 | 3364 |
UVM_ERROR @ 391571922 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3116446504 [0xb9c13328] vs 3116446248 [0xb9c13228]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 391571922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 83188373719635112302430534510050333615083791773434800550527873790415883658261 | 3429 |
UVM_ERROR @ 1859226180 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1859226180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 23391932924817262085066136038710982163372531140457350432163540507618630696654 | 8970 |
UVM_ERROR @ 1752229041 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1752229041 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 47885385785623834066590684921757667202167813771906280403091112039372998750684 | 3579 |
UVM_ERROR @ 4248407474 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (996774830 [0x3b6993ae] vs 996774318 [0x3b6991ae]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 4248407474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 9583898634551054585291410669848810395641734853857335091143326540592617521191 | 6289 |
UVM_ERROR @ 413140204 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 18 [0x12]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 413140204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 27829432241050318734116401697917007350175377188595537538393770123304014744214 | 161 |
UVM_ERROR @ 1066224715 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1066224715 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 3698880742864570914026648774776243294472191748222046434066724016692040052228 | 6503 |
UVM_ERROR @ 744293489 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3058851405 [0xb6525e4d] vs 3058851397 [0xb6525e45]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 744293489 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 73062270020990386032131543869374335948014426553300280891885271305860512195114 | 8993 |
UVM_ERROR @ 2279647873 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 16384 [0x4000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2279647873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 72421971767643229587132681412487890832412867054105161920618351562693331403708 | 10816 |
UVM_ERROR @ 3580339484 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4224 [0x1080]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 3580339484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 79567379056466571377702458251775071199398888039060876156876016962441472079569 | 4304 |
UVM_ERROR @ 139225638 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 139225638 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 110401514067343527439168147353766082152388331153703220128471233443099354993100 | 1335 |
UVM_ERROR @ 223212718 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 512 [0x200]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 223212718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 25160596944663456078927961074763268069580202858202662594747575171417763978730 | 5954 |
UVM_ERROR @ 1439376754 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (851130698 [0x32bb394a] vs 851130826 [0x32bb39ca]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1439376754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 2464718908055062250691364361167743388415162514992197591068132388627994198586 | 6336 |
UVM_ERROR @ 991515659 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 991515659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 111440758490247882031222328691457263786177412131957057185905866872379335964341 | 1187 |
UVM_ERROR @ 74604172 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 74604172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 37125438172930689423986912851190437120676262080506952118636277513641513919273 | 13941 |
UVM_ERROR @ 1074959507 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 17408 [0x4400]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1074959507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 93322809836181591292224252306612578670619413580832833890998491875626882126268 | 10593 |
UVM_ERROR @ 6549074929 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 6549074929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 101416912996530690063705673099989419015113501049563590949754900531459847098130 | 1638 |
UVM_ERROR @ 2684062637 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 128 [0x80]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2684062637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 61406443454793337667979854414570812579961999649187996076189193127713033089353 | 11092 |
UVM_ERROR @ 414867922 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 414867922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 8559201913002159739833499851335760898770889909534151760580043751710882400882 | 257 |
UVM_ERROR @ 606867902 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2244159561 [0x85c32849] vs 2244151369 [0x85c30849]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 606867902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 1284909745174042845655930739921004215176562132397508579865313867976127534097 | 2294 |
UVM_ERROR @ 2269141459 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4176571653 [0xf8f16d05] vs 4176572165 [0xf8f16f05]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2269141459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 107891963122478558517082721850722733029566026874223708032239875792141040729439 | 6512 |
UVM_ERROR @ 6525327883 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3336889935 [0xc6e4e64f] vs 3336881743 [0xc6e4c64f]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 6525327883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 16091819851495433448670240940146325689036116837128035657600575066413343890111 | 6549 |
UVM_ERROR @ 1770573190 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 66 [0x42]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1770573190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 86237131968505016183028112273289900328180388537754301053888450927915898258724 | 28389 |
UVM_ERROR @ 33265549337 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 32770 [0x8002]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 33265549337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 89696726433505389565261481339122208760437069035964251146511471055360042489302 | 4820 |
UVM_ERROR @ 990524995 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3670165045 [0xdac24635] vs 3670165053 [0xdac2463d]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 990524995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 77494214936908327752914158234981193251730516751617450039171827764244225315944 | 691 |
UVM_ERROR @ 281320466 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2048 [0x800]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 281320466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 68203862890049254326309602652686835175059796336160938072708462774239449117567 | 7938 |
UVM_ERROR @ 534053246 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2 [0x2]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 534053246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 53939136382548020310289529084336529189577692516705939463346859728824053769940 | 2893 |
UVM_ERROR @ 370627311 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (301449028 [0x11f7bf44] vs 301449024 [0x11f7bf40]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 370627311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 110596617597655966140147700699615481504816313907639530552881783796795207045607 | 27936 |
UVM_ERROR @ 1750804645 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 12 [0xc]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1750804645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 110733940860066513334153339616686700755403726505753205656399040288884419181806 | 16111 |
UVM_ERROR @ 1121614319 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8192 [0x2000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1121614319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 113327990995323059185177844362823250369881171691144815048538568417885303940540 | 14431 |
UVM_ERROR @ 1608917675 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 4 [0x4]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 1608917675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 10752970501507043083038255681126456292130196672152581091072684810210810138116 | 8914 |
UVM_ERROR @ 552848080 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8192 [0x2000]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 552848080 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 64902840499843193775610445572238007011990408363561237049918431369635184672381 | 1547 |
UVM_ERROR @ 73966143 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1968003477 [0x754d5995] vs 1968003485 [0x754d599d]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 73966143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 10631963157931058085404145914659823018955721358325003901681505217690955416543 | 1289 |
UVM_ERROR @ 105140419 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3353900473 [0xc7e875b9] vs 3353884089 [0xc7e835b9]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 105140419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 30049087395245860454016721308128735017441074316524046145295316852616136729597 | 5755 |
UVM_ERROR @ 493105643 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1362693022 [0x51390b9e] vs 1362692894 [0x51390b1e]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 493105643 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 41046306717959338726670972967603715575462423396261538374458526849891496343320 | 1875 |
UVM_ERROR @ 2455944755 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (300004830 [0x11e1b5de] vs 1373878271 [0x51e3b7ff]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2455944755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 48701447586282105495175219533796732452190198887584213544880396304580789433340 | 18237 |
UVM_ERROR @ 4967589157 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3242370241 [0xc142a4c1] vs 3242370243 [0xc142a4c3]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 4967589157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 88173810103614044765676070583196808261935931866481509624947292840473785280780 | 5069 |
UVM_ERROR @ 2628575717 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (91358158 [0x57203ce] vs 91374030 [0x57241ce]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 2628575717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 67050384663200244024484690696475951114688488921649517673693151834979560170721 | 19856 |
UVM_ERROR @ 7728887558 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 256 [0x100]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_0
UVM_INFO @ 7728887558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* | ||||
| otp_ctrl_parallel_key_req | 35757926719861668171535783512571267830870988201992605684216908206221024807757 | 6996 |
UVM_ERROR @ 145117622 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 145117622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 371695256952718176003352903759319447145683233798050407023681516663007917269 | 721 |
UVM_ERROR @ 1717691869 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1717691869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 23157077940892743782213004697191791822231517454339720212497704667673456537577 | 2023 |
UVM_ERROR @ 326791547 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 326791547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 26325902309912954085576184501559247156708103620459310535974544558013316396936 | 12424 |
UVM_ERROR @ 840983522 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 840983522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 77021915476886961537897777344801574118495725650773304063572461728328177749982 | 11391 |
UVM_ERROR @ 742047414 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 742047414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 80146822851147355441176955213755294796917291844251953269539044742637087585059 | 3565 |
UVM_ERROR @ 324170992 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 324170992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 81041260599519143169741368843369773246038275393128582963538520527656298498863 | 869 |
UVM_ERROR @ 159770098 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 159770098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 42640654094405477824198625840017933192916449500691989451301792557497596863782 | 239 |
UVM_ERROR @ 2107602043 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2107602043 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 22021841657347230754226018062209483516134643369962242787648159420836448276245 | 9991 |
UVM_ERROR @ 928729040 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 928729040 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 22163916136325332581853834504242442790329061423400532425452717943224761593838 | 30151 |
UVM_ERROR @ 3967580901 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3967580901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 34165057406747781953905143046987117935541388348602922866382515028759438497469 | 777 |
UVM_ERROR @ 99890037 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 99890037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 52163911559455833436667227560304452333014101309254320470193594153689093064217 | 1355 |
UVM_ERROR @ 112410792 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 112410792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 101915770072452973065439661706843021842677459510912580874559041698304942888106 | 8616 |
UVM_ERROR @ 711547469 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 711547469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 3572361687270952095334978570764548186151990308778120376329214092741503960891 | 11345 |
UVM_ERROR @ 1575586573 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1575586573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 70383851851676691620074022417155629750789209758360007816161818135623778031341 | 2303 |
UVM_ERROR @ 224118786 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 224118786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 61826318285419796345816945128089860324228316996594621901203522944010642128784 | 427 |
UVM_ERROR @ 244858037 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 244858037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 8113426034847777383993614556507231424821349173780448812260624763169089043874 | 16113 |
UVM_ERROR @ 905283541 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 905283541 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 47907548879580750921324570327715483231445577601308700520961615705958724039082 | 5946 |
UVM_ERROR @ 1074148383 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1074148383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 49227451114465308412639570057232791628099663739162304710619579052610934315009 | 4203 |
UVM_ERROR @ 516321935 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 516321935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 14327132877295656977858656973176630081562637896804492591134264577228186102236 | 1429 |
UVM_ERROR @ 174309608 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 174309608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 94624229019593096145448392456625432133587478582003839909502177988567255121553 | 4640 |
UVM_ERROR @ 740860979 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 740860979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 2036400323935474462325628122016921209217703054886026776205568859101435652934 | 1181 |
UVM_ERROR @ 218088483 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 218088483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 65609469849148410055337684298907523002549721168888667936203274941742072164784 | 38344 |
UVM_ERROR @ 2670465987 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2670465987 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 37350411839599715795586721169214603865162360856093895815409888642118430158261 | 6058 |
UVM_ERROR @ 6784387701 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 6784387701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 103197947380777341003977572491324461646085044022392406274069290967325462798946 | 10150 |
UVM_ERROR @ 3109485360 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3109485360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 115044851928108017331767555649445162492279634188570559617416386432914268933548 | 37324 |
UVM_ERROR @ 2672909066 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 2672909066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 84598036805414545693544035455085385771072467079239358335120749631943391251581 | 1719 |
UVM_ERROR @ 146238450 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 146238450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 73180565930159046506752819459305940357529433028604582989149886973962635214521 | 12961 |
UVM_ERROR @ 1007769062 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1007769062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 72253742406557307487693758798526139948590362968640199030620522963163571331954 | 33434 |
UVM_ERROR @ 628527467 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 628527467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 86729021158914791807201306859471143206001226288515411362043941677052118453619 | 15181 |
UVM_ERROR @ 4629003668 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4629003668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 62396311994424249646543526170168184011675065452486069773638099109918531882162 | 2933 |
UVM_ERROR @ 177569767 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 177569767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 55462096311577961085204352415052140448686846479568745980513048742983940926537 | 2973 |
UVM_ERROR @ 67497279 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 67497279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 91307711267836624972823898874692702539191842821528442110625898586544123526470 | 799 |
UVM_ERROR @ 115727703 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 115727703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 8154216210376871922718435364564181447190548075311142859561112968514812788474 | 3945 |
UVM_ERROR @ 4560601139 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4560601139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 10484957749481000257710772445348251681452968999836175566992297343064190957318 | 17009 |
UVM_ERROR @ 4875150783 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4875150783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 81778319656750843623393296696425675882258628052924997147359091796871410530467 | 9846 |
UVM_ERROR @ 12167713913 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 12167713913 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 31631416617944154470572034152827096050591138971938444674573177149169640829282 | 5405 |
UVM_ERROR @ 833282525 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 833282525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 16158727447430355169190028618358763344000181372225780298018887444952732958365 | 457 |
UVM_ERROR @ 1376498120 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1376498120 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 71576215178907518707291856740676135478418761358456246610857739092981037140473 | 1698 |
UVM_ERROR @ 1764020700 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1764020700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 17961405429525083598063538704727357529901966300062394749617079681204906833718 | 14413 |
UVM_ERROR @ 1238595092 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1238595092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 46723624285785294482559394124759251187679814700559000107468496468996486578424 | 159 |
UVM_ERROR @ 77586123 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 77586123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 23006056802685939363079447316865738473868806352685353436325917197285008279220 | 1471 |
UVM_ERROR @ 1587678813 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1587678813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 27300964340944008631066200460183654906638845815192753772184947049341242453662 | 4357 |
UVM_ERROR @ 1598261852 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1598261852 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 78473863053987794432440190410155045597842626659617887512716254660222874859017 | 855 |
UVM_ERROR @ 1149959189 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1149959189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 30903455615433020794630704619723984922381816148537408139359044015295145631949 | 863 |
UVM_ERROR @ 591168642 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 591168642 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 78212356338631447720281897697582966668531144382283577545065535784694900318935 | 3459 |
UVM_ERROR @ 1318792217 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1318792217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 68275157314609576505349842387353710219865810764385496963953663910722740137831 | 581 |
UVM_ERROR @ 114446962 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 114446962 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 53615128805610709301658348716632072606343467187225413852125790031355355825329 | 635 |
UVM_ERROR @ 43449864 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 43449864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 34126887377997043723712946134306281923239637382968688967551850501911676875411 | 12347 |
UVM_ERROR @ 806352379 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 806352379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 37733979441203801283139858780075963804672770350539005193383955214756854951089 | 160 |
UVM_ERROR @ 99440434 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 99440434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 5042971018633414702952628957268058218388468822328528226789031026454890983683 | 1405 |
UVM_ERROR @ 101000142 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 101000142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 106502290418147490620824500347873418062459540916409578533437870858143403247172 | 3903 |
UVM_ERROR @ 248038812 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 248038812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 77834818928316770503561244889233130343422576750083015392700140029132568145736 | 19360 |
UVM_ERROR @ 466626678 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 466626678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 26903170358530469641749073269373468768233228765118249473432509745460621140398 | 817 |
UVM_ERROR @ 55853748 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 55853748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 109492342517018198300170311454811553848947081694962489579862911234806598416046 | 4572 |
UVM_ERROR @ 343210517 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 343210517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 14456315821030799527635465949929020875896587712507794591067329980409605107467 | 580 |
UVM_ERROR @ 89906308 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 89906308 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 89734606172762127569136845066234484974960289363552219900638789365049120686211 | 1116 |
UVM_ERROR @ 1629507273 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1629507273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 75827246001817513466228983392623816584741880866307554725804590817044222534540 | 4035 |
UVM_ERROR @ 189773559 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 189773559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 50294321876095394726285620156701885364549957799534899662703329866532861027581 | 13585 |
UVM_ERROR @ 4808134612 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4808134612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 18824166661591174446943369880020029616855858197275510449014277111870052671834 | 3375 |
UVM_ERROR @ 209000615 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 209000615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 41780689289691304403413322371215920277535844736636493677386875042562164312970 | 3205 |
UVM_ERROR @ 74565359 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 74565359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 88297056670024320291134447354657200990739855341551524696438540304858106007488 | 8622 |
UVM_ERROR @ 3039814887 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3039814887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 102001132939721542343885202178551481272985607046420675708784073579545764882911 | 161 |
UVM_ERROR @ 156812578 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 156812578 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 35215949855788967122639673591587282185108397015949829000956189258091071733805 | 3205 |
UVM_ERROR @ 299986161 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 299986161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 76504182496602667616192334092485731455828211450562754526733500136407930599094 | 34338 |
UVM_ERROR @ 4418805211 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4418805211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 10291545318007927246288409716580219728703989097318602595837595998035897786375 | 705 |
UVM_ERROR @ 1318268032 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1318268032 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 102843847335129116291868225964275977425224177901393723783309489895108537627538 | 9381 |
UVM_ERROR @ 596411314 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 596411314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 46174954344748840649151772015748857300645516178012402502414962528317601224757 | 715 |
UVM_ERROR @ 66969731 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 66969731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 282129336219733883823253032273338328463213462613529427506554985777416910038 | 9325 |
UVM_ERROR @ 434932251 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 434932251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 99767201781606880463025148355162975436489903857010766596370340089680352492077 | 349 |
UVM_ERROR @ 166849037 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 166849037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 82964169816089091832581599801415159657968077868228481261123007719329945308495 | 2651 |
UVM_ERROR @ 58080177 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 58080177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 40151389489386198771394414418064915048564553818789358093322850180739846064260 | 1999 |
UVM_ERROR @ 171797928 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 171797928 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 3551530846570432027452897639946253891551627405102834296793362631119643662634 | 3143 |
UVM_ERROR @ 565322315 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 565322315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 93876686175833337442972298822485512038804447607776690143663981302860974858233 | 3327 |
UVM_ERROR @ 115987233 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 115987233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 31261765196968269811895459497561321892959445443103550484894985769867304545333 | 1157 |
UVM_ERROR @ 179689808 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 179689808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 27613053817855577518623584747385084759549431759061845441292168400861428723485 | 1101 |
UVM_ERROR @ 363528666 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 363528666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 109304113906028317706368893033619415606967769525189888611600995564632688664574 | 7202 |
UVM_ERROR @ 7959286742 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 7959286742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 86827193178742661577897418925460792409877627300348989216837878933164599405893 | 1241 |
UVM_ERROR @ 74181475 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 74181475 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 108448997117258181892838857073569782186332327073464859418485632993076203753909 | 7600 |
UVM_ERROR @ 375901932 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 375901932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 1809421597643490182045226105160895913756119950738070398868606851475677854513 | 6105 |
UVM_ERROR @ 766583007 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 766583007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 71894298892272076775121662082901629302005799721983338284282669127709052350481 | 5748 |
UVM_ERROR @ 363656073 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 363656073 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 109955650895559727668876377909184057060765562962496891283618942925747408679354 | 223 |
UVM_ERROR @ 462503461 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 462503461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 56976235129200188546064091442031461198433610275977751337809242382061623077027 | 3933 |
UVM_ERROR @ 195249046 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 195249046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 107939545111316542797459658215626095988623434141432334745288219896568274051278 | 5424 |
UVM_ERROR @ 817569225 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 817569225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 106869617668490798741201205031131551905291325140356582796923257789051195840187 | 8807 |
UVM_ERROR @ 1834730894 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1834730894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 93321309350096256843745627673970888689477553616217654069615622708024551101171 | 343 |
UVM_ERROR @ 102253450 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 102253450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 112307577093714675999211120458088194756550450326429504743695386575450662174178 | 157 |
UVM_ERROR @ 144039985 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 144039985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 51618855644020314964442617670817286150514889686275304094437931601368930536715 | 6858 |
UVM_ERROR @ 740645844 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 740645844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 25787526476312437694747132281356013630874802450584360744118043791948272538931 | 5669 |
UVM_ERROR @ 667140686 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 667140686 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 82289668552015925724468791354907558730832704995668229703716314210157610022910 | 1532 |
UVM_ERROR @ 246406914 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 246406914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 95229351794442208610344375041106147485263335832171326041880749266510510375608 | 6970 |
UVM_ERROR @ 343163547 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 343163547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 12685113864229269731529901826631314337702332460825293710064773644522131489882 | 4422 |
UVM_ERROR @ 4181385322 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 4181385322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 87897464063858962398327293822223742113412811295597772828359214995032288850913 | 8938 |
UVM_ERROR @ 9533464782 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 9533464782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 34893765530941361965939653499712404012996493769970664929794543676133376394810 | 4019 |
UVM_ERROR @ 297911239 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 297911239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 5409697573403695213487263432831985290908411072042206917931713631093795850504 | 1113 |
UVM_ERROR @ 225940197 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 225940197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 5519884323869709816202634001596888036930385045096035253605445373885208651116 | 341 |
UVM_ERROR @ 69404533 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 69404533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 64578122487320815709615208260224822006073552546321276787540376270133053786406 | 3543 |
UVM_ERROR @ 356235526 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 356235526 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 68788990941506886836649716198656398710945790224182143900326968782919410455292 | 10740 |
UVM_ERROR @ 731495202 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 731495202 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 7395692194255256302442145242306211602687312921412657296357786409369942282530 | 159 |
UVM_ERROR @ 52585879 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 52585879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 15052734181960995041525144545292317491956366869275293282652640972649221544026 | 2193 |
UVM_ERROR @ 367931107 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 367931107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 35036510739737180349810322996601426798354102633556767005373284350220765805417 | 4275 |
UVM_ERROR @ 153758782 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 153758782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 101922077424896684176179482589083768584618067321328915461735051841087442756914 | 1803 |
UVM_ERROR @ 924649558 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 924649558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 58860805709412293551149385567707801432889352754188113498918092869321028332283 | 6620 |
UVM_ERROR @ 326339287 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 326339287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 14598451785332126840774364178829003939120492764944696551750498429003652783929 | 1060 |
UVM_ERROR @ 436475251 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 436475251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 100692189365162718353120346618720283574580438329812822792419183356906554779379 | 743 |
UVM_ERROR @ 86172050 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 86172050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 93366248780663741208781484826692460002521353689951247966790770234387253409380 | 3185 |
UVM_ERROR @ 258940639 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 258940639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 65287169815522903534141462618690171571683696571428330781499059391153093293068 | 5433 |
UVM_ERROR @ 664054176 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 664054176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 68327123713559783733817037872736094901192500695012552174455825969819042397342 | 2215 |
UVM_ERROR @ 66286873 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 66286873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 23320243582484039822050750565279851597355436245893270950895917204414567669798 | 10608 |
UVM_ERROR @ 1942263353 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (5 [0x5] vs 0 [0x0]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1942263353 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 14850762092172419056472959681868154094266226326431010025756023394432506113455 | 3011 |
UVM_ERROR @ 3423040538 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 3423040538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 86452616559179708327505817827294728860514351062911169541441534916717386959503 | 623 |
UVM_ERROR @ 70910422 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 70910422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 58006651247100163153687514568366995886715972671852565766337348041964794814599 | 1339 |
UVM_ERROR @ 272783399 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 272783399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 56980204382921184569000593994530973771900069432422204036055744008539034856598 | 157 |
UVM_ERROR @ 563083211 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 563083211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 58753259636800161360070674175014606907266190624101105914614632163653649576643 | 2351 |
UVM_ERROR @ 218841025 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 218841025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 113183757520253706609472245049988028831318242872238467851129477894171233276003 | 271 |
UVM_ERROR @ 894769836 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 894769836 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 57795315335733343058951058772571494960337666987313655918679664429653365303430 | 465 |
UVM_ERROR @ 90092479 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 90092479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 25004512502977133345627850786757633249637515515790739181493287970494356268701 | 6301 |
UVM_ERROR @ 158711809 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 158711809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 7277933521075381482341410927818753364242152635256045194412738904952189963673 | 511 |
UVM_ERROR @ 60289472 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 60289472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 9783246566626666723773338802033541093211789661147102063998287670360678309168 | 4223 |
UVM_ERROR @ 106190771 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 106190771 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 98224570539978699888916608057720903175834377824342079048563904257686537711027 | 2471 |
UVM_ERROR @ 112553269 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 112553269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 79120459188113988912407475657676131137740541360244443716476654847841786993018 | 1583 |
UVM_ERROR @ 87626785 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 87626785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 28690353595336366205044419738612414772603455838529343289955391017863820437119 | 1779 |
UVM_ERROR @ 553554077 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 553554077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 34682089028188928179718483224070215486798763469249132499904523620372285783926 | 1065 |
UVM_ERROR @ 1274939543 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1274939543 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 105464753029721139793627214576485509833087655016276186399680198947986875878635 | 1089 |
UVM_ERROR @ 286081325 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 286081325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_esc | 42841693467812304364826534941348748890893843069075324551867071331683196928006 | 967 |
UVM_ERROR @ 83010396 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 83010396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr | ||||
| otp_ctrl_stress_all | 9124773596820955711995697893112868058604424879220442391296550175731659063694 | 5197 |
UVM_ERROR @ 556448716 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 556448716 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 29546766693792629681258379578668322549029061789746634854486964970427193782562 | 16965 |
UVM_ERROR @ 2297616110 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2297616110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 94730549808953801356687957541534037434444936934797156770188830988827180073910 | 16547 |
UVM_ERROR @ 1102965718 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1102965718 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 110546937158131895568577514115030672802569649153584480904535317644893636080745 | 11067 |
UVM_ERROR @ 630143269 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 630143269 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 82085456444247254731134167705674439921640472524361277915422272702605482252290 | 79876 |
UVM_ERROR @ 1462955033 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1462955033 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 56952217776954732634925498669658607879989769451602852865891321051535459282618 | 9733 |
UVM_ERROR @ 1008880857 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1008880857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_background_chks | 3667063883133888563107941018262897632561917948192139032664224114989976244351 | 5986 |
UVM_ERROR @ 665314222 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 665314222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 24474223239053294612775647371549256740666514425231192448384240262114715140506 | 25972 |
UVM_ERROR @ 2753136990 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2753136990 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 68447303364847693638953181251823401536278186351990322448927518203799382460467 | 12104 |
UVM_ERROR @ 297511017 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 297511017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 32189743319627612210449713078493942161391691561782684577008222058754331648815 | 3214 |
UVM_ERROR @ 480831954 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 480831954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 59948031483973104739863394782286968824610168421067974320522202286140023019524 | 36389 |
UVM_ERROR @ 17263643126 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 17263643126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 111162000675481582081157369126269912274797782098751408490210107687585280427871 | 7916 |
UVM_ERROR @ 10599245236 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 10599245236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 60517584084750864430199380390650564668430333457559248704627153015013534016452 | 34610 |
UVM_ERROR @ 8529307683 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 8529307683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 50264371716566080844457341705677346343262075922662278972059879186486084039973 | 24858 |
UVM_ERROR @ 559655590 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 559655590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 113485653626664797895742543034761667310276017989389075635802900947935150388617 | 6232 |
UVM_ERROR @ 887826685 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 887826685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 39115769618242645396696538760584438842463238000552290323056700189068637058875 | 12728 |
UVM_ERROR @ 2166034046 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2166034046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 32543311958508512106402590055650390588277911133413833964120243543614496076602 | 24403 |
UVM_ERROR @ 676129110 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 676129110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 19301158324021937426451432512662906577455946165695058306100003088278539625848 | 10439 |
UVM_ERROR @ 4785779655 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 4785779655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 63272841829002421463187466566096913274683929268854171974607550082308696300719 | 11479 |
UVM_ERROR @ 4614533419 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 4614533419 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 15971967752949875181154989069696920672708104164357410896076693879968515324668 | 8510 |
UVM_ERROR @ 2279134320 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2279134320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 20373825352097103012768815556722785947346101878422745970396333986815913502990 | 1901 |
UVM_ERROR @ 1204109565 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1204109565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 110531430422442730545915231243627168509358325969751065610690935562543256320276 | 4218 |
UVM_ERROR @ 534399895 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 534399895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 17416612363855961596970514303235520849683745815903706247118491728917115741185 | 2980 |
UVM_ERROR @ 2630334065 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2630334065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 34666589192416481677811853791277530285428506474973415394755945638052829349521 | 7466 |
UVM_ERROR @ 3065369681 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 3065369681 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 22119443054847893947244980860460117150013917717826202106541450890882324752543 | 17857 |
UVM_ERROR @ 1748482395 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1748482395 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 40157043011923544996912605233335162725621957182174794842748683774276991162007 | 2720 |
UVM_ERROR @ 386258142 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 386258142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 48620838014715805769760615208876276081455123860961543251007771343146274217203 | 15064 |
UVM_ERROR @ 423695364 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 423695364 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 109427101543203088850514794731945151874714610131499360528550774756428025695013 | 6246 |
UVM_ERROR @ 433345324 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 433345324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 5735755715088635079733690410704218418416102622439801623190364267222596957554 | 5393 |
UVM_ERROR @ 599108544 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 599108544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 8911708430846939054900821054054802247850158219895740654389767212842205869609 | 69439 |
UVM_ERROR @ 5022252320 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 5022252320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 66478959812058086035681328318881342604612705635035409134410055520362050406221 | 13735 |
UVM_ERROR @ 1551451655 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1551451655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 99697732505623372400613324139394319169042251949204772292009175780993295562326 | 11794 |
UVM_ERROR @ 3354343591 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 3354343591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 13557974920644317190556848252098134839091926890847053933454166156350704826337 | 7934 |
UVM_ERROR @ 2374234889 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 2374234889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 57894289733993453009314402416077517050650294680669398826141052398098531387617 | 5750 |
UVM_ERROR @ 1152819017 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1152819017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 69233943917420188994977046260557654603855777799699063571362882715479257651099 | 8802 |
UVM_ERROR @ 207638850 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 207638850 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 30607298597717286100086258300023669091059428997560626365129226748550844096316 | 24375 |
UVM_ERROR @ 12841563394 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 12841563394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 30318061986595680409919439058313771164613714304513577876610929104358950595969 | 66931 |
UVM_ERROR @ 17376043034 ps: (otp_ctrl_scoreboard.sv:671) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 17376043034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1308) [otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger! | ||||
| otp_ctrl_background_chks | 50924164385235725130945542351929883863987281490092746573201341536625710604734 | 5278 |
UVM_ERROR @ 664332237 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 664332237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 16110882149711057864140458820201133520098064321473287302659703077018293547109 | 7078 |
UVM_ERROR @ 12486470873 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 12486470873 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 36632107590093012373557544649833858052711641808048548825734326851374266343870 | 5604 |
UVM_ERROR @ 426541074 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_background_chks_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 426541074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state | ||||
| otp_ctrl_background_chks | 112202570521894733921121290461807521553277158535636143141051345274637355359098 | 6855 |
UVM_ERROR @ 272571613 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 272571613 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 98309207443185291768824922504417157283535439935578055501920746904685290538072 | 7286 |
UVM_ERROR @ 1189992758 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1189992758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 51503184654696908764855146656660405977156427637061437866876780043306067020194 | 5914 |
UVM_ERROR @ 1447416161 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1447416161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 45594320649890602470482334362058049338709303399223400800454021006957160756522 | 3364 |
UVM_ERROR @ 459834026 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 459834026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 38619146524319898320295476646944747191850456835438728577797073940582884025856 | 14467 |
UVM_ERROR @ 18765708794 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 18765708794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 39050653393281233962864581972907105549941605136031306570597428512289809801526 | 12670 |
UVM_ERROR @ 1204375798 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1204375798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 32073906759230986506353278837066975399315835870131927272031112238441636246254 | 14612 |
UVM_ERROR @ 1187805023 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1187805023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_errs | 61839095367704724787101709460359338789636472306860533884030280349306069517115 | 4201 |
UVM_ERROR @ 295152005 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 295152005 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 98814956903893872996996066910949531411570347008392885708701709202149667977381 | 23212 |
UVM_ERROR @ 3268091453 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3268091453 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 97618402489263412938681336910512211163266100869625705258848554241569808389981 | 48216 |
UVM_ERROR @ 4308001240 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 4308001240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 109622652876750920121192473707135766029713626329701914207009643323304170830283 | 6338 |
UVM_ERROR @ 797231337 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 797231337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 83248059706473208390264141408833289043243212458431219673488332206004236285005 | 11367 |
UVM_ERROR @ 850612153 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 850612153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 31263424258263240786345775773125272365570047903481288113931571454751532096027 | 10901 |
UVM_ERROR @ 502780376 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 502780376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 89952921746587399735062349796312235445424438334438340110582671916924136939002 | 293 |
UVM_ERROR @ 282438740 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 282438740 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 112563632907523264463129017523424386605682191391901010648490375759736576784832 | 5835 |
UVM_ERROR @ 753543686 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 753543686 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 5736219509098776804296880953836579436321969867611712440303419777326929441734 | 15107 |
UVM_ERROR @ 6626753798 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 6626753798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 37920249264649430804348309922473757238810981188664261983179812814828399584089 | 6943 |
UVM_ERROR @ 389807006 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 389807006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 84528028906382248161240559441571987712391968073290671095564348044153741764219 | 16553 |
UVM_ERROR @ 733379778 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 733379778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 17268031023553397343980908159239561753720176268558816637895291828902047951749 | 9172 |
UVM_ERROR @ 1227916224 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1227916224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_check_fail | 50712943441173286166010676437249026235554091011444968397098056486401426968040 | 1759 |
UVM_ERROR @ 153436712 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 153436712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 112413315998430886756010430003300418079600040061844631149177403766130206848423 | 43381 |
UVM_ERROR @ 3828372386 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 3828372386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 4463790570640224288393298585682939084285637843164396871645688031514824933428 | 9138 |
UVM_ERROR @ 365153446 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 365153446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 56730820752531808314217190052186739450725589591547721081506916754588269987661 | 6511 |
UVM_ERROR @ 1583192353 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1583192353 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 26070465069816741487707201657236648681143230842157469387555181593495064853986 | 7547 |
UVM_ERROR @ 7299671651 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 7299671651 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_macro_errs | 95850022702350585463693790337389159865543809073660418865400069499899154074992 | 7019 |
UVM_ERROR @ 319816366 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 319816366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 5001112469979865303484710538578716105365279262498642030081870768369239936292 | 2615 |
UVM_ERROR @ 228651415 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 228651415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 50098277270476437073952481035491102630340121351922356638022840709477196720232 | 21863 |
UVM_ERROR @ 1901016127 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 1901016127 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 112329718363828327915789570430892376583589135786212182466336664837261812942275 | 2826 |
UVM_ERROR @ 934899191 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 934899191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_dai_lock | 29875256673157231657358782698191055615956232656005053559057202208047795991095 | 3358 |
UVM_ERROR @ 237768000 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 237768000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 72826556973428892628866348173384036622089404177993684528716817084507586322404 | 4763 |
UVM_ERROR @ 577454963 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 577454963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 71541788818815407680258446096099474882592794537615682031528143786792885331806 | 17340 |
UVM_ERROR @ 5826961758 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 5826961758 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_lc_req | 16485055983823107944400904888116277357722588262374072204987584964309993137411 | 4419 |
UVM_ERROR @ 241374615 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 241374615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_test_access | 66735115367113642881402996042403832504639549258024908032369377360405823441236 | 10067 |
UVM_ERROR @ 743208979 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 743208979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all_with_rand_reset | 84779220460071972368848106558553849126107562010170371528435723756658731702662 | 301 |
UVM_ERROR @ 80073562 ps: (otp_ctrl_scoreboard.sv:1320) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (2 [0x2] vs 3 [0x3]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 80073562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1308) [otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_check_error does not trigger! | ||||
| otp_ctrl_init_fail | 6472022286857161793024939644987243917486738753739080846992883517599083025941 | 3811 |
UVM_ERROR @ 1306463042 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1306463042 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 14891343662007383091469830971225313924192480460952904679543187725033043802142 | 1535 |
UVM_ERROR @ 278551523 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 278551523 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 111894692489655766485162398772079568248854758040007028125919123819216297761947 | 1859 |
UVM_ERROR @ 1879248960 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1879248960 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 67523780787025538833285924874677737898165057647650341651028097174606634162189 | 1645 |
UVM_ERROR @ 237684373 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 237684373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 8072260324610646104586213380487877924548104463484408530273759901278515019227 | 1737 |
UVM_ERROR @ 401559004 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 401559004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 85760017792726670358687474215920318375965444701064332521890973909254146825675 | 1539 |
UVM_ERROR @ 2112312825 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 2112312825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 8526603425450961186816449144688037008956415493805822023037698339749596346347 | 1473 |
UVM_ERROR @ 1690534832 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1690534832 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 101552687824462168070429041338451024097878315182075702811090361380236034932222 | 1673 |
UVM_ERROR @ 1997284199 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1997284199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 65623258594089833966191828514611294058027916688937823706608416722464476420897 | 2043 |
UVM_ERROR @ 1850147099 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1850147099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 67865174445609459734637430968283899276586781222967959837593106185293703110092 | 1285 |
UVM_ERROR @ 1792107370 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1792107370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 89523145043695331837289239309985390588511821742430178022646883209545065792205 | 1671 |
UVM_ERROR @ 1658484406 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1658484406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_init_fail | 85323907720108740017656074157521899320207663894774758471818444856317888653447 | 1577 |
UVM_ERROR @ 482380021 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 482380021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otp_ctrl_init_fail | 88716300683205898687470108030718484175859403682077276271150600241991090814796 | 1595 |
UVM_ERROR @ 1689952696 ps: (cip_base_vseq.sv:1308) [uvm_test_top.env.virtual_sequencer.otp_ctrl_init_fail_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_check_error does not trigger!
UVM_INFO @ 1689952696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (cip_base_scoreboard.sv:353) scoreboard [scoreboard] alert fatal_macro_error did not trigger max_delay:* | ||||
| otp_ctrl_macro_errs | 107673186633511163389944484460170800787487155747626301725500527175259414217220 | 19406 |
UVM_ERROR @ 3221853773 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 3221853773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otp_ctrl_dai_errs | 38210722681213864711555824856402107704612580468481497589755193583644467719133 | 1471 |
UVM_ERROR @ 1749076068 ps: (cip_base_scoreboard.sv:353) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_macro_error did not trigger max_delay:20
UVM_INFO @ 1749076068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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