| V1 |
|
100.00% |
| V2 |
|
99.92% |
| V2S |
|
95.84% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 1 | 1 | 100.00 | |||
| aes_wake_up | 4.000s | 194.443us | 1 | 1 | 100.00 | |
| smoke | 50 | 50 | 100.00 | |||
| aes_smoke | 6.000s | 159.478us | 50 | 50 | 100.00 | |
| csr_hw_reset | 5 | 5 | 100.00 | |||
| aes_csr_hw_reset | 3.000s | 68.034us | 5 | 5 | 100.00 | |
| csr_rw | 20 | 20 | 100.00 | |||
| aes_csr_rw | 3.000s | 71.836us | 20 | 20 | 100.00 | |
| csr_bit_bash | 5 | 5 | 100.00 | |||
| aes_csr_bit_bash | 8.000s | 872.501us | 5 | 5 | 100.00 | |
| csr_aliasing | 5 | 5 | 100.00 | |||
| aes_csr_aliasing | 4.000s | 278.575us | 5 | 5 | 100.00 | |
| csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 | |||
| aes_csr_mem_rw_with_rand_reset | 3.000s | 75.331us | 20 | 20 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 25 | 25 | 100.00 | |||
| aes_csr_rw | 3.000s | 71.836us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 4.000s | 278.575us | 5 | 5 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| algorithm | 150 | 150 | 100.00 | |||
| aes_smoke | 6.000s | 159.478us | 50 | 50 | 100.00 | |
| aes_config_error | 7.000s | 277.583us | 50 | 50 | 100.00 | |
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| key_length | 150 | 150 | 100.00 | |||
| aes_smoke | 6.000s | 159.478us | 50 | 50 | 100.00 | |
| aes_config_error | 7.000s | 277.583us | 50 | 50 | 100.00 | |
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| back2back | 100 | 100 | 100.00 | |||
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| aes_b2b | 59.000s | 964.583us | 50 | 50 | 100.00 | |
| backpressure | 50 | 50 | 100.00 | |||
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| multi_message | 200 | 200 | 100.00 | |||
| aes_smoke | 6.000s | 159.478us | 50 | 50 | 100.00 | |
| aes_config_error | 7.000s | 277.583us | 50 | 50 | 100.00 | |
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| aes_alert_reset | 9.000s | 488.754us | 50 | 50 | 100.00 | |
| failure_test | 150 | 150 | 100.00 | |||
| aes_man_cfg_err | 4.000s | 69.609us | 50 | 50 | 100.00 | |
| aes_config_error | 7.000s | 277.583us | 50 | 50 | 100.00 | |
| aes_alert_reset | 9.000s | 488.754us | 50 | 50 | 100.00 | |
| trigger_clear_test | 49 | 50 | 98.00 | |||
| aes_clear | 205.000s | 9574.403us | 49 | 50 | 98.00 | |
| nist_test_vectors | 1 | 1 | 100.00 | |||
| aes_nist_vectors | 8.000s | 331.450us | 1 | 1 | 100.00 | |
| reset_recovery | 50 | 50 | 100.00 | |||
| aes_alert_reset | 9.000s | 488.754us | 50 | 50 | 100.00 | |
| stress | 50 | 50 | 100.00 | |||
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| sideload | 100 | 100 | 100.00 | |||
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| aes_sideload | 18.000s | 753.015us | 50 | 50 | 100.00 | |
| deinitialization | 50 | 50 | 100.00 | |||
| aes_deinit | 17.000s | 703.015us | 50 | 50 | 100.00 | |
| stress_all | 10 | 10 | 100.00 | |||
| aes_stress_all | 56.000s | 4025.288us | 10 | 10 | 100.00 | |
| alert_test | 50 | 50 | 100.00 | |||
| aes_alert_test | 3.000s | 203.971us | 50 | 50 | 100.00 | |
| tl_d_oob_addr_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 4.000s | 118.217us | 20 | 20 | 100.00 | |
| tl_d_illegal_access | 20 | 20 | 100.00 | |||
| aes_tl_errors | 4.000s | 118.217us | 20 | 20 | 100.00 | |
| tl_d_outstanding_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 3.000s | 68.034us | 5 | 5 | 100.00 | |
| aes_csr_rw | 3.000s | 71.836us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 4.000s | 278.575us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 747.406us | 20 | 20 | 100.00 | |
| tl_d_partial_access | 50 | 50 | 100.00 | |||
| aes_csr_hw_reset | 3.000s | 68.034us | 5 | 5 | 100.00 | |
| aes_csr_rw | 3.000s | 71.836us | 20 | 20 | 100.00 | |
| aes_csr_aliasing | 4.000s | 278.575us | 5 | 5 | 100.00 | |
| aes_same_csr_outstanding | 3.000s | 747.406us | 20 | 20 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reseeding | 50 | 50 | 100.00 | |||
| aes_reseed | 13.000s | 495.516us | 50 | 50 | 100.00 | |
| fault_inject | 664 | 700 | 94.86 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| aes_control_fi | 46.000s | 10020.319us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 57.000s | 10003.437us | 338 | 350 | 96.57 | |
| shadow_reg_update_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 153.650us | 20 | 20 | 100.00 | |
| shadow_reg_read_clear_staged_value | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 153.650us | 20 | 20 | 100.00 | |
| shadow_reg_storage_error | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 153.650us | 20 | 20 | 100.00 | |
| shadowed_reset_glitch | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 153.650us | 20 | 20 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors_with_csr_rw | 5.000s | 920.302us | 20 | 20 | 100.00 | |
| tl_intg_err | 25 | 25 | 100.00 | |||
| aes_sec_cm | 9.000s | 6035.427us | 5 | 5 | 100.00 | |
| aes_tl_intg_err | 4.000s | 441.053us | 20 | 20 | 100.00 | |
| sec_cm_bus_integrity | 20 | 20 | 100.00 | |||
| aes_tl_intg_err | 4.000s | 441.053us | 20 | 20 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 50 | 50 | 100.00 | |||
| aes_alert_reset | 9.000s | 488.754us | 50 | 50 | 100.00 | |
| sec_cm_main_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 153.650us | 20 | 20 | 100.00 | |
| sec_cm_gcm_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 153.650us | 20 | 20 | 100.00 | |
| sec_cm_main_config_sparse | 218 | 220 | 99.09 | |||
| aes_smoke | 6.000s | 159.478us | 50 | 50 | 100.00 | |
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| aes_alert_reset | 9.000s | 488.754us | 50 | 50 | 100.00 | |
| aes_core_fi | 40.000s | 10018.958us | 68 | 70 | 97.14 | |
| sec_cm_gcm_config_sparse | 100 | 100 | 100.00 | |||
| aes_config_error | 7.000s | 277.583us | 50 | 50 | 100.00 | |
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| sec_cm_aux_config_shadow | 20 | 20 | 100.00 | |||
| aes_shadow_reg_errors | 3.000s | 153.650us | 20 | 20 | 100.00 | |
| sec_cm_aux_config_regwen | 100 | 100 | 100.00 | |||
| aes_readability | 3.000s | 90.687us | 50 | 50 | 100.00 | |
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| sec_cm_key_sideload | 100 | 100 | 100.00 | |||
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| aes_sideload | 18.000s | 753.015us | 50 | 50 | 100.00 | |
| sec_cm_key_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 90.687us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sw_unreadable | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 90.687us | 50 | 50 | 100.00 | |
| sec_cm_key_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 90.687us | 50 | 50 | 100.00 | |
| sec_cm_iv_config_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 90.687us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_sec_wipe | 50 | 50 | 100.00 | |||
| aes_readability | 3.000s | 90.687us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_key_sca | 50 | 50 | 100.00 | |||
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| sec_cm_key_masking | 50 | 50 | 100.00 | |||
| aes_stress | 26.000s | 1006.823us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_sparse | 49 | 50 | 98.00 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| sec_cm_main_fsm_redun | 714 | 750 | 95.20 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| aes_control_fi | 46.000s | 10020.319us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 57.000s | 10003.437us | 338 | 350 | 96.57 | |
| aes_ctr_fi | 4.000s | 189.672us | 50 | 50 | 100.00 | |
| sec_cm_cipher_fsm_sparse | 49 | 50 | 98.00 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| sec_cm_cipher_fsm_redun | 664 | 700 | 94.86 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| aes_control_fi | 46.000s | 10020.319us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 57.000s | 10003.437us | 338 | 350 | 96.57 | |
| sec_cm_cipher_ctr_redun | 338 | 350 | 96.57 | |||
| aes_cipher_fi | 57.000s | 10003.437us | 338 | 350 | 96.57 | |
| sec_cm_ctr_fsm_sparse | 49 | 50 | 98.00 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| sec_cm_ctr_fsm_redun | 376 | 400 | 94.00 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| aes_control_fi | 46.000s | 10020.319us | 277 | 300 | 92.33 | |
| aes_ctr_fi | 4.000s | 189.672us | 50 | 50 | 100.00 | |
| sec_cm_ctrl_sparse | 714 | 750 | 95.20 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| aes_control_fi | 46.000s | 10020.319us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 57.000s | 10003.437us | 338 | 350 | 96.57 | |
| aes_ctr_fi | 4.000s | 189.672us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_global_esc | 50 | 50 | 100.00 | |||
| aes_alert_reset | 9.000s | 488.754us | 50 | 50 | 100.00 | |
| sec_cm_main_fsm_local_esc | 714 | 750 | 95.20 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| aes_control_fi | 46.000s | 10020.319us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 57.000s | 10003.437us | 338 | 350 | 96.57 | |
| aes_ctr_fi | 4.000s | 189.672us | 50 | 50 | 100.00 | |
| sec_cm_cipher_fsm_local_esc | 714 | 750 | 95.20 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| aes_control_fi | 46.000s | 10020.319us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 57.000s | 10003.437us | 338 | 350 | 96.57 | |
| aes_ctr_fi | 4.000s | 189.672us | 50 | 50 | 100.00 | |
| sec_cm_ctr_fsm_local_esc | 376 | 400 | 94.00 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| aes_control_fi | 46.000s | 10020.319us | 277 | 300 | 92.33 | |
| aes_ctr_fi | 4.000s | 189.672us | 50 | 50 | 100.00 | |
| sec_cm_data_reg_local_esc | 664 | 700 | 94.86 | |||
| aes_fi | 7.000s | 109.749us | 49 | 50 | 98.00 | |
| aes_control_fi | 46.000s | 10020.319us | 277 | 300 | 92.33 | |
| aes_cipher_fi | 57.000s | 10003.437us | 338 | 350 | 96.57 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| aes_stress_all_with_rand_reset | 33.000s | 1418.348us | 0 | 10 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | ||||
| aes_stress_all_with_rand_reset | 30273824951163323209584044426604601120499233812912935139777782036584727499921 | 750 |
UVM_ERROR @ 1503182742 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1503182742 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 109872892584730595870553057539052737127946883800599808329931109419405399598823 | 749 |
UVM_ERROR @ 1418348326 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1418348326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 35900230563444815842637067647831131272384672113744033269207447726628858612249 | 443 |
UVM_ERROR @ 1162395157 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1162395157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 53050854421028425548195817706213314079138725206706024210503833019074979734443 | 867 |
UVM_ERROR @ 1832710147 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1832710147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 73542127673939580138338700897794877473533588421496583665973115313555799757702 | 542 |
UVM_ERROR @ 1006502454 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1006502454 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_stress_all_with_rand_reset | 17434500411059676046188201006888050944358124548193567718623790373466621515605 | 488 |
UVM_ERROR @ 5093427287 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 5093427287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. | ||||
| aes_stress_all_with_rand_reset | 104280791353117286624645428998994986660854485051194003799224131529117513731934 | 337 |
UVM_ERROR @ 1259971992 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1259971992 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! | ||||
| aes_cipher_fi | 102612769375328380130230584402408691770008825008019018739934870741201885229771 | 132 |
UVM_FATAL @ 10039375599 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10039375599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 54398271050245703551346892476673708120291557459877860104883701924288507733292 | 138 |
UVM_FATAL @ 10013584586 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10013584586 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 84921342520319772579503075323071845897945639537130297825685659403915411961172 | 137 |
UVM_FATAL @ 10006790954 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006790954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 84821181804815455870818795517199412945741851939690095241311756233514376146178 | 140 |
UVM_FATAL @ 10011024328 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011024328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 92872515273742855177359789850155006428466233959377032516402076552896537826699 | 141 |
UVM_FATAL @ 10011288747 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011288747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 59448554431443874571401945362186553737821193887970254271122183180028000052532 | 134 |
UVM_FATAL @ 10150389295 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10150389295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 61904477729156584957981767663171876452624940185699110133172579214780177873897 | 141 |
UVM_FATAL @ 10032372242 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10032372242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| aes_cipher_fi | 113801536654637671314493978700515593057993693431658853596501588596119813996414 | 137 |
UVM_FATAL @ 10003437059 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003437059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (aes_scoreboard.sv:614) scoreboard [scoreboard] # * | ||||
| aes_clear | 23472927632730231906338438513372540685941559671199810833008478128688235609206 | 5255 |
UVM_FATAL @ 29833116 ps: (aes_scoreboard.sv:614) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] # 1
TEST FAILED MESSAGES DID NOT MATCH
0 06 57 e1 0
1 7f 36 82 0
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| UVM_FATAL (aes_base_vseq.sv:74) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | ||||
| aes_stress_all_with_rand_reset | 12459326333100044853436351346412171022569814220945662807805043785393528961029 | 170 |
UVM_FATAL @ 358591124 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 358591124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| aes_stress_all_with_rand_reset | 47655467976324026297150443058931957288293337120161947943259693109582609761325 | 558 |
UVM_FATAL @ 11589444384 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 11589444384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (aes_base_vseq.sv:74) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) | ||||
| aes_stress_all_with_rand_reset | 22655703142247725319323861693792267936815896200571230020698198771436735538486 | 153 |
UVM_FATAL @ 462852383 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 462852383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| Job timed out after * minutes | ||||
| aes_control_fi | 48416983404253146148693637938418188946685053868080214290898635139279665846070 | None |
Job timed out after 1 minutes
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| aes_cipher_fi | 111466622949598417719364574558186691919519737430083717994302104470629731312834 | None |
Job timed out after 1 minutes
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| aes_control_fi | 45924570569880702624014111427582306762442394273432335880233567044368251774759 | None |
Job timed out after 1 minutes
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| aes_control_fi | 1789928472749216486430470948141326074921778355289293658861608841644918142144 | None |
Job timed out after 1 minutes
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| aes_control_fi | 1534016187188891300871737505916024811145407669429187637465482576948901610712 | None |
Job timed out after 1 minutes
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| aes_control_fi | 80788084657157011291354623674846630667273519250653809971156116136725595432839 | None |
Job timed out after 1 minutes
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| aes_control_fi | 20991360269788357347678686788740740725358897040998217931144480449049682099799 | None |
Job timed out after 1 minutes
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| aes_control_fi | 13906250044842226274800167845516167674698778607190198935690709026788359512477 | None |
Job timed out after 1 minutes
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| aes_control_fi | 77918857018402732051723648862244419238473479804798495528695273505064608451380 | None |
Job timed out after 1 minutes
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| aes_control_fi | 79121692842223232842393946205210842435234166837633296300764183163978843997624 | None |
Job timed out after 1 minutes
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| aes_control_fi | 13863945343003327352222924061084116374878422782944156739004297907191513220742 | None |
Job timed out after 1 minutes
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| aes_control_fi | 76274069694728547979551201211232152475650296982657550912135428416968359943951 | None |
Job timed out after 1 minutes
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| aes_control_fi | 113479175136128709010889142047715258183869197757054197631636255183338825422725 | None |
Job timed out after 1 minutes
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| aes_control_fi | 33395468253752261702690809764963698248655875219661212487244943177957711238208 | None |
Job timed out after 1 minutes
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| aes_control_fi | 27064382657374648610670135699575896046619344495331270083756743153308584165824 | None |
Job timed out after 1 minutes
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| aes_cipher_fi | 43226277784888463521571823433517826795486786160817478642934957157467829046235 | None |
Job timed out after 1 minutes
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| aes_control_fi | 79092854862492267939653521111908635977717002487493178585347472298021707609684 | None |
Job timed out after 1 minutes
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| aes_control_fi | 14101384828511070389610568480535804616040518069233318770126653034649168816530 | None |
Job timed out after 1 minutes
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| aes_control_fi | 15408856485053477412389286132080826720871323561713726513926631241159125468341 | None |
Job timed out after 1 minutes
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| aes_cipher_fi | 111350891518159237407946070474519394869180231615989947062693059280193415561666 | None |
Job timed out after 1 minutes
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| UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! | ||||
| aes_control_fi | 100119082380244350760731501678167643815862380351423222649229792071909448444006 | 134 |
UVM_FATAL @ 10010926565 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010926565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| aes_control_fi | 67453914722805939396015189283837164855836664214657094204146302862905187113445 | 136 |
UVM_FATAL @ 10005779517 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005779517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| aes_control_fi | 50710451437177184006565171320547839134532637232924714588533776306422308141638 | 137 |
UVM_FATAL @ 10034809966 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10034809966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| aes_control_fi | 83978127131868841734269116091495503804306529636117650391313296496953936391547 | 148 |
UVM_FATAL @ 10014668124 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10014668124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| aes_control_fi | 17282186352155107999759252425620401735109978286477970066179624646407906976831 | 133 |
UVM_FATAL @ 10016124369 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10016124369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1129): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS) | ||||
| aes_fi | 98674204264287960012674578330980267509668270070333122462480645181721589666277 | 1107 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1129): (time 23102602 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 23081769 PS)
($past(iv_q) != $past(state_done_transposed, 2) ^ $past(data_in_prev_q, 2)))
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xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1135): (time 23102602 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 23081769 PS)
UVM_ERROR @ 23102602 ps: (aes_core.sv:1129) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
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| UVM_FATAL (aes_core_fi_vseq.sv:66) [aes_core_fi_vseq] wait timeout occurred! | ||||
| aes_core_fi | 21590796227559787224071227810213659272797360009246437141413562440800303227014 | 134 |
UVM_FATAL @ 10018958258 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10018958258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| aes_core_fi | 9709526523073129104005492868326869688952377671039431618987012024624333199622 | 146 |
UVM_FATAL @ 10010155888 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010155888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) | ||||
| aes_control_fi | 104924850130763059619994247356742139790668647033619927869636807766910994341932 | 128 |
UVM_FATAL @ 10020319338 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0xb3237c84, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10020319338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) | ||||
| aes_cipher_fi | 113173725095278643581866657179183059353754750608303299938689420780579687600880 | 132 |
UVM_FATAL @ 10035298784 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x29e37f84, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10035298784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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