Simulation Results: gpio

 
16/01/2026 17:05:14 sha: b5ecf83 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.48 %
  • code
  • 92.61 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.89 %
  • branch
  • 98.38 %
  • cond
  • 95.61 %
  • toggle
  • 94.19 %
  • FSM
  • 75.00 %
Validation stages
V1
97.14%
V2
97.84%
V2S
91.11%
V3
50.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 200 200 100.00
gpio_smoke 1.600s 657.182us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.390s 53.257us 50 50 100.00
gpio_smoke_en_cdc_prim 1.260s 247.129us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.200s 49.858us 50 50 100.00
csr_hw_reset 5 5 100.00
gpio_csr_hw_reset 0.800s 140.073us 5 5 100.00
csr_rw 17 20 85.00
gpio_csr_rw 0.950s 13.829us 17 20 85.00
csr_bit_bash 5 5 100.00
gpio_csr_bit_bash 5.960s 410.816us 5 5 100.00
csr_aliasing 4 5 80.00
gpio_csr_aliasing 1.710s 447.839us 4 5 80.00
csr_mem_rw_with_rand_reset 20 20 100.00
gpio_csr_mem_rw_with_rand_reset 1.410s 60.617us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 21 25 84.00
gpio_csr_rw 0.950s 13.829us 17 20 85.00
gpio_csr_aliasing 1.710s 447.839us 4 5 80.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 100 100 100.00
gpio_random_dout_din 1.410s 227.341us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.160s 290.547us 50 50 100.00
out_in_regs_read_write 50 50 100.00
gpio_dout_din_regs_random_rw 1.280s 86.054us 50 50 100.00
gpio_interrupt_programming 50 50 100.00
gpio_intr_rand_pgm 1.220s 156.776us 50 50 100.00
random_interrupt_trigger 50 50 100.00
gpio_rand_intr_trigger 3.320s 327.264us 50 50 100.00
interrupt_and_noise_filter 50 50 100.00
gpio_intr_with_filter_rand_intr_event 2.600s 261.601us 50 50 100.00
noise_filter_stress 50 50 100.00
gpio_filter_stress 18.070s 1491.050us 50 50 100.00
regs_long_reads_and_writes 50 50 100.00
gpio_random_long_reg_writes_reg_reads 5.500s 2073.474us 50 50 100.00
full_random 50 50 100.00
gpio_full_random 1.190s 250.950us 50 50 100.00
stress_all 50 50 100.00
gpio_stress_all 135.500s 150404.585us 50 50 100.00
alert_test 50 50 100.00
gpio_alert_test 0.780s 39.407us 50 50 100.00
intr_test 50 50 100.00
gpio_intr_test 0.850s 25.017us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
gpio_tl_errors 2.750s 186.371us 20 20 100.00
tl_d_illegal_access 20 20 100.00
gpio_tl_errors 2.750s 186.371us 20 20 100.00
tl_d_outstanding_access 42 50 84.00
gpio_csr_rw 0.950s 13.829us 17 20 85.00
gpio_same_csr_outstanding 1.310s 333.878us 16 20 80.00
gpio_csr_aliasing 1.710s 447.839us 4 5 80.00
gpio_csr_hw_reset 0.800s 140.073us 5 5 100.00
tl_d_partial_access 42 50 84.00
gpio_csr_rw 0.950s 13.829us 17 20 85.00
gpio_same_csr_outstanding 1.310s 333.878us 16 20 80.00
gpio_csr_aliasing 1.710s 447.839us 4 5 80.00
gpio_csr_hw_reset 0.800s 140.073us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 23 25 92.00
gpio_sec_cm 0.930s 93.912us 5 5 100.00
gpio_tl_intg_err 2.410s 219.255us 18 20 90.00
sec_cm_bus_integrity 18 20 90.00
gpio_tl_intg_err 2.410s 219.255us 18 20 90.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 50 50 100.00
gpio_rand_straps 0.880s 12.428us 50 50 100.00
stress_all_with_rand_reset 0 50 0.00
gpio_stress_all_with_rand_reset 11.580s 388.956us 0 50 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 50 50 100.00
gpio_inp_prd_cnt 0.920s 33.915us 50 50 100.00

Error Messages

   Test seed line log context
UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -*
gpio_stress_all_with_rand_reset 22614093542382309046400446743044374639932656584473306203628975283712074785564 807
UVM_FATAL @ 388955734 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 388955734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 5312451397494072020302619486779716209894257816076625506902739611586281812916 75
UVM_FATAL @ 148607802 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 148607802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 108726661923639476734149813707971645607747701976441446031611943301491719314036 78
UVM_FATAL @ 440983496 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 440983496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 37917306855541609552345649708461610631852132584931149634707498873790803615781 76
UVM_FATAL @ 155605809 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 155605809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 13895684141980555615248181888415003337471555338507089342579519530366890413954 75
UVM_FATAL @ 3246530860 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3246530860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 8666381393279087845691041737815616872974318613902513741276449955048736329643 125
UVM_FATAL @ 61276802 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 61276802 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 98086146548133941336215187816508650662861767591470882678660868190957694275154 75
UVM_FATAL @ 1201738 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1201738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 96323696309690438683614801194029030981616748392609259892982674438555276136459 75
UVM_FATAL @ 114020338 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 114020338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 76136534895264092299906664403864101911846776374225372656568548742296424649150 76
UVM_FATAL @ 840306091 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 840306091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 77021264647520838846485352671686877685717575530035516224717941541780171978412 80
UVM_FATAL @ 10984197 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 10984197 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 23501101976808991271100816731398214585961264892114925841918800839783754154403 75
UVM_FATAL @ 327038722 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 327038722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 2501985010527036555872628406267806017849815335472375128762762562288363373273 125
UVM_FATAL @ 1275781474 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1275781474 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 44337775953364130010207603494664884855845031378404706003545151851254348061050 76
UVM_FATAL @ 505857604 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 505857604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68655370160074201141085041435074512442666619636819377448815098845807962013208 75
UVM_FATAL @ 3564860 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3564860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 41340566782381573663434038283474938355539297447597116164838193795056101185554 75
UVM_FATAL @ 2798319 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2798319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 112166649969838762276906435379267619701790028927740786582756047307138302068890 75
UVM_FATAL @ 1190839896 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1190839896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 90176736380231694048881199218393888595889333066637993978097705912982552022415 77
UVM_FATAL @ 15643451 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 15643451 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 62988538611397017531816217904490779790135021554698537076144222949917958876346 415
UVM_FATAL @ 373154392 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 373154392 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 1085247441011361234915824235061598443614657157130386268026533192645932353649 359
UVM_FATAL @ 5053844776 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 5053844776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 100293833365023056238368935399388139643858653289830793255334172135264480656713 76
UVM_FATAL @ 287400858 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 287400858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 51826466163228198685170221751884426772403458223302655525493939710574739238696 297
UVM_FATAL @ 170237500 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 170237500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 84941866004158673236477484020020024876033679256794506564539315363754007787868 75
UVM_FATAL @ 3348818 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 3348818 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 31012477529014540509922161314016013641880930796180233862991174518256763831385 78
UVM_FATAL @ 2202894402 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2202894402 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 41088155395337458342080922035504414403057249936950967073955725212980701640459 177
UVM_FATAL @ 1996062974 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 1996062974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 13609651663926475244227152410807796717293982807165583693609405222770442827254 75
UVM_FATAL @ 2140077 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 2140077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 83467063215535547758859703806944111794283884366358638369758275539918311728576 76
UVM_FATAL @ 98373251 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
UVM_INFO @ 98373251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1163) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 36017895393098883349286349877332553452916215235297957327054346238702501818983 329
UVM_FATAL @ 893326961 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 893326961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 68888417133490598302638980544931529809087987247691697439088376413350677875196 77
UVM_FATAL @ 45006997 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 45006997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 53582029674843337011468941772842426271220901271291895704515632801741298096986 77
UVM_FATAL @ 7385438 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 7385438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 86530120887922347979637172955008490222226841929887347962319002773783190243424 353
UVM_FATAL @ 1688304685 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1688304685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 43449992605888977990478903378690624858990637430493542854815621019715733800098 116
UVM_FATAL @ 3773821786 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3773821786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 66755430594884895082014909621786344141444134582909563792883608031991922388050 77
UVM_FATAL @ 23867961 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 23867961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 99544787208520548471354974874163048749732795800205761424376083508080637720177 541
UVM_FATAL @ 329909351 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 329909351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 6290137128983817311319947286325135220767363164375333134794418238638858187438 77
UVM_FATAL @ 2719229 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2719229 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 32975471750054568594397014442846320401385700304991823008123870526811043243451 165
UVM_FATAL @ 659942412 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 659942412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 46822665092345541911356515371288775078427016313098405005651362338435180098895 77
UVM_FATAL @ 10232839 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 10232839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 47034985328725095289754709966166227864638312536566172850155399430796748581653 81
UVM_FATAL @ 579961115 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 579961115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 70258376458824420994934073047831143078511771912999124290839370581816083043346 77
UVM_FATAL @ 2074890 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2074890 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 62857593547019217140830362004879742525306410079924964675660001010889168777889 77
UVM_FATAL @ 3934685 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3934685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 45911128380134331905784948211844423976819852751346390766857802396462092735710 77
UVM_FATAL @ 20368920 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 20368920 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 21085635124751422715974267600606919109634191728717895667084675262025379780134 77
UVM_FATAL @ 3850476 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3850476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 61932442014177395660315145245165157845835239252414242430382958396573486669484 77
UVM_FATAL @ 3798918 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 3798918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 17743331471537887946289418325773090338428696568963297245815260121207120157670 112
UVM_FATAL @ 59545479 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 59545479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 65408576675659787021053930638111035460985042133362075833301103210688408330553 77
UVM_FATAL @ 8942685 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 8942685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 29244091651002173013489820961532657280056756633619684273597552361443068382091 77
UVM_FATAL @ 168776418 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 168776418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 98038870642444870177038974470279637609945027167178481264138024906162452056145 86
UVM_FATAL @ 30995292 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 30995292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 115691566934774029203477331374991488349698865131646099293354167945512654402492 303
UVM_FATAL @ 1089738083 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 1089738083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 30783749888383942124920436001472198860276509774447139343741494872926032261898 117
UVM_FATAL @ 2406337081 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 2406337081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 27862629732383138812238116330587182599632417743967534644948140012307697678160 77
UVM_FATAL @ 5032862 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 5032862 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_stress_all_with_rand_reset 82074906232306185292907759366183418763349702735414745830399930113515755965061 135
UVM_FATAL @ 807444664 ps: (cip_base_vseq.sv:1163) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
UVM_INFO @ 807444664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:642) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
gpio_same_csr_outstanding 58423187021398306467659271691781502898393808300351530748299224953933083499234 74
UVM_ERROR @ 88083668 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0xecc8bb78 read out mismatch
UVM_INFO @ 88083668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 17529894290984182457921727308367530782964526159748357893310700544090929286870 75
UVM_ERROR @ 17739910 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (14213636 [0xd8e204] vs 14213637 [0xd8e205]) addr 0xa1a31664 read out mismatch
UVM_INFO @ 17739910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 48550972058292451731012327073293620892227571464300170058676952682490877616067 74
UVM_ERROR @ 66185358 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (9316868 [0x8e2a04] vs 9316869 [0x8e2a05]) addr 0x90938650 read out mismatch
UVM_INFO @ 66185358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_same_csr_outstanding 5942484007790005109059085953629372488406590451463216928382404164155691408384 74
UVM_ERROR @ 137753747 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x76f4a870 read out mismatch
UVM_INFO @ 137753747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_* reset value: *
gpio_csr_aliasing 12697930599370046321273582339623825029455444418179405600839025356377112654343 75
UVM_ERROR @ 63150517 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (45 [0x2d] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_6 reset value: 0x0
UVM_INFO @ 63150517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_csr_rw 72551520017314660112258355743574458597630392060446539508406187435932162860117 74
UVM_ERROR @ 70322417 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_4 reset value: 0x0
UVM_INFO @ 70322417 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_val_*.value_* reset value: *
gpio_csr_rw 106276458470193158591369783959295430981694394894930404899319980142524291811618 75
UVM_ERROR @ 4510427 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_3.value_0 reset value: 0x0
UVM_INFO @ 4510427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_csr_rw 56818545492085973769056413539318382432552999706109600173956297605293383326995 74
UVM_ERROR @ 33353525 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (62 [0x3e] vs 0 [0x0]) Regname: gpio_reg_block.inp_prd_cnt_val_7.value_0 reset value: 0x0
UVM_INFO @ 33353525 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_* reset value: *
gpio_tl_intg_err 26953947618176251636062441764910674303559570480970559532073025025466743497854 350
UVM_ERROR @ 190077086 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (10203908 [0x9bb304] vs 10203909 [0x9bb305]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_2 reset value: 0x4
UVM_INFO @ 190077086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_*.enable reset value: *
gpio_tl_intg_err 39384346279463722345411374055409405651918481139223377540320594067117649889385 230
UVM_ERROR @ 174252483 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_0.enable reset value: 0x0
UVM_INFO @ 174252483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---