| V1 |
|
100.00% |
| V2 |
|
98.67% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_smoke | 50 | 50 | 100.00 | |||
| xbar_smoke | 21.540s | 1147.421us | 50 | 50 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_base_random_sequence | 50 | 50 | 100.00 | |||
| xbar_random | 233.510s | 5267.453us | 50 | 50 | 100.00 | |
| xbar_random_delay | 297 | 300 | 99.00 | |||
| xbar_smoke_zero_delays | 7.550s | 55.830us | 50 | 50 | 100.00 | |
| xbar_smoke_large_delays | 417.400s | 77508.651us | 50 | 50 | 100.00 | |
| xbar_smoke_slow_rsp | 439.080s | 60213.204us | 50 | 50 | 100.00 | |
| xbar_random_zero_delays | 92.880s | 535.657us | 50 | 50 | 100.00 | |
| xbar_random_large_delays | 1649.700s | 207005.475us | 49 | 50 | 98.00 | |
| xbar_random_slow_rsp | 2604.900s | 527035.457us | 48 | 50 | 96.00 | |
| xbar_unmapped_address | 100 | 100 | 100.00 | |||
| xbar_unmapped_addr | 134.060s | 5426.062us | 50 | 50 | 100.00 | |
| xbar_error_and_unmapped_addr | 141.230s | 16047.327us | 50 | 50 | 100.00 | |
| xbar_error_cases | 100 | 100 | 100.00 | |||
| xbar_error_random | 195.660s | 20312.059us | 50 | 50 | 100.00 | |
| xbar_error_and_unmapped_addr | 141.230s | 16047.327us | 50 | 50 | 100.00 | |
| xbar_all_access_same_device | 91 | 100 | 91.00 | |||
| xbar_access_same_device | 332.500s | 21766.408us | 50 | 50 | 100.00 | |
| xbar_access_same_device_slow_rsp | 3495.210s | 240269.197us | 41 | 50 | 82.00 | |
| xbar_all_hosts_use_same_source_id | 50 | 50 | 100.00 | |||
| xbar_same_source | 175.970s | 4523.176us | 50 | 50 | 100.00 | |
| xbar_stress_all | 100 | 100 | 100.00 | |||
| xbar_stress_all | 1650.830s | 53405.378us | 50 | 50 | 100.00 | |
| xbar_stress_all_with_error | 1141.100s | 60591.174us | 50 | 50 | 100.00 | |
| xbar_stress_with_reset | 100 | 100 | 100.00 | |||
| xbar_stress_all_with_rand_reset | 1848.850s | 7692.148us | 50 | 50 | 100.00 | |
| xbar_stress_all_with_reset_error | 1255.760s | 24168.227us | 50 | 50 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | ||||
| xbar_access_same_device_slow_rsp | 68705837211812966603656625747265414925677017902531612736858400996788152718716 | 120 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 88719306765592415998023078650771046447471880220283154463206862003225712656928 | 104 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 79919232610474633814264953099582159473538856506055006016913992665000978505317 | 134 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_large_delays | 13503493513142565025073706670914094818499462923741397104003918455071899617479 | 148 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 63942296872824459929904733010442228354661186287136199458847786598074973840307 | 178 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 113864281627867123552417695864225572907121639699098536897298209462000632581989 | 120 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_access_same_device_slow_rsp | 108856137199056887296931667542490628753500221441518150390419806843536253706815 | 104 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xbar_random_slow_rsp | 70964990325621471928889048448955345292353386330218271933513753969865056092366 | 139 |
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Job timed out after * minutes | ||||
| xbar_access_same_device_slow_rsp | 40543015401744240600547632233866356061517600747821667861167323526286716737334 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 58075036604959673094555029305677603365788469902530392470750690646853182253117 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 26083905783110222077266446576387139565452568398517255077484968531083171512697 | None |
Job timed out after 60 minutes
|
|
| xbar_access_same_device_slow_rsp | 21813456161640813668657542699361262695954023444535002859062719519327343655264 | None |
Job timed out after 60 minutes
|
|