Simulation Results: aes

 
23/01/2026 17:05:23 sha: b61f0df json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 96.59 %
  • code
  • 92.78 %
  • assert
  • 98.56 %
  • func
  • 98.42 %
  • block
  • 96.77 %
  • line
  • 97.62 %
  • branch
  • 90.90 %
  • toggle
  • 98.05 %
  • FSM
  • 84.57 %
Validation stages
V1
100.00%
V2
100.00%
V2S
95.29%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 153.968us 1 1 100.00
smoke 50 50 100.00
aes_smoke 18.000s 1604.172us 50 50 100.00
csr_hw_reset 5 5 100.00
aes_csr_hw_reset 3.000s 60.704us 5 5 100.00
csr_rw 20 20 100.00
aes_csr_rw 3.000s 92.553us 20 20 100.00
csr_bit_bash 5 5 100.00
aes_csr_bit_bash 7.000s 594.406us 5 5 100.00
csr_aliasing 5 5 100.00
aes_csr_aliasing 4.000s 669.898us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 72.981us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
aes_csr_rw 3.000s 92.553us 20 20 100.00
aes_csr_aliasing 4.000s 669.898us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 150 150 100.00
aes_smoke 18.000s 1604.172us 50 50 100.00
aes_config_error 11.000s 859.474us 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
key_length 150 150 100.00
aes_smoke 18.000s 1604.172us 50 50 100.00
aes_config_error 11.000s 859.474us 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
back2back 100 100 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
aes_b2b 51.000s 823.964us 50 50 100.00
backpressure 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
multi_message 200 200 100.00
aes_smoke 18.000s 1604.172us 50 50 100.00
aes_config_error 11.000s 859.474us 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
aes_alert_reset 11.000s 1429.577us 50 50 100.00
failure_test 150 150 100.00
aes_man_cfg_err 4.000s 295.791us 50 50 100.00
aes_config_error 11.000s 859.474us 50 50 100.00
aes_alert_reset 11.000s 1429.577us 50 50 100.00
trigger_clear_test 50 50 100.00
aes_clear 26.000s 1760.681us 50 50 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 10.000s 740.523us 1 1 100.00
reset_recovery 50 50 100.00
aes_alert_reset 11.000s 1429.577us 50 50 100.00
stress 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
sideload 100 100 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
aes_sideload 7.000s 574.824us 50 50 100.00
deinitialization 50 50 100.00
aes_deinit 7.000s 284.642us 50 50 100.00
stress_all 10 10 100.00
aes_stress_all 97.000s 5085.876us 10 10 100.00
alert_test 50 50 100.00
aes_alert_test 3.000s 62.032us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
aes_tl_errors 4.000s 595.713us 20 20 100.00
tl_d_illegal_access 20 20 100.00
aes_tl_errors 4.000s 595.713us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
aes_csr_hw_reset 3.000s 60.704us 5 5 100.00
aes_csr_rw 3.000s 92.553us 20 20 100.00
aes_csr_aliasing 4.000s 669.898us 5 5 100.00
aes_same_csr_outstanding 3.000s 401.203us 20 20 100.00
tl_d_partial_access 50 50 100.00
aes_csr_hw_reset 3.000s 60.704us 5 5 100.00
aes_csr_rw 3.000s 92.553us 20 20 100.00
aes_csr_aliasing 4.000s 669.898us 5 5 100.00
aes_same_csr_outstanding 3.000s 401.203us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 50 50 100.00
aes_reseed 13.000s 1381.991us 50 50 100.00
fault_inject 659 700 94.14
aes_fi 19.000s 1165.874us 49 50 98.00
aes_control_fi 59.000s 10022.434us 275 300 91.67
aes_cipher_fi 40.000s 10006.259us 335 350 95.71
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 3.000s 165.653us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 3.000s 165.653us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 3.000s 165.653us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 3.000s 165.653us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 4.000s 333.367us 20 20 100.00
tl_intg_err 25 25 100.00
aes_tl_intg_err 4.000s 656.140us 20 20 100.00
aes_sec_cm 6.000s 2845.768us 5 5 100.00
sec_cm_bus_integrity 20 20 100.00
aes_tl_intg_err 4.000s 656.140us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
aes_alert_reset 11.000s 1429.577us 50 50 100.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 165.653us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 165.653us 20 20 100.00
sec_cm_main_config_sparse 218 220 99.09
aes_smoke 18.000s 1604.172us 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
aes_alert_reset 11.000s 1429.577us 50 50 100.00
aes_core_fi 33.000s 10010.171us 68 70 97.14
sec_cm_gcm_config_sparse 100 100 100.00
aes_config_error 11.000s 859.474us 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 3.000s 165.653us 20 20 100.00
sec_cm_aux_config_regwen 100 100 100.00
aes_readability 4.000s 113.785us 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
sec_cm_key_sideload 100 100 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
aes_sideload 7.000s 574.824us 50 50 100.00
sec_cm_key_sw_unreadable 50 50 100.00
aes_readability 4.000s 113.785us 50 50 100.00
sec_cm_data_reg_sw_unreadable 50 50 100.00
aes_readability 4.000s 113.785us 50 50 100.00
sec_cm_key_sec_wipe 50 50 100.00
aes_readability 4.000s 113.785us 50 50 100.00
sec_cm_iv_config_sec_wipe 50 50 100.00
aes_readability 4.000s 113.785us 50 50 100.00
sec_cm_data_reg_sec_wipe 50 50 100.00
aes_readability 4.000s 113.785us 50 50 100.00
sec_cm_data_reg_key_sca 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
sec_cm_key_masking 50 50 100.00
aes_stress 11.000s 1586.297us 50 50 100.00
sec_cm_main_fsm_sparse 49 50 98.00
aes_fi 19.000s 1165.874us 49 50 98.00
sec_cm_main_fsm_redun 709 750 94.53
aes_fi 19.000s 1165.874us 49 50 98.00
aes_control_fi 59.000s 10022.434us 275 300 91.67
aes_cipher_fi 40.000s 10006.259us 335 350 95.71
aes_ctr_fi 4.000s 236.649us 50 50 100.00
sec_cm_cipher_fsm_sparse 49 50 98.00
aes_fi 19.000s 1165.874us 49 50 98.00
sec_cm_cipher_fsm_redun 659 700 94.14
aes_fi 19.000s 1165.874us 49 50 98.00
aes_control_fi 59.000s 10022.434us 275 300 91.67
aes_cipher_fi 40.000s 10006.259us 335 350 95.71
sec_cm_cipher_ctr_redun 335 350 95.71
aes_cipher_fi 40.000s 10006.259us 335 350 95.71
sec_cm_ctr_fsm_sparse 49 50 98.00
aes_fi 19.000s 1165.874us 49 50 98.00
sec_cm_ctr_fsm_redun 374 400 93.50
aes_fi 19.000s 1165.874us 49 50 98.00
aes_control_fi 59.000s 10022.434us 275 300 91.67
aes_ctr_fi 4.000s 236.649us 50 50 100.00
sec_cm_ctrl_sparse 709 750 94.53
aes_fi 19.000s 1165.874us 49 50 98.00
aes_control_fi 59.000s 10022.434us 275 300 91.67
aes_cipher_fi 40.000s 10006.259us 335 350 95.71
aes_ctr_fi 4.000s 236.649us 50 50 100.00
sec_cm_main_fsm_global_esc 50 50 100.00
aes_alert_reset 11.000s 1429.577us 50 50 100.00
sec_cm_main_fsm_local_esc 709 750 94.53
aes_fi 19.000s 1165.874us 49 50 98.00
aes_control_fi 59.000s 10022.434us 275 300 91.67
aes_cipher_fi 40.000s 10006.259us 335 350 95.71
aes_ctr_fi 4.000s 236.649us 50 50 100.00
sec_cm_cipher_fsm_local_esc 709 750 94.53
aes_fi 19.000s 1165.874us 49 50 98.00
aes_control_fi 59.000s 10022.434us 275 300 91.67
aes_cipher_fi 40.000s 10006.259us 335 350 95.71
aes_ctr_fi 4.000s 236.649us 50 50 100.00
sec_cm_ctr_fsm_local_esc 374 400 93.50
aes_fi 19.000s 1165.874us 49 50 98.00
aes_control_fi 59.000s 10022.434us 275 300 91.67
aes_ctr_fi 4.000s 236.649us 50 50 100.00
sec_cm_data_reg_local_esc 659 700 94.14
aes_fi 19.000s 1165.874us 49 50 98.00
aes_control_fi 59.000s 10022.434us 275 300 91.67
aes_cipher_fi 40.000s 10006.259us 335 350 95.71
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 35.000s 1112.745us 0 10 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 33831887585829875549266735325531850634001698194820972659133216855167418632853 459
UVM_ERROR @ 658140287 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 658140287 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 36833677089280655102471677669378855576467947403854697216366758784971787205210 848
UVM_ERROR @ 702216762 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 702216762 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 28233446927029013759280920452621386699866429912106355757280786985547829341775 1026
UVM_ERROR @ 1112745040 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1112745040 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 44575627573486013381083540647057373667255968862205579569946165767697622619196 261
UVM_ERROR @ 129649927 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 129649927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 84481578513102338231177279470676531089689782371711264238047059190383134380717 219
UVM_ERROR @ 129134086 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 129134086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 99005613819864001255341817733825480422241704113437003700247644279942617926657 1053
UVM_ERROR @ 1086852655 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 1086852655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:74) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 38280994360851206018933155074826149494582693636236595208616683441448250143036 133
UVM_FATAL @ 34845349 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 34845349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 57049239226990137361508981944093009541731027676464984177802427703234440259060 149
UVM_FATAL @ 175078346 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 175078346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 36608050046170974455700390287723420280753663787966526960745831029449060011354 854
UVM_FATAL @ 1041463797 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 1041463797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
aes_stress_all_with_rand_reset 115042853350596677009874397503412615517649765371013959732297771743248244287991 143
UVM_ERROR @ 135044636 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 135044636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!
aes_control_fi 60358860612215721055701765375391923479342731577803382530620129499545431271847 134
UVM_FATAL @ 10005030906 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005030906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 110910053309835136743310023846467900640277188368008678923068359784754978881470 134
UVM_FATAL @ 10030678470 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10030678470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 4057883495309413134995069288262804527837593607517026263981182880716013873551 133
UVM_FATAL @ 10006148180 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006148180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 67708258070646725544183390777437921586981439402260980524544876013470727784646 142
UVM_FATAL @ 10010845570 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010845570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 86492944228470967578809017670958124063510697240428391941983656674037405625746 146
UVM_FATAL @ 10006553339 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006553339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 98328266158191686132877986690809506892704258888958632519310393219723595382725 143
UVM_FATAL @ 10012099999 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012099999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 33632041271505370103800412199878660332856249361932007532571457616773492874551 137
UVM_FATAL @ 10011851056 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011851056 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 6472947614480278414071290825069175563096181232495824883110948874662028857024 141
UVM_FATAL @ 10011863872 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10011863872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 64252330717204632184102799042071245043627891336098124730621461978278544593229 140
UVM_FATAL @ 10015812773 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10015812773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 52293084818972845253801207562463132273566396984721875269527116768462761220832 136
UVM_FATAL @ 10020089116 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10020089116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 18831764975513289761047887024160259082098460348442712069661129021942929676919 146
UVM_FATAL @ 10037217973 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10037217973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 100922881446098832414377444011600600890725717826552584456119433576561530094100 140
UVM_FATAL @ 10009165779 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009165779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 65970044932747084023775480944604354211523052734609979975144092733715757028459 140
UVM_FATAL @ 10006959349 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006959349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:66) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 55322505866026660803890532623052149590589798439366557919170289421705727424993 142
UVM_FATAL @ 10039215548 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10039215548 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 47060132418228189035253268257301112430577271619282149649962266936331599358824 140
UVM_FATAL @ 10010171217 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010171217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
aes_control_fi 56716907112988519560896532577737318918163030415655848984230685189518485337286 None
Job timed out after 1 minutes
aes_control_fi 91688908082632589976918233195053239325378622808765100016548992788617939524266 None
Job timed out after 1 minutes
aes_control_fi 42074857395314839140415439325417828384435299605039057937589337865027528550604 None
Job timed out after 1 minutes
aes_control_fi 111327690119853147649504445961705386400381436103474401680345861712866596037764 None
Job timed out after 1 minutes
aes_control_fi 1821925711108585608411566801907529460347179579217588527367390334485028083552 None
Job timed out after 1 minutes
aes_control_fi 69302282767092701171408751168338026548608343680097357740209816654737804807450 None
Job timed out after 1 minutes
aes_control_fi 41456261401512219676242893113872456222666724682686901547404946265881676526304 None
Job timed out after 1 minutes
aes_cipher_fi 42809570923968501815264481861251282013418945964630938550371553013114613844382 None
Job timed out after 1 minutes
aes_control_fi 5546628838540786882652984070363166566979975622846815178938182475848313307315 None
Job timed out after 1 minutes
aes_cipher_fi 36286375911566860497966827583341305916839502264992783732021679657286465369511 None
Job timed out after 1 minutes
aes_control_fi 1078894263906282237270576295232096006487513848375414093515688941482697410765 None
Job timed out after 1 minutes
aes_control_fi 25586032500608608833957099015006935781658799645533443775057528001201139477819 None
Job timed out after 1 minutes
aes_cipher_fi 92058427190739287841156010916469273811342944575862898215681381726566864796091 None
Job timed out after 1 minutes
aes_control_fi 40634085536761158807314862005946089675634653381755213867329252933905213496226 None
Job timed out after 1 minutes
aes_cipher_fi 85577139878411247521460383428360087593426807281340767608722545135690440028609 None
Job timed out after 1 minutes
aes_cipher_fi 108808697475394903916136454626462125027897041309458383248450437378071104981847 None
Job timed out after 1 minutes
aes_cipher_fi 86316041983806611548885057737455262202811600201714250893324490582623719280150 None
Job timed out after 1 minutes
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!
aes_cipher_fi 34778771286637963504172974821519258128834281968725666900095892346049823266481 143
UVM_FATAL @ 10015312135 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10015312135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 18562281429354608368755196697937422453082045628121859561227780489838587793267 140
UVM_FATAL @ 10006259129 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006259129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 100440898763297220072466221934792710638927437031797256452278083538805473683324 142
UVM_FATAL @ 10013474126 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10013474126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 66520326007604422654708875414075707058559916896359370673329665311175405825158 141
UVM_FATAL @ 10026749256 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10026749256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 55721423848938910815114541801399551386561365798413283949789989960431623798867 138
UVM_FATAL @ 10005129190 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005129190 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 35771155672310502834607218882825153757123357512726573001862093602466781839585 134
UVM_FATAL @ 10051479937 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10051479937 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 21372218988764769735641435341114154717266879517293706670543155012809970602517 145
UVM_FATAL @ 10060938853 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10060938853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 75633563379057829126293849271057659572881749214117091136607610567852133274377 138
UVM_FATAL @ 10013640296 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10013640296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 100010914416266248292284904818672760953226111572982366236097470046135542893938 140
UVM_FATAL @ 10026378405 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10026378405 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1129): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS)
aes_fi 28558880947992213048680949030981557745350609222090126902324863124456954898397 547
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1129): (time 6486597 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 6476597 PS)
($past(iv_q) != $past(state_done_transposed, 2) ^ $past(data_in_prev_q, 2)))
|
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_masked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1135): (time 6486597 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscIv has failed (2 cycles, starting 6476597 PS)
UVM_ERROR @ 6486597 ps: (aes_core.sv:1129) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3)
aes_control_fi 24655319861662566941440085726432745299429677689252913655877428448843622902167 129
UVM_FATAL @ 10022433622 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x38781d84, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10022433622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---