Simulation Results: aes

 
23/01/2026 17:05:23 sha: b61f0df json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 94.79 %
  • code
  • 88.43 %
  • assert
  • 97.94 %
  • func
  • 98.00 %
  • block
  • 92.73 %
  • line
  • 94.03 %
  • branch
  • 84.54 %
  • toggle
  • 97.99 %
  • FSM
  • 77.16 %
Validation stages
V1
100.00%
V2
99.77%
V2S
93.76%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 217.768us 1 1 100.00
smoke 50 50 100.00
aes_smoke 4.000s 284.943us 50 50 100.00
csr_hw_reset 5 5 100.00
aes_csr_hw_reset 6.000s 89.228us 5 5 100.00
csr_rw 20 20 100.00
aes_csr_rw 6.000s 81.675us 20 20 100.00
csr_bit_bash 5 5 100.00
aes_csr_bit_bash 9.000s 983.723us 5 5 100.00
csr_aliasing 5 5 100.00
aes_csr_aliasing 7.000s 226.961us 5 5 100.00
csr_mem_rw_with_rand_reset 20 20 100.00
aes_csr_mem_rw_with_rand_reset 5.000s 129.781us 20 20 100.00
regwen_csr_and_corresponding_lockable_csr 25 25 100.00
aes_csr_rw 6.000s 81.675us 20 20 100.00
aes_csr_aliasing 7.000s 226.961us 5 5 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 150 150 100.00
aes_smoke 4.000s 284.943us 50 50 100.00
aes_config_error 4.000s 152.665us 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
key_length 150 150 100.00
aes_smoke 4.000s 284.943us 50 50 100.00
aes_config_error 4.000s 152.665us 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
back2back 100 100 100.00
aes_stress 4.000s 140.650us 50 50 100.00
aes_b2b 8.000s 774.496us 50 50 100.00
backpressure 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
multi_message 200 200 100.00
aes_smoke 4.000s 284.943us 50 50 100.00
aes_config_error 4.000s 152.665us 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
aes_alert_reset 5.000s 286.059us 50 50 100.00
failure_test 148 150 98.67
aes_man_cfg_err 3.000s 71.983us 48 50 96.00
aes_config_error 4.000s 152.665us 50 50 100.00
aes_alert_reset 5.000s 286.059us 50 50 100.00
trigger_clear_test 49 50 98.00
aes_clear 4.000s 200.130us 49 50 98.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 6.000s 391.578us 1 1 100.00
reset_recovery 50 50 100.00
aes_alert_reset 5.000s 286.059us 50 50 100.00
stress 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
sideload 100 100 100.00
aes_stress 4.000s 140.650us 50 50 100.00
aes_sideload 5.000s 328.533us 50 50 100.00
deinitialization 50 50 100.00
aes_deinit 4.000s 179.629us 50 50 100.00
stress_all 10 10 100.00
aes_stress_all 20.000s 1689.195us 10 10 100.00
alert_test 50 50 100.00
aes_alert_test 3.000s 59.388us 50 50 100.00
tl_d_oob_addr_access 20 20 100.00
aes_tl_errors 8.000s 145.183us 20 20 100.00
tl_d_illegal_access 20 20 100.00
aes_tl_errors 8.000s 145.183us 20 20 100.00
tl_d_outstanding_access 50 50 100.00
aes_csr_hw_reset 6.000s 89.228us 5 5 100.00
aes_csr_rw 6.000s 81.675us 20 20 100.00
aes_csr_aliasing 7.000s 226.961us 5 5 100.00
aes_same_csr_outstanding 7.000s 200.519us 20 20 100.00
tl_d_partial_access 50 50 100.00
aes_csr_hw_reset 6.000s 89.228us 5 5 100.00
aes_csr_rw 6.000s 81.675us 20 20 100.00
aes_csr_aliasing 7.000s 226.961us 5 5 100.00
aes_same_csr_outstanding 7.000s 200.519us 20 20 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 50 50 100.00
aes_reseed 4.000s 346.559us 50 50 100.00
fault_inject 645 700 92.14
aes_fi 4.000s 213.278us 49 50 98.00
aes_control_fi 50.000s 200000.000us 271 300 90.33
aes_cipher_fi 38.000s 10012.363us 325 350 92.86
shadow_reg_update_error 20 20 100.00
aes_shadow_reg_errors 6.000s 122.643us 20 20 100.00
shadow_reg_read_clear_staged_value 20 20 100.00
aes_shadow_reg_errors 6.000s 122.643us 20 20 100.00
shadow_reg_storage_error 20 20 100.00
aes_shadow_reg_errors 6.000s 122.643us 20 20 100.00
shadowed_reset_glitch 20 20 100.00
aes_shadow_reg_errors 6.000s 122.643us 20 20 100.00
shadow_reg_update_error_with_csr_rw 20 20 100.00
aes_shadow_reg_errors_with_csr_rw 7.000s 117.748us 20 20 100.00
tl_intg_err 25 25 100.00
aes_tl_intg_err 8.000s 340.465us 20 20 100.00
aes_sec_cm 5.000s 640.852us 5 5 100.00
sec_cm_bus_integrity 20 20 100.00
aes_tl_intg_err 8.000s 340.465us 20 20 100.00
sec_cm_lc_escalate_en_intersig_mubi 50 50 100.00
aes_alert_reset 5.000s 286.059us 50 50 100.00
sec_cm_main_config_shadow 20 20 100.00
aes_shadow_reg_errors 6.000s 122.643us 20 20 100.00
sec_cm_gcm_config_shadow 20 20 100.00
aes_shadow_reg_errors 6.000s 122.643us 20 20 100.00
sec_cm_main_config_sparse 217 220 98.64
aes_smoke 4.000s 284.943us 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
aes_alert_reset 5.000s 286.059us 50 50 100.00
aes_core_fi 32.000s 10005.005us 67 70 95.71
sec_cm_gcm_config_sparse 100 100 100.00
aes_config_error 4.000s 152.665us 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
sec_cm_aux_config_shadow 20 20 100.00
aes_shadow_reg_errors 6.000s 122.643us 20 20 100.00
sec_cm_aux_config_regwen 100 100 100.00
aes_readability 3.000s 56.908us 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
sec_cm_key_sideload 100 100 100.00
aes_stress 4.000s 140.650us 50 50 100.00
aes_sideload 5.000s 328.533us 50 50 100.00
sec_cm_key_sw_unreadable 50 50 100.00
aes_readability 3.000s 56.908us 50 50 100.00
sec_cm_data_reg_sw_unreadable 50 50 100.00
aes_readability 3.000s 56.908us 50 50 100.00
sec_cm_key_sec_wipe 50 50 100.00
aes_readability 3.000s 56.908us 50 50 100.00
sec_cm_iv_config_sec_wipe 50 50 100.00
aes_readability 3.000s 56.908us 50 50 100.00
sec_cm_data_reg_sec_wipe 50 50 100.00
aes_readability 3.000s 56.908us 50 50 100.00
sec_cm_data_reg_key_sca 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
sec_cm_key_masking 50 50 100.00
aes_stress 4.000s 140.650us 50 50 100.00
sec_cm_main_fsm_sparse 49 50 98.00
aes_fi 4.000s 213.278us 49 50 98.00
sec_cm_main_fsm_redun 695 750 92.67
aes_fi 4.000s 213.278us 49 50 98.00
aes_control_fi 50.000s 200000.000us 271 300 90.33
aes_cipher_fi 38.000s 10012.363us 325 350 92.86
aes_ctr_fi 3.000s 52.125us 50 50 100.00
sec_cm_cipher_fsm_sparse 49 50 98.00
aes_fi 4.000s 213.278us 49 50 98.00
sec_cm_cipher_fsm_redun 645 700 92.14
aes_fi 4.000s 213.278us 49 50 98.00
aes_control_fi 50.000s 200000.000us 271 300 90.33
aes_cipher_fi 38.000s 10012.363us 325 350 92.86
sec_cm_cipher_ctr_redun 325 350 92.86
aes_cipher_fi 38.000s 10012.363us 325 350 92.86
sec_cm_ctr_fsm_sparse 49 50 98.00
aes_fi 4.000s 213.278us 49 50 98.00
sec_cm_ctr_fsm_redun 370 400 92.50
aes_fi 4.000s 213.278us 49 50 98.00
aes_control_fi 50.000s 200000.000us 271 300 90.33
aes_ctr_fi 3.000s 52.125us 50 50 100.00
sec_cm_ctrl_sparse 695 750 92.67
aes_fi 4.000s 213.278us 49 50 98.00
aes_control_fi 50.000s 200000.000us 271 300 90.33
aes_cipher_fi 38.000s 10012.363us 325 350 92.86
aes_ctr_fi 3.000s 52.125us 50 50 100.00
sec_cm_main_fsm_global_esc 50 50 100.00
aes_alert_reset 5.000s 286.059us 50 50 100.00
sec_cm_main_fsm_local_esc 695 750 92.67
aes_fi 4.000s 213.278us 49 50 98.00
aes_control_fi 50.000s 200000.000us 271 300 90.33
aes_cipher_fi 38.000s 10012.363us 325 350 92.86
aes_ctr_fi 3.000s 52.125us 50 50 100.00
sec_cm_cipher_fsm_local_esc 695 750 92.67
aes_fi 4.000s 213.278us 49 50 98.00
aes_control_fi 50.000s 200000.000us 271 300 90.33
aes_cipher_fi 38.000s 10012.363us 325 350 92.86
aes_ctr_fi 3.000s 52.125us 50 50 100.00
sec_cm_ctr_fsm_local_esc 370 400 92.50
aes_fi 4.000s 213.278us 49 50 98.00
aes_control_fi 50.000s 200000.000us 271 300 90.33
aes_ctr_fi 3.000s 52.125us 50 50 100.00
sec_cm_data_reg_local_esc 645 700 92.14
aes_fi 4.000s 213.278us 49 50 98.00
aes_control_fi 50.000s 200000.000us 271 300 90.33
aes_cipher_fi 38.000s 10012.363us 325 350 92.86
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 10 0.00
aes_stress_all_with_rand_reset 17.000s 441.983us 0 10 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_base_vseq.sv:74) [aes_stress_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 73067620273962579113764840237889182589735289535757691421360529535558912984579 141
UVM_FATAL @ 15610463 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 15610463 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 37287905892618787095185419466626153833402296854538810991790210157867148852688 659
UVM_FATAL @ 1783465587 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_stress_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 1783465587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 2755500368935389886978461647029675075906680021218168851673670554773590099341 843
UVM_ERROR @ 2166896088 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 2166896088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 73625211601057587672914897258549810436116519531147142445067106844481084320223 571
UVM_ERROR @ 803061424 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 803061424 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 102235595268832023884966827316457043101992768623959931118456187101837353350395 1388
UVM_ERROR @ 441983499 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 441983499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 88636120266341911278295562826034624021707257195087904607095175745904838618399 1067
UVM_ERROR @ 743937422 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 743937422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 53576881822166466343698558271621141822351095567933760643765820563462862434165 335
UVM_ERROR @ 57474791 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 57474791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes
aes_cipher_fi 28056272585782443756525969218823538362058291877909282374808621005654989026435 None
Job timed out after 1 minutes
aes_cipher_fi 98527937046398154902526846037312190687620171711246052753462061024634834598145 None
Job timed out after 1 minutes
aes_control_fi 46261550983539570204000918069186603535482918305117826810198656876643797005494 None
Job timed out after 1 minutes
aes_cipher_fi 73358554187074022564237990489495182705082559855928096036213480085404109649161 None
Job timed out after 1 minutes
aes_control_fi 104148103772637424420631109801271014819799256712766480736284951459516492545998 None
Job timed out after 1 minutes
aes_control_fi 582901637804600377374355546457700235145239426792412536393074835788459730077 None
Job timed out after 1 minutes
aes_cipher_fi 108255359933395437599039006653590668662162493007372531581807953977480982942664 None
Job timed out after 1 minutes
aes_control_fi 36751739038968247845503734491976361563399433002342378497672322470631120573367 None
Job timed out after 1 minutes
aes_control_fi 75894592797461328423974759832273941394439538297153509220708100508613863531637 None
Job timed out after 1 minutes
aes_control_fi 43368884473949347870328587290871696739809943735085465350041630365866273666556 None
Job timed out after 1 minutes
aes_cipher_fi 87973404863848253275472166685232214681004348026451891869135885125436356843207 None
Job timed out after 1 minutes
aes_cipher_fi 81223410990008033267459338396282309285231903383763782326271177061092696987454 None
Job timed out after 1 minutes
aes_cipher_fi 24221031004899338346967235741988607688958110173227544834706006705701306526773 None
Job timed out after 1 minutes
aes_control_fi 77336140460530960944460150085590892265808053776290061385301602627511260141473 None
Job timed out after 1 minutes
aes_cipher_fi 76805225474046783050576736474039758047727169424635635046575531754092494308997 None
Job timed out after 1 minutes
aes_cipher_fi 79217881906417498211096052508169747718426954451731466038432107781373603129509 None
Job timed out after 1 minutes
aes_control_fi 87223217129125142359543002980172472412288036333784913890113042270070550929991 None
Job timed out after 1 minutes
aes_control_fi 91575165826180411564371907732854617319188616262327268583103390964137070873865 None
Job timed out after 1 minutes
aes_control_fi 110619259526081568936597629646904213233072510061320892255045165206819539046298 None
Job timed out after 1 minutes
aes_control_fi 91120500529900679596130945167275873997820557109312819594068725362523965219314 None
Job timed out after 1 minutes
aes_control_fi 111782098909333595412187792555632513566923189159812017774137201550114462248957 None
Job timed out after 1 minutes
aes_control_fi 79951624677281736161611766004428004786528113571303500760415620414339651001459 None
Job timed out after 1 minutes
aes_control_fi 87259216520474789771217598513042503896615001749837584474106422910498006715705 None
Job timed out after 1 minutes
aes_control_fi 420301626654507030377302574957825690485824497848424937208144003615352805996 None
Job timed out after 1 minutes
aes_cipher_fi 40452607613553211840303263566411950852218007041130464142995458945774560097906 None
Job timed out after 1 minutes
UVM_ERROR (cip_base_vseq.sv:1230) [aes_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
aes_stress_all_with_rand_reset 110410980032346065638089374555090127051845953575619801197042890552184500042518 161
UVM_ERROR @ 387323443 ps: (cip_base_vseq.sv:1230) [uvm_test_top.env.virtual_sequencer.aes_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 387323443 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:74) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 15108328408501666129022883393456804684586181658298708416021630971652228346677 201
UVM_FATAL @ 71403185 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 71403185 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_core_fi_vseq.sv:66) [aes_core_fi_vseq] wait timeout occurred!
aes_core_fi 77014127439975027774657943704960446653431623264506424497237188189045629582156 145
UVM_FATAL @ 10008429799 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008429799 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 10823513633230979684673244744716617493967096204153633948859955846906885555217 144
UVM_FATAL @ 10013134720 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10013134720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_core_fi 90395905087525587868274767542957148671297982068219863619252629374837433763559 141
UVM_FATAL @ 10005004888 ps: (aes_core_fi_vseq.sv:66) [uvm_test_top.env.virtual_sequencer.aes_core_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005004888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_base_vseq.sv:74) [aes_reseed_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 3027364891538458897431861823489841651107553710216475109929941562191831648346 173
UVM_FATAL @ 283074306 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_reseed_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 283074306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_*/rtl/aes_core.sv,1129): Assertion AesSecCmDataRegLocalEscDataOut has failed (* cycles, starting * PS)
aes_fi 63801593380124285637784220628843962544467954632315290831784018460421489950217 2832
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_aes_1.0/rtl/aes_core.sv,1129): (time 45702975 PS) Assertion tb.dut.u_aes_core.AesSecCmDataRegLocalEscDataOut has failed (2 cycles, starting 45652975 PS)
UVM_ERROR @ 45702975 ps: (aes_core.sv:1129) [ASSERT FAILED] AesSecCmDataRegLocalEscDataOut
UVM_INFO @ 45702975 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_scoreboard.sv:614) scoreboard [scoreboard] # *
aes_clear 77604441314169276078328027317800645099591441990398315090040561493226259195480 3942
UVM_FATAL @ 14544763 ps: (aes_scoreboard.sv:614) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] # 0
TEST FAILED MESSAGES DID NOT MATCH
0 28 7c 13 0
1 d7 f7 3f 0
UVM_FATAL (aes_manual_config_err_vseq.sv:71) virtual_sequencer [aes_manual_config_err_vseq] WAS ABLE TO TRIGGER OPERATION WITH ILLEGAL MODE
aes_man_cfg_err 30656407749251186950784079082854361380368780781305456737468308647866287837554 131
UVM_FATAL @ 18628551 ps: (aes_manual_config_err_vseq.sv:71) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_manual_config_err_vseq] WAS ABLE TO TRIGGER OPERATION WITH ILLEGAL MODE
UVM_INFO @ 18628551 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_man_cfg_err 91425430158429824413687328169061710812022925099037575884362936839055370710092 131
UVM_FATAL @ 4249387 ps: (aes_manual_config_err_vseq.sv:71) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_manual_config_err_vseq] WAS ABLE TO TRIGGER OPERATION WITH ILLEGAL MODE
UVM_INFO @ 4249387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred!
aes_cipher_fi 66164759257290727053460347957988708832356585629465018932375386086643761477692 132
UVM_FATAL @ 10003833534 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003833534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 3033199200242807063043442679155856782657974802287595504766178586597515295630 135
UVM_FATAL @ 10020677018 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10020677018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 40366443652990781936800988450766065280341087513404699644248712125825867960875 148
UVM_FATAL @ 10006689217 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006689217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 3401244331355665761161574428547936434417737783837252557860595104547652217806 136
UVM_FATAL @ 10009279793 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009279793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 15487379770647111416510784664627526958179713133555906252846917228282460708169 133
UVM_FATAL @ 10006832339 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006832339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 5099089864807678218552583219996296838246710142352161541168859154920651295652 146
UVM_FATAL @ 10006685648 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10006685648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 50901281058014679990309396294673122110640767042996470822814453321154335368523 131
UVM_FATAL @ 10008633844 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008633844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 104273858503756423732697439818789421206054710545253060218590216649795945101829 143
UVM_FATAL @ 10010546319 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010546319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 10336668412351816356043370819970154690717374507489076064199179571048918288858 141
UVM_FATAL @ 10012362888 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012362888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 22732715828816201515338390422330771895237900892347777263096003258037823726558 148
UVM_FATAL @ 10007399090 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007399090 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 23598537454791381832258947473081217477128727923341248908627854836817458388843 131
UVM_FATAL @ 10025896059 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10025896059 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 96231424256417626523184490040509349047857609974939100143676996622435340866687 134
UVM_FATAL @ 10009604461 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009604461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 20007804079665398583755446203321009964526694599633702197601821938874945937246 135
UVM_FATAL @ 10008006614 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008006614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 25371482521255030510193735952679383217279815616017453751128981555463959283055 145
UVM_FATAL @ 10005651184 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005651184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_cipher_fi 65940752445152773547227932920174259972020706252384932358186879954808249078374 132
UVM_FATAL @ 10003822101 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003822101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred!
aes_control_fi 30195003088434491329400369390114915502021663562138546855319956038134379357293 142
UVM_FATAL @ 10012841791 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10012841791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 9099759992151038427507046689307345125895755266360889681973403320220535859017 137
UVM_FATAL @ 10005343648 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005343648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 56982995356174026890977015477680859093662720766627633196193886330295906471783 131
UVM_FATAL @ 10003042460 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003042460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 112374193292007899863938725109761585231160156211926459825926979138433702933762 131
UVM_FATAL @ 10010447101 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010447101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 70878747178228530702509303682902367997328295093027628576120372539731206311467 135
UVM_FATAL @ 10005289779 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10005289779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 27501617092790898301301579365318182424834307586599126437614852427179983257983 139
UVM_FATAL @ 10003040914 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003040914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 38307588864729791377221384252446427776016434607112605868888864758817658226558 143
UVM_FATAL @ 10002914149 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10002914149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 101045491614618936364854780225727591848940496194346807671009806772921237540142 137
UVM_FATAL @ 10008261379 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10008261379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 24640924944839209557172640430086506923945570163853613060436818191545824123204 138
UVM_FATAL @ 10009479238 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10009479238 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 78620034203574796506466658324213227241735172286672769561681133439092748380617 147
UVM_FATAL @ 10004082052 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10004082052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 29294781429736119817980469187111646985095622219656499257516768190364842180309 141
UVM_FATAL @ 10007332679 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10007332679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 2402287460786817257366288180828015142100157084218250048162363040261446470925 146
UVM_FATAL @ 10010494108 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10010494108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue
aes_control_fi 47221394747201920673812249155215565769662953194115611606378150495226375513582 139
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_control_fi 70914529689756129590860572678766495938702002891024631792672587741881053094720 142
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---