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---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"43.sram_ctrl_readback_err.26834631538853768585557494695062681613845314961175531433965623031977216849731","seed":26834631538853768585557494695062681613845314961175531433965623031977216849731,"line":103,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/43.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 688147404 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x18) != exp (0x7c)\n","UVM_INFO @ 688147404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"47.sram_ctrl_readback_err.105363214778777643944448899578321566810727271169627243029904298213834831427978","seed":105363214778777643944448899578321566810727271169627243029904298213834831427978,"line":103,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/47.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 1344229531 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x40) != exp (0x7b)\n","UVM_INFO @ 1344229531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"49.sram_ctrl_readback_err.39436516644561348117629318205382127433813105610928245007894604222803007498212","seed":39436516644561348117629318205382127433813105610928245007894604222803007498212,"line":103,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/49.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 688107922 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x1f) != exp (0x71)\n","UVM_INFO @ 688107922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: *":[{"name":"sram_ctrl_sec_cm","qual_name":"0.sram_ctrl_sec_cm.61427689122483610637725296032305311249427431992682160406998145714056090503137","seed":61427689122483610637725296032305311249427431992682160406998145714056090503137,"line":105,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/0.sram_ctrl_sec_cm/latest/run.log","log_context":["UVM_ERROR @   1900315 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0 \n","UVM_INFO @   1900315 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_sec_cm","qual_name":"1.sram_ctrl_sec_cm.42022992673436347609743690335152769718781410493695229969460834646179855888122","seed":42022992673436347609743690335152769718781410493695229969460834646179855888122,"line":107,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/1.sram_ctrl_sec_cm/latest/run.log","log_context":["UVM_ERROR @   6179084 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0 \n","UVM_INFO @   6179084 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_sec_cm","qual_name":"2.sram_ctrl_sec_cm.68387693684581661490791604052610986567797289221326932964696161548399681066618","seed":68387693684581661490791604052610986567797289221326932964696161548399681066618,"line":105,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/2.sram_ctrl_sec_cm/latest/run.log","log_context":["UVM_ERROR @  10343009 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0 \n","UVM_INFO @  10343009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_sec_cm","qual_name":"3.sram_ctrl_sec_cm.107752425601472170428939880131695120954797206815586856608542405080627371019046","seed":107752425601472170428939880131695120954797206815586856608542405080627371019046,"line":105,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/3.sram_ctrl_sec_cm/latest/run.log","log_context":["UVM_ERROR @   6181189 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0 \n","UVM_INFO @   6181189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_sec_cm","qual_name":"4.sram_ctrl_sec_cm.48459954436258821527800264718616157589900838161132611793035611912399189988302","seed":48459954436258821527800264718616157589900838161132611793035611912399189988302,"line":105,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/4.sram_ctrl_sec_cm/latest/run.log","log_context":["UVM_ERROR @   3496230 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0 \n","UVM_INFO @   3496230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Offending 'reqfifo_rvalid'":[{"name":"sram_ctrl_mubi_enc_err","qual_name":"2.sram_ctrl_mubi_enc_err.71123217707954609614698988487120484081927678841105202361184878398420478825138","seed":71123217707954609614698988487120484081927678841105202361184878398420478825138,"line":109,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/2.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 665846588 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 665846588 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"6.sram_ctrl_mubi_enc_err.51473868735895203645184569683166276498171754247070468071732490288345829041368","seed":51473868735895203645184569683166276498171754247070468071732490288345829041368,"line":109,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/6.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 777886083 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 777886083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"10.sram_ctrl_mubi_enc_err.71647509773124577012662551097748866954069995426932354704783074341960834890326","seed":71647509773124577012662551097748866954069995426932354704783074341960834890326,"line":109,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/10.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 6580423154 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 6580423154 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"14.sram_ctrl_mubi_enc_err.79170027450739132137934242553952324236056588091965887255010109625232390605089","seed":79170027450739132137934242553952324236056588091965887255010109625232390605089,"line":109,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/14.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 694002466 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 694002466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"25.sram_ctrl_mubi_enc_err.71963354742730639285235752788713138819469703039747441446086539346854195091614","seed":71963354742730639285235752788713138819469703039747441446086539346854195091614,"line":109,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/25.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 690671733 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 690671733 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"31.sram_ctrl_mubi_enc_err.111462727112325582947684549257049704642900628150331198520575176737356268872245","seed":111462727112325582947684549257049704642900628150331198520575176737356268872245,"line":109,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/31.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 1390093002 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 1390093002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"32.sram_ctrl_mubi_enc_err.105220271654553929023542131443856773729146341508695914805674196245297315200213","seed":105220271654553929023542131443856773729146341508695914805674196245297315200213,"line":109,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/32.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 1401303864 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 1401303864 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"37.sram_ctrl_mubi_enc_err.83608683958390904774862912290904745598345130317677530799180694809350835734357","seed":83608683958390904774862912290904745598345130317677530799180694809350835734357,"line":109,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/37.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 4378295628 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 4378295628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}]}},"passed":1897,"total":1950,"percent":97.28205128205128}