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[kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"kmac_stress_all_with_rand_reset","qual_name":"6.kmac_stress_all_with_rand_reset.12836754879054031265473292697564171975706201113117578102182457916606041713352","seed":12836754879054031265473292697564171975706201113117578102182457916606041713352,"line":95,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/6.kmac_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2014493648 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 2014493648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6)":[{"name":"kmac_sideload_invalid","qual_name":"7.kmac_sideload_invalid.79960092222708486659930439695234623037790434057842031670525480352778837189912","seed":79960092222708486659930439695234623037790434057842031670525480352778837189912,"line":83,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/7.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10069097415 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x6a54000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)\n","UVM_INFO @ 10069097415 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"28.kmac_sideload_invalid.16339210668300448155107852410660989479203541830210139053061687988905415794410","seed":16339210668300448155107852410660989479203541830210139053061687988905415794410,"line":82,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/28.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10288536396 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x5b192000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)\n","UVM_INFO @ 10288536396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7)":[{"name":"kmac_sideload_invalid","qual_name":"20.kmac_sideload_invalid.91420677352288149143041216383117932064753572772838900506565534774341935479834","seed":91420677352288149143041216383117932064753572772838900506565534774341935479834,"line":83,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/20.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10104419879 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf5bc3000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)\n","UVM_INFO @ 10104419879 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4)":[{"name":"kmac_sideload_invalid","qual_name":"25.kmac_sideload_invalid.105054112507869940477377750151106847953791123203752814794083558265172842826880","seed":105054112507869940477377750151106847953791123203752814794083558265172842826880,"line":80,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/25.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10096982573 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x6ef54000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)\n","UVM_INFO @ 10096982573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=12)":[{"name":"kmac_sideload_invalid","qual_name":"32.kmac_sideload_invalid.14825742159023982256019281502540426837899235660971098010914539044918506526187","seed":14825742159023982256019281502540426837899235660971098010914539044918506526187,"line":89,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/32.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10259507900 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x79aa0000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)\n","UVM_INFO @ 10259507900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"kmac_sideload_invalid","qual_name":"33.kmac_sideload_invalid.35272656842748548433494344745062858396371832677143574296781364891814206113960","seed":35272656842748548433494344745062858396371832677143574296781364891814206113960,"line":90,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/33.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10220759092 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa2ec5000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)\n","UVM_INFO @ 10220759092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3)":[{"name":"kmac_sideload_invalid","qual_name":"38.kmac_sideload_invalid.1173393303406361272701985998659611148205986736557892350661061881701510218534","seed":1173393303406361272701985998659611148205986736557892350661061881701510218534,"line":79,"log_path":"/nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/38.kmac_sideload_invalid/latest/run.log","log_context":["UVM_FATAL @ 10022190324 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x1a8dc000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)\n","UVM_INFO @ 10022190324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":1476,"total":1485,"percent":99.39393939393939}