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---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"3.sram_ctrl_readback_err.75947105277867075682106701708995335971688303954962439326126629951256649843999","seed":75947105277867075682106701708995335971688303954962439326126629951256649843999,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/3.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 2991983122 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x3a) != exp (0x5e)\n","UVM_INFO @ 2991983122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"20.sram_ctrl_readback_err.9368659767162378673982081729661903222042755829188641550391254526540179185511","seed":9368659767162378673982081729661903222042755829188641550391254526540179185511,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/20.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 699035723 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x2b) != exp (0x10)\n","UVM_INFO @ 699035723 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"22.sram_ctrl_readback_err.34672172180372039031612184607770268431341715268465004565826261711826403942132","seed":34672172180372039031612184607770268431341715268465004565826261711826403942132,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/22.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 673947963 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x4a) != exp (0x2)\n","UVM_INFO @ 673947963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"24.sram_ctrl_readback_err.3891624045672446824149111103261960127008857559249109650482559897665719832712","seed":3891624045672446824149111103261960127008857559249109650482559897665719832712,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/24.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 5482728968 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x46) != exp (0x44)\n","UVM_INFO @ 5482728968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"25.sram_ctrl_readback_err.33882626306294118931910791157742832057635706384237627711086328288959377543464","seed":33882626306294118931910791157742832057635706384237627711086328288959377543464,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/25.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 5056060019 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x4f) != exp (0x9)\n","UVM_INFO @ 5056060019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"26.sram_ctrl_readback_err.82277010462496408757216939118552258363029925496858812709837407087535576045072","seed":82277010462496408757216939118552258363029925496858812709837407087535576045072,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/26.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 2344757225 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x3e) != exp (0xf)\n","UVM_INFO @ 2344757225 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"32.sram_ctrl_readback_err.41872136689913904570756302291136551069774697377684298654576541187406874935764","seed":41872136689913904570756302291136551069774697377684298654576541187406874935764,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/32.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 2738008929 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x36) != exp (0x7b)\n","UVM_INFO @ 2738008929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"37.sram_ctrl_readback_err.74056482038536099942658290054427975399237085254786502342828128174566041348907","seed":74056482038536099942658290054427975399237085254786502342828128174566041348907,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/37.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 677408351 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x31) != exp (0xb)\n","UVM_INFO @ 677408351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"44.sram_ctrl_readback_err.54742579970422906408349495514769518209210064877887866608530202241593077961787","seed":54742579970422906408349495514769518209210064877887866608530202241593077961787,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/44.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 2628372773 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0xa) != exp (0x20)\n","UVM_INFO @ 2628372773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_readback_err","qual_name":"47.sram_ctrl_readback_err.1797279310634283862940704711220741348546525624665356126457734814644601735612","seed":1797279310634283862940704711220741348546525624665356126457734814644601735612,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/47.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 687805650 ps: (cip_tl_seq_item.sv:227) [req] d_user.data_intg act (0x72) != exp (0x50)\n","UVM_INFO @ 687805650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 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---\n","\n","\n"]},{"name":"sram_ctrl_sec_cm","qual_name":"3.sram_ctrl_sec_cm.68238218267863820550127590206398105302399796993001700293380131564151328168275","seed":68238218267863820550127590206398105302399796993001700293380131564151328168275,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/3.sram_ctrl_sec_cm/latest/run.log","log_context":["UVM_ERROR @  36562157 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0 \n","UVM_INFO @  36562157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_sec_cm","qual_name":"4.sram_ctrl_sec_cm.97192788156380562513626704618379624356886043824789912207662748638384673639369","seed":97192788156380562513626704618379624356886043824789912207662748638384673639369,"line":99,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/4.sram_ctrl_sec_cm/latest/run.log","log_context":["UVM_ERROR @   5017593 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0 \n","UVM_INFO @   5017593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Offending '(!$isunknown(rdata_o))'":[{"name":"sram_ctrl_sec_cm","qual_name":"1.sram_ctrl_sec_cm.111335012869622380265758567774625180544610270674629645626853157701296819961002","seed":111335012869622380265758567774625180544610270674629645626853157701296819961002,"line":99,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/1.sram_ctrl_sec_cm/latest/run.log","log_context":["\tOffending '(!$isunknown(rdata_o))'\n","UVM_ERROR @   2438000 ps: (prim_fifo_sync.sv:224) [ASSERT FAILED] DataKnown_A\n","UVM_INFO @   2438000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"Offending 'reqfifo_rvalid'":[{"name":"sram_ctrl_mubi_enc_err","qual_name":"2.sram_ctrl_mubi_enc_err.50248515278479755048679202334383546067136569266477096907105200151064195172747","seed":50248515278479755048679202334383546067136569266477096907105200151064195172747,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/2.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 701144755 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 701144755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"14.sram_ctrl_mubi_enc_err.9889860945680119329942347557531167018190032849709425729725393994808944926024","seed":9889860945680119329942347557531167018190032849709425729725393994808944926024,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/14.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 680858564 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 680858564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"26.sram_ctrl_mubi_enc_err.14692393894974411432045756033435071907071031103544540871493088784043564014751","seed":14692393894974411432045756033435071907071031103544540871493088784043564014751,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/26.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 4756149086 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 4756149086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"29.sram_ctrl_mubi_enc_err.29710491049842182745080593624358546559946334073074301907084752651864910028405","seed":29710491049842182745080593624358546559946334073074301907084752651864910028405,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/29.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 687381052 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 687381052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"31.sram_ctrl_mubi_enc_err.3963491112781744124560174460799225622330339897676952168634424176286516539844","seed":3963491112781744124560174460799225622330339897676952168634424176286516539844,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/31.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 659277562 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 659277562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"47.sram_ctrl_mubi_enc_err.92324620370902021960941515862605735531052214198498928579414264919094345500587","seed":92324620370902021960941515862605735531052214198498928579414264919094345500587,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/47.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["\tOffending 'reqfifo_rvalid'\n","UVM_ERROR @ 677188296 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 677188296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"Offending '(depth_o <= *'(Depth))'":[{"name":"sram_ctrl_sec_cm","qual_name":"2.sram_ctrl_sec_cm.110558431260950510751431905882085314213869728473549109111590489791840938140406","seed":110558431260950510751431905882085314213869728473549109111590489791840938140406,"line":99,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/2.sram_ctrl_sec_cm/latest/run.log","log_context":["\tOffending '(depth_o <= 2'(Depth))'\n","UVM_ERROR @   5459014 ps: (prim_fifo_sync.sv:211) [ASSERT FAILED] depthShallNotExceedParamDepth\n","UVM_INFO @   5459014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_ERROR (cip_base_scoreboard.sv:575) scoreboard [scoreboard] On interface sram_ctrl_prim_reg_block, item had unexpected d_error value(predicted *, but saw *).":[{"name":"sram_ctrl_readback_err","qual_name":"13.sram_ctrl_readback_err.112596275314639242043074393129715305719731161945917840939014830283358538296107","seed":112596275314639242043074393129715305719731161945917840939014830283358538296107,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/13.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 669691901 ps: (cip_base_scoreboard.sv:575) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] On interface sram_ctrl_prim_reg_block, item had unexpected d_error value(predicted 0, but saw 1).\n"," TL item was: req: (cip_tl_seq_item@5129) { a_addr: 'hef35cc2c  a_data: 'h4e  a_mask: 'hf  a_size: 'h2  a_param: 'h0  a_source: 'hec  a_opcode: 'h0  a_user: 'h24d01  d_param: 'h0  d_source: 'hec  d_data: 'hffffffff  d_size: 'h2  d_opcode: 'h0  d_error: 'h1  d_sink: 'h0  d_user: 'h1f2a  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  } \n"," Reasons for predicted error: '{}.\n","UVM_INFO @ 669691901 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]},{"name":"sram_ctrl_readback_err","qual_name":"34.sram_ctrl_readback_err.67678384026507577109700418539224696611386707721982394089372585412938922938866","seed":67678384026507577109700418539224696611386707721982394089372585412938922938866,"line":98,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/34.sram_ctrl_readback_err/latest/run.log","log_context":["UVM_ERROR @ 2273758544 ps: (cip_base_scoreboard.sv:575) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] On interface sram_ctrl_prim_reg_block, item had unexpected d_error value(predicted 0, but saw 1).\n"," TL item was: req: (cip_tl_seq_item@5217) { a_addr: 'h77a35b2c  a_data: 'h46  a_mask: 'hf  a_size: 'h2  a_param: 'h0  a_source: 'h98  a_opcode: 'h0  a_user: 'h24135  d_param: 'h0  d_source: 'h98  d_data: 'hffffffff  d_size: 'h2  d_opcode: 'h0  d_error: 'h1  d_sink: 'h0  d_user: 'h1f2a  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  } \n"," Reasons for predicted error: '{}.\n","UVM_INFO @ 2273758544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]}]}},"passed":1901,"total":1950,"percent":97.48717948717949}