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---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"11.sram_ctrl_mubi_enc_err.113328644482694255070287204208141290517371566258304776039322466761922101005481","seed":113328644482694255070287204208141290517371566258304776039322466761922101005481,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/11.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["UVM_ERROR @ 664445323 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 664445323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"19.sram_ctrl_mubi_enc_err.82496684868771817209158969408941347955899533185679824840301974800902707052349","seed":82496684868771817209158969408941347955899533185679824840301974800902707052349,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/19.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["UVM_ERROR @ 2743529639 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 2743529639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"21.sram_ctrl_mubi_enc_err.60441320381412055110741588695401856055411040322577997154432518073566708926599","seed":60441320381412055110741588695401856055411040322577997154432518073566708926599,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/21.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["UVM_ERROR @ 2676963805 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 2676963805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"34.sram_ctrl_mubi_enc_err.86196088648337164237304012270829501714789472704206288074369124305209048150236","seed":86196088648337164237304012270829501714789472704206288074369124305209048150236,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/34.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["UVM_ERROR @ 664443928 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 664443928 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"sram_ctrl_mubi_enc_err","qual_name":"44.sram_ctrl_mubi_enc_err.21697807876939797146869360097983018644275482259436231207373092222855843657664","seed":21697807876939797146869360097983018644275482259436231207373092222855843657664,"line":104,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-vcs/44.sram_ctrl_mubi_enc_err/latest/run.log","log_context":["UVM_ERROR @ 657600500 ps: (tlul_adapter_sram.sv:636) [ASSERT FAILED] rvalidHighReqFifoEmpty\n","UVM_INFO @ 657600500 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}]}},"passed":1172,"total":1190,"percent":98.4873949579832}