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accesses.":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"0.otbn_stress_all_with_rand_reset.73060554968069319318338194303126504554204173392315433270744496686863223183189","seed":73060554968069319318338194303126504554204173392315433270744496686863223183189,"line":356,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 1686648338 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 1686648338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"2.otbn_stress_all_with_rand_reset.58206152948413441800026706349352096489864155949548981494859422688287950563294","seed":58206152948413441800026706349352096489864155949548981494859422688287950563294,"line":398,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/2.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 4004542622 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 4004542622 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"6.otbn_stress_all_with_rand_reset.44780281614615063280616367511143718097745852399443982472770825817236267326911","seed":44780281614615063280616367511143718097745852399443982472770825817236267326911,"line":281,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/6.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 455890627 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 455890627 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"9.otbn_stress_all_with_rand_reset.97984865735874847218739968200223419668555878093808488316846613991711846063757","seed":97984865735874847218739968200223419668555878093808488316846613991711846063757,"line":164,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/9.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 717158612 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 717158612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Job returned non-zero exit code":[{"name":"otbn_sw_errs_fatal_chk","qual_name":"0.otbn_sw_errs_fatal_chk.4220940986446577081827245109920981361357223973562404250139000953688409817756","seed":4220940986446577081827245109920981361357223973562404250139000953688409817756,"line":null,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_sw_errs_fatal_chk/latest/run.log","log_context":["\n","\n","[make]: pre_run\n","mkdir -p /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_sw_errs_fatal_chk/latest\n","cd /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_sw_errs_fatal_chk/latest && pushd /nightly/current_run/opentitan; source hw/ip/otbn/dv/uvm/get-toolchain-paths.sh; popd; /nightly/current_run/opentitan/hw/ip/otbn/dv/uvm/gen-binaries.py --seed 4220940986446577081827245109920981361357223973562404250139000953688409817756 --size 2000 --count 1 /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_sw_errs_fatal_chk/latest/otbn-binaries\n","/nightly/current_run/opentitan /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_sw_errs_fatal_chk/latest\n","2026/04/19 13:58:41 Downloading https://releases.bazel.build/8.0.1/release/bazel-8.0.1-linux-x86_64...\n","Opening zip \"/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)\": open(): No such file or directory\n","FATAL: Failed to open '/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)' as a zip file: (error: 2): No such file or directory\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:52: pre_run] Error 36\n"]}],"UVM_FATAL (otbn_base_vseq.sv:348) [otbn_dmem_err_vseq] Check failed (!cfg.under_reset)":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"1.otbn_stress_all_with_rand_reset.62622592952514027082387971940991532532364253936025051147068566389547091845227","seed":62622592952514027082387971940991532532364253936025051147068566389547091845227,"line":894,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/1.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_FATAL @ 8671664421 ps: (otbn_base_vseq.sv:348) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!cfg.under_reset)  \n","UVM_INFO @ 8671664421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1028) virtual_sequencer [otbn_dmem_err_vseq] expect alert:fatal to fire":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"5.otbn_stress_all_with_rand_reset.73548209776015893063628546973513220274924020730201723658982897375097632206453","seed":73548209776015893063628546973513220274924020730201723658982897375097632206453,"line":169,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/5.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @  52135137 ps: (cip_base_vseq.sv:1028) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] expect alert:fatal to fire\n","UVM_INFO @  52135137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (otbn_base_vseq.sv:348) [otbn_imem_err_vseq] Check failed (!cfg.under_reset)":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"7.otbn_stress_all_with_rand_reset.21544130245621215365338023670973061040978966097968123766726202991226534183773","seed":21544130245621215365338023670973061040978966097968123766726202991226534183773,"line":177,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/7.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_FATAL @ 3851257285 ps: (otbn_base_vseq.sv:348) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!cfg.under_reset)  \n","UVM_INFO @ 3851257285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"8.otbn_stress_all_with_rand_reset.7625962217196446006646229373325097219246024112526943968661742715295178255132","seed":7625962217196446006646229373325097219246024112526943968661742715295178255132,"line":163,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/8.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_FATAL @ 1219668515 ps: (otbn_base_vseq.sv:348) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!cfg.under_reset)  \n","UVM_INFO @ 1219668515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otbn_scoreboard.sv:321) [scoreboard] Check failed item.d_data == exp_read_data.val (* [*] vs * [*]) value for register otbn_reg_block.status":[{"name":"otbn_escalate","qual_name":"15.otbn_escalate.78921339787447574080640325052158217805367186298516741064122145647321536580306","seed":78921339787447574080640325052158217805367186298516741064122145647321536580306,"line":105,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/15.otbn_escalate/latest/run.log","log_context":["UVM_ERROR @   2944717 ps: (otbn_scoreboard.sv:321) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_read_data.val (4 [0x4] vs 255 [0xff]) value for register otbn_reg_block.status\n","UVM_INFO @   2944717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_escalate","qual_name":"50.otbn_escalate.75604027674361260633212540012185961165595383492974066758274467692872874796067","seed":75604027674361260633212540012185961165595383492974066758274467692872874796067,"line":105,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/50.otbn_escalate/latest/run.log","log_context":["UVM_ERROR @  12872276 ps: (otbn_scoreboard.sv:321) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_read_data.val (4 [0x4] vs 255 [0xff]) value for register otbn_reg_block.status\n","UVM_INFO @  12872276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":572,"total":586,"percent":97.61092150170649}