{"block":{"name":"sram_ctrl","variant":"main","commit":"5b8f6746131e231116e685585432b70359d2c727","commit_short":"5b8f674","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/5b8f6746131e231116e685585432b70359d2c727","revision_info":"GitHub Revision: [`5b8f674`](https://github.com/lowrisc/opentitan/tree/5b8f6746131e231116e685585432b70359d2c727)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-04-19T03:35:48Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/sram_ctrl_main/data/sram_ctrl_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"sram_ctrl_smoke":{"max_time":9.0,"sim_time":5146.607118,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_hw_reset":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":1.0,"sim_time":17.157567,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_rw":{"tests":{"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":15.160888000000002,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"csr_bit_bash":{"tests":{"sram_ctrl_csr_bit_bash":{"max_time":3.0,"sim_time":2249.931586,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_aliasing":{"tests":{"sram_ctrl_csr_aliasing":{"max_time":2.0,"sim_time":22.170422,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"sram_ctrl_csr_mem_rw_with_rand_reset":{"max_time":5.0,"sim_time":1391.246582,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":15.160888000000002,"passed":20,"total":20,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":2.0,"sim_time":22.170422,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"mem_walk":{"tests":{"sram_ctrl_mem_walk":{"max_time":272.0,"sim_time":98867.280979,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"mem_partial_access":{"tests":{"sram_ctrl_mem_partial_access":{"max_time":124.00000000000001,"sim_time":2438.088167,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":70,"total":70,"percent":100.0},"V2":{"testpoints":{"multiple_keys":{"tests":{"sram_ctrl_multiple_keys":{"max_time":45.0,"sim_time":4935.8740609999995,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"stress_pipeline":{"tests":{"sram_ctrl_stress_pipeline":{"max_time":300.0,"sim_time":8536.845885,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"bijection":{"tests":{"sram_ctrl_bijection":{"max_time":174.0,"sim_time":22473.091973000002,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"access_during_key_req":{"tests":{"sram_ctrl_access_during_key_req":{"max_time":104.0,"sim_time":27294.529,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"lc_escalation":{"tests":{"sram_ctrl_lc_escalation":{"max_time":63.0,"sim_time":14060.717176999999,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"executable":{"tests":{"sram_ctrl_executable":{"max_time":68.0,"sim_time":117110.79320900001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"partial_access":{"tests":{"sram_ctrl_partial_access":{"max_time":10.0,"sim_time":3124.409452,"passed":5,"total":5,"percent":100.0},"sram_ctrl_partial_access_b2b":{"max_time":439.0,"sim_time":19738.837447,"passed":5,"total":5,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"max_throughput":{"tests":{"sram_ctrl_max_throughput":{"max_time":8.0,"sim_time":10943.567697,"passed":0,"total":5,"percent":0.0},"sram_ctrl_throughput_w_partial_write":{"max_time":7.0,"sim_time":1398.6626370000001,"passed":5,"total":5,"percent":100.0},"sram_ctrl_throughput_w_readback":{"max_time":7.0,"sim_time":673.6711770000001,"passed":0,"total":5,"percent":0.0}},"passed":5,"total":15,"percent":33.333333333333336},"regwen":{"tests":{"sram_ctrl_regwen":{"max_time":19.0,"sim_time":5185.370129,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"ram_cfg":{"tests":{"sram_ctrl_ram_cfg":{"max_time":4.0,"sim_time":1526.877445,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"stress_all":{"tests":{"sram_ctrl_stress_all":{"max_time":754.0,"sim_time":126914.85885799999,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"alert_test":{"tests":{"sram_ctrl_alert_test":{"max_time":2.0,"sim_time":39.569854,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":5.0,"sim_time":572.0661729999999,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_illegal_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":5.0,"sim_time":572.0661729999999,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_outstanding_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":1.0,"sim_time":17.157567,"passed":5,"total":5,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":15.160888000000002,"passed":20,"total":20,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":2.0,"sim_time":22.170422,"passed":5,"total":5,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":2.0,"sim_time":46.259129,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_partial_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":1.0,"sim_time":17.157567,"passed":5,"total":5,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":15.160888000000002,"passed":20,"total":20,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":2.0,"sim_time":22.170422,"passed":5,"total":5,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":2.0,"sim_time":46.259129,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"passed":180,"total":190,"percent":94.73684210526316},"V2S":{"testpoints":{"passthru_mem_tl_intg_err":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":49.0,"sim_time":29356.454436,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_intg_err":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":1405.0775700000002,"passed":5,"total":5,"percent":100.0},"sram_ctrl_tl_intg_err":{"max_time":4.0,"sim_time":616.171233,"passed":20,"total":20,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"prim_count_check":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":1405.0775700000002,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"sram_ctrl_tl_intg_err":{"max_time":4.0,"sim_time":616.171233,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_ctrl_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":19.0,"sim_time":5185.370129,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_readback_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":19.0,"sim_time":5185.370129,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_exec_config_regwen":{"tests":{"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":15.160888000000002,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_exec_config_mubi":{"tests":{"sram_ctrl_executable":{"max_time":68.0,"sim_time":117110.79320900001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_exec_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":68.0,"sim_time":117110.79320900001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_lc_hw_debug_en_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":68.0,"sim_time":117110.79320900001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_lc_escalate_en_intersig_mubi":{"tests":{"sram_ctrl_lc_escalation":{"max_time":63.0,"sim_time":14060.717176999999,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_prim_ram_ctrl_mubi":{"tests":{"sram_ctrl_mubi_enc_err":{"max_time":11.0,"sim_time":11037.278523,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_mem_integrity":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":49.0,"sim_time":29356.454436,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_mem_readback":{"tests":{"sram_ctrl_readback_err":{"max_time":8.0,"sim_time":1389.722505,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_mem_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":9.0,"sim_time":5146.607118,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_addr_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":9.0,"sim_time":5146.607118,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_instr_bus_lc_gated":{"tests":{"sram_ctrl_executable":{"max_time":68.0,"sim_time":117110.79320900001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ram_tl_lc_gate_fsm_sparse":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":1405.0775700000002,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_key_global_esc":{"tests":{"sram_ctrl_lc_escalation":{"max_time":63.0,"sim_time":14060.717176999999,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_key_local_esc":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":1405.0775700000002,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_init_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":1405.0775700000002,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_scramble_key_sideload":{"tests":{"sram_ctrl_smoke":{"max_time":9.0,"sim_time":5146.607118,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_tlul_fifo_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":1405.0775700000002,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":95,"total":95,"percent":100.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"sram_ctrl_stress_all_with_rand_reset":{"max_time":61.0,"sim_time":1222.912262,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"coverage":{"code":{"block":95.47,"line_statement":96.07,"branch":93.03,"condition_expression":null,"toggle":96.09,"fsm":100.0},"assertion":96.46,"functional":96.0},"cov_report_page":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/cov_report/index.html","failed_jobs":{"buckets":{"UVM_FATAL (sram_ctrl_base_vseq.sv:329) [sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-*:*], *'b0}) <= *; mask dist {'* :/ * - partial_access_pct, [* : '* - *] :/ partial_access_pct};}) Randomization failed!":[{"name":"sram_ctrl_max_throughput","qual_name":"0.sram_ctrl_max_throughput.68354261436083380285310022979948561919598853180950573447828978972089515902903","seed":68354261436083380285310022979948561919598853180950573447828978972089515902903,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/0.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 1931785255 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 1931785255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"0.sram_ctrl_throughput_w_readback.17760641250626528584665407431811871056081352665520781839180109386273487883205","seed":17760641250626528584665407431811871056081352665520781839180109386273487883205,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/0.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 673942797 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 673942797 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"1.sram_ctrl_max_throughput.59040743771999624094290915041786199757510124196815068615612805940124576992291","seed":59040743771999624094290915041786199757510124196815068615612805940124576992291,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/1.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 674818093 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 674818093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"1.sram_ctrl_throughput_w_readback.112137218751863648639666985222278747545911900793233417193065276070118358875901","seed":112137218751863648639666985222278747545911900793233417193065276070118358875901,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/1.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 667226754 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 667226754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"2.sram_ctrl_max_throughput.81140621863307558408280096289834409534910537263558186344826778922098304383577","seed":81140621863307558408280096289834409534910537263558186344826778922098304383577,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/2.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 10943567697 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 10943567697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"2.sram_ctrl_throughput_w_readback.70430867277860480181239772781765995664806526498922331546437326361062358305329","seed":70430867277860480181239772781765995664806526498922331546437326361062358305329,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/2.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 7303299954 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 7303299954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"3.sram_ctrl_max_throughput.61896994079317325392080311871417574371080548296804683312960195339068041907037","seed":61896994079317325392080311871417574371080548296804683312960195339068041907037,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/3.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 1990532051 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 1990532051 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"3.sram_ctrl_throughput_w_readback.12090111065883136584733289738399676788680431227342329819022331295153464478768","seed":12090111065883136584733289738399676788680431227342329819022331295153464478768,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/3.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 673671177 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 673671177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"4.sram_ctrl_max_throughput.109468629200093603289867030741048099909023838340915254268767319695440827892186","seed":109468629200093603289867030741048099909023838340915254268767319695440827892186,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/4.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 3455794815 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 3455794815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"4.sram_ctrl_throughput_w_readback.67784539575953899188254608560636048738314161535310929731690690658501477837397","seed":67784539575953899188254608560636048738314161535310929731690690658501477837397,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/4.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 1647636972 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 1647636972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":280,"total":290,"percent":96.55172413793103}