{"block":{"name":"edn","variant":"edn1","commit":"5b8f6746131e231116e685585432b70359d2c727","commit_short":"5b8f674","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/5b8f6746131e231116e685585432b70359d2c727","revision_info":"GitHub Revision: [`5b8f674`](https://github.com/lowrisc/opentitan/tree/5b8f6746131e231116e685585432b70359d2c727)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-04-20T00:07:04Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/edn_edn1/data/edn_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"edn_smoke":{"max_time":1.37,"sim_time":18.058260999999998,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"csr_hw_reset":{"tests":{"edn_csr_hw_reset":{"max_time":1.26,"sim_time":62.869647,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_rw":{"tests":{"edn_csr_rw":{"max_time":1.27,"sim_time":14.481338,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"csr_bit_bash":{"tests":{"edn_csr_bit_bash":{"max_time":7.3,"sim_time":1003.8956829999998,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_aliasing":{"tests":{"edn_csr_aliasing":{"max_time":1.82,"sim_time":42.104964,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"edn_csr_mem_rw_with_rand_reset":{"max_time":1.85,"sim_time":45.333211999999996,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"edn_csr_rw":{"max_time":1.27,"sim_time":14.481338,"passed":20,"total":20,"percent":100.0},"edn_csr_aliasing":{"max_time":1.82,"sim_time":42.104964,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0}},"passed":105,"total":105,"percent":100.0},"V2":{"testpoints":{"firmware":{"tests":{"edn_genbits":{"max_time":65.34,"sim_time":5624.2880319999995,"passed":300,"total":300,"percent":100.0}},"passed":300,"total":300,"percent":100.0},"csrng_commands":{"tests":{"edn_genbits":{"max_time":65.34,"sim_time":5624.2880319999995,"passed":300,"total":300,"percent":100.0}},"passed":300,"total":300,"percent":100.0},"genbits":{"tests":{"edn_genbits":{"max_time":65.34,"sim_time":5624.2880319999995,"passed":300,"total":300,"percent":100.0}},"passed":300,"total":300,"percent":100.0},"interrupts":{"tests":{"edn_intr":{"max_time":1.54,"sim_time":21.130692,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"alerts":{"tests":{"edn_alert":{"max_time":1.77,"sim_time":202.35027499999998,"passed":200,"total":200,"percent":100.0}},"passed":200,"total":200,"percent":100.0},"errs":{"tests":{"edn_err":{"max_time":1.66,"sim_time":30.624534,"passed":100,"total":100,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"disable":{"tests":{"edn_disable":{"max_time":1.28,"sim_time":21.175614000000003,"passed":50,"total":50,"percent":100.0},"edn_disable_auto_req_mode":{"max_time":8.93,"sim_time":500.0,"passed":45,"total":50,"percent":90.0}},"passed":95,"total":100,"percent":95.0},"stress_all":{"tests":{"edn_stress_all":{"max_time":6.73,"sim_time":334.118255,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"intr_test":{"tests":{"edn_intr_test":{"max_time":1.23,"sim_time":14.482479999999999,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"alert_test":{"tests":{"edn_alert_test":{"max_time":1.82,"sim_time":143.85407500000002,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"edn_tl_errors":{"max_time":5.05,"sim_time":214.964684,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_illegal_access":{"tests":{"edn_tl_errors":{"max_time":5.05,"sim_time":214.964684,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_outstanding_access":{"tests":{"edn_csr_hw_reset":{"max_time":1.26,"sim_time":62.869647,"passed":5,"total":5,"percent":100.0},"edn_csr_rw":{"max_time":1.27,"sim_time":14.481338,"passed":20,"total":20,"percent":100.0},"edn_csr_aliasing":{"max_time":1.82,"sim_time":42.104964,"passed":5,"total":5,"percent":100.0},"edn_same_csr_outstanding":{"max_time":1.66,"sim_time":31.078785,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_partial_access":{"tests":{"edn_csr_hw_reset":{"max_time":1.26,"sim_time":62.869647,"passed":5,"total":5,"percent":100.0},"edn_csr_rw":{"max_time":1.27,"sim_time":14.481338,"passed":20,"total":20,"percent":100.0},"edn_csr_aliasing":{"max_time":1.82,"sim_time":42.104964,"passed":5,"total":5,"percent":100.0},"edn_same_csr_outstanding":{"max_time":1.66,"sim_time":31.078785,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"passed":965,"total":970,"percent":99.48453608247422},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"edn_tl_intg_err":{"max_time":5.42,"sim_time":245.478037,"passed":20,"total":20,"percent":100.0},"edn_sec_cm":{"max_time":7.38,"sim_time":492.14797899999996,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"sec_cm_config_regwen":{"tests":{"edn_regwen":{"max_time":1.39,"sim_time":19.128236,"passed":10,"total":10,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"sec_cm_config_mubi":{"tests":{"edn_alert":{"max_time":1.77,"sim_time":202.35027499999998,"passed":200,"total":200,"percent":100.0}},"passed":200,"total":200,"percent":100.0},"sec_cm_main_sm_fsm_sparse":{"tests":{"edn_sec_cm":{"max_time":7.38,"sim_time":492.14797899999996,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ack_sm_fsm_sparse":{"tests":{"edn_sec_cm":{"max_time":7.38,"sim_time":492.14797899999996,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_fifo_ctr_redun":{"tests":{"edn_sec_cm":{"max_time":7.38,"sim_time":492.14797899999996,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ctr_redun":{"tests":{"edn_sec_cm":{"max_time":7.38,"sim_time":492.14797899999996,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_main_sm_ctr_local_esc":{"tests":{"edn_alert":{"max_time":1.77,"sim_time":202.35027499999998,"passed":200,"total":200,"percent":100.0},"edn_sec_cm":{"max_time":7.38,"sim_time":492.14797899999996,"passed":5,"total":5,"percent":100.0}},"passed":205,"total":205,"percent":100.0},"sec_cm_cs_rdata_bus_consistency":{"tests":{"edn_alert":{"max_time":1.77,"sim_time":202.35027499999998,"passed":200,"total":200,"percent":100.0}},"passed":200,"total":200,"percent":100.0},"sec_cm_tile_link_bus_integrity":{"tests":{"edn_tl_intg_err":{"max_time":5.42,"sim_time":245.478037,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0}},"passed":235,"total":235,"percent":100.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"edn_stress_all_with_rand_reset":{"max_time":91.47,"sim_time":5601.716214,"passed":45,"total":50,"percent":90.0}},"passed":45,"total":50,"percent":90.0}},"passed":45,"total":50,"percent":90.0}},"coverage":{"code":{"block":null,"line_statement":98.48,"branch":94.59,"condition_expression":95.08,"toggle":96.15,"fsm":95.45},"assertion":97.14,"functional":92.23},"cov_report_page":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/cov_report/dashboard.html","failed_jobs":{"buckets":{"UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue":[{"name":"edn_disable_auto_req_mode","qual_name":"2.edn_disable_auto_req_mode.66629857792591003006403788314638222982947567704111098834374330428936446833916","seed":66629857792591003006403788314638222982947567704111098834374330428936446833916,"line":89,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/2.edn_disable_auto_req_mode/latest/run.log","log_context":["UVM_FATAL @ 500000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 500000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 500000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"edn_disable_auto_req_mode","qual_name":"26.edn_disable_auto_req_mode.58646528343763566849093823400187781124019223814897727673597887033008268265982","seed":58646528343763566849093823400187781124019223814897727673597887033008268265982,"line":88,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/26.edn_disable_auto_req_mode/latest/run.log","log_context":["UVM_FATAL @ 500000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 500000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 500000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"edn_disable_auto_req_mode","qual_name":"43.edn_disable_auto_req_mode.86903158548294220008760808249787668098547858898939889631374245592884828737525","seed":86903158548294220008760808249787668098547858898939889631374245592884828737525,"line":88,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/43.edn_disable_auto_req_mode/latest/run.log","log_context":["UVM_FATAL @ 500000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 500000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 500000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1236) [edn_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"edn_stress_all_with_rand_reset","qual_name":"3.edn_stress_all_with_rand_reset.35461509900156349981331560237402431824007322854855088364437588172607257422727","seed":35461509900156349981331560237402431824007322854855088364437588172607257422727,"line":143,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/3.edn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 120231091 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.edn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 120231091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"edn_stress_all_with_rand_reset","qual_name":"4.edn_stress_all_with_rand_reset.48694452154983196749891528437187974283819120914910934064378882147831783312300","seed":48694452154983196749891528437187974283819120914910934064378882147831783312300,"line":216,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/4.edn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2568368249 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.edn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 2568368249 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"edn_stress_all_with_rand_reset","qual_name":"18.edn_stress_all_with_rand_reset.65865697354891108880399821015158317954052311504821729659180639122163583507692","seed":65865697354891108880399821015158317954052311504821729659180639122163583507692,"line":260,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/18.edn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2108905327 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.edn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 2108905327 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"edn_stress_all_with_rand_reset","qual_name":"26.edn_stress_all_with_rand_reset.22186214382460391195169616104622936924488804775977557234711680770219097781968","seed":22186214382460391195169616104622936924488804775977557234711680770219097781968,"line":281,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/26.edn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 3136183018 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.edn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 3136183018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"edn_stress_all_with_rand_reset","qual_name":"40.edn_stress_all_with_rand_reset.61248501832000309166828943425807213959256922567689943390690136670372827949715","seed":61248501832000309166828943425807213959256922567689943390690136670372827949715,"line":268,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/40.edn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2434456106 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.edn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 2434456106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (edn_scoreboard.sv:428) [scoreboard] Check failed (cs_cmd == sw_cmd_req_comp) Additional data * in auto_req_mode has to match the value from sw_cmd_req register *xxxxxxxxx.":[{"name":"edn_disable_auto_req_mode","qual_name":"13.edn_disable_auto_req_mode.43102920828186306872947051430729059845019431505603542795677416113990342287272","seed":43102920828186306872947051430729059845019431505603542795677416113990342287272,"line":88,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/13.edn_disable_auto_req_mode/latest/run.log","log_context":["UVM_FATAL @  50432077 ps: (edn_scoreboard.sv:428) [uvm_test_top.env.scoreboard] Check failed (cs_cmd == sw_cmd_req_comp) Additional data 0x00000932 in auto_req_mode has to match the value from sw_cmd_req register 0xxxxxxxxx. \n","UVM_INFO @  50432077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"edn_disable_auto_req_mode","qual_name":"34.edn_disable_auto_req_mode.60223724213327092566765222702686110692841000137252068281215797038095936770932","seed":60223724213327092566765222702686110692841000137252068281215797038095936770932,"line":88,"log_path":"/nightly/current_run/scratch/master/edn_edn1-sim-vcs/34.edn_disable_auto_req_mode/latest/run.log","log_context":["UVM_FATAL @  17513324 ps: (edn_scoreboard.sv:428) [uvm_test_top.env.scoreboard] Check failed (cs_cmd == sw_cmd_req_comp) Additional data 0x002f7942 in auto_req_mode has to match the value from sw_cmd_req register 0xxxxxxxxx. \n","UVM_INFO @  17513324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":1120,"total":1130,"percent":99.11504424778761}