{"block":{"name":"rv_dm","variant":"use_dmi_interface","commit":"5b8f6746131e231116e685585432b70359d2c727","commit_short":"5b8f674","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/5b8f6746131e231116e685585432b70359d2c727","revision_info":"GitHub Revision: [`5b8f674`](https://github.com/lowrisc/opentitan/tree/5b8f6746131e231116e685585432b70359d2c727)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-04-20T00:07:04Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/rv_dm/data/rv_dm_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"rv_dm_smoke":{"max_time":1.77,"sim_time":849.697543,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"jtag_dtm_csr_hw_reset":{"tests":{"rv_dm_jtag_dtm_csr_hw_reset":{"max_time":1.63,"sim_time":186.099425,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"jtag_dtm_csr_rw":{"tests":{"rv_dm_jtag_dtm_csr_rw":{"max_time":2.41,"sim_time":421.369731,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"jtag_dtm_csr_bit_bash":{"tests":{"rv_dm_jtag_dtm_csr_bit_bash":{"max_time":24.7,"sim_time":36143.655533,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"jtag_dtm_csr_aliasing":{"tests":{"rv_dm_jtag_dtm_csr_aliasing":{"max_time":3.69,"sim_time":1394.441947,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"jtag_dmi_csr_hw_reset":{"tests":{"rv_dm_jtag_dmi_csr_hw_reset":{"max_time":12.23,"sim_time":5492.337288,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"jtag_dmi_csr_rw":{"tests":{"rv_dm_jtag_dmi_csr_rw":{"max_time":40.82,"sim_time":16138.490386000001,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"jtag_dmi_csr_bit_bash":{"tests":{"rv_dm_jtag_dmi_csr_bit_bash":{"max_time":112.52,"sim_time":75143.353387,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"jtag_dmi_csr_aliasing":{"tests":{"rv_dm_jtag_dmi_csr_aliasing":{"max_time":412.98,"sim_time":192582.820762,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"jtag_dmi_cmderr_busy":{"tests":{"rv_dm_cmderr_busy":{"max_time":2.04,"sim_time":1356.1003910000002,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"jtag_dmi_cmderr_not_supported":{"tests":{"rv_dm_cmderr_not_supported":{"max_time":1.73,"sim_time":509.46760700000004,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmderr_exception":{"tests":{"rv_dm_cmderr_exception":{"max_time":1.47,"sim_time":318.947499,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"mem_tl_access_resuming":{"tests":{"rv_dm_mem_tl_access_resuming":{"max_time":1.26,"sim_time":191.178778,"passed":0,"total":2,"percent":0.0}},"passed":0,"total":2,"percent":0.0},"mem_tl_access_halted":{"tests":{"rv_dm_mem_tl_access_halted":{"max_time":1.14,"sim_time":98.37771400000001,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmderr_halt_resume":{"tests":{"rv_dm_cmderr_halt_resume":{"max_time":2.52,"sim_time":516.230798,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"dataaddr_rw_access":{"tests":{"rv_dm_dataaddr_rw_access":{"max_time":1.46,"sim_time":281.557159,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"halt_resume":{"tests":{"rv_dm_halt_resume_whereto":{"max_time":2.71,"sim_time":932.961716,"passed":8,"total":8,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"progbuf_busy":{"tests":{"rv_dm_cmderr_busy":{"max_time":2.04,"sim_time":1356.1003910000002,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"abstractcmd_status":{"tests":{"rv_dm_abstractcmd_status":{"max_time":1.25,"sim_time":193.267927,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"progbuf_read_write_execute":{"tests":{"rv_dm_progbuf_read_write_execute":{"max_time":1.61,"sim_time":246.724206,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"progbuf_exception":{"tests":{"rv_dm_cmderr_exception":{"max_time":1.47,"sim_time":318.947499,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"rom_read_access":{"tests":{"rv_dm_rom_read_access":{"max_time":1.17,"sim_time":110.587119,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"csr_hw_reset":{"tests":{"rv_dm_csr_hw_reset":{"max_time":3.3,"sim_time":179.327606,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_rw":{"tests":{"rv_dm_csr_rw":{"max_time":2.92,"sim_time":294.066012,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"csr_bit_bash":{"tests":{"rv_dm_csr_bit_bash":{"max_time":53.06,"sim_time":13584.73195,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_aliasing":{"tests":{"rv_dm_csr_aliasing":{"max_time":59.01,"sim_time":16194.731281999999,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"rv_dm_csr_mem_rw_with_rand_reset":{"max_time":3.8,"sim_time":138.34422,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"rv_dm_csr_aliasing":{"max_time":59.01,"sim_time":16194.731281999999,"passed":5,"total":5,"percent":100.0},"rv_dm_csr_rw":{"max_time":2.92,"sim_time":294.066012,"passed":20,"total":20,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"mem_walk":{"tests":{"rv_dm_mem_walk":{"max_time":1.15,"sim_time":149.601527,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"mem_partial_access":{"tests":{"rv_dm_mem_partial_access":{"max_time":1.07,"sim_time":82.734088,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":178,"total":180,"percent":98.88888888888889},"V2":{"testpoints":{"idcode":{"tests":{"rv_dm_smoke":{"max_time":1.77,"sim_time":849.697543,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"jtag_dtm_hard_reset":{"tests":{"rv_dm_jtag_dtm_hard_reset":{"max_time":1.89,"sim_time":874.7781779999999,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"jtag_dtm_idle_hint":{"tests":{"rv_dm_jtag_dtm_idle_hint":{"max_time":1.96,"sim_time":287.071328,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"jtag_dmi_failed_op":{"tests":{"rv_dm_dmi_failed_op":{"max_time":1.98,"sim_time":194.161517,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"jtag_dmi_dm_inactive":{"tests":{"rv_dm_jtag_dmi_dm_inactive":{"max_time":1.44,"sim_time":673.533103,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sba":{"tests":{"rv_dm_sba_tl_access":{"max_time":904.72,"sim_time":300000.0,"passed":0,"total":20,"percent":0.0},"rv_dm_delayed_resp_sba_tl_access":{"max_time":799.58,"sim_time":300000.0,"passed":0,"total":20,"percent":0.0}},"passed":0,"total":40,"percent":0.0},"bad_sba":{"tests":{"rv_dm_bad_sba_tl_access":{"max_time":963.1899999999999,"sim_time":300000.0,"passed":0,"total":20,"percent":0.0}},"passed":0,"total":20,"percent":0.0},"sba_autoincrement":{"tests":{"rv_dm_autoincr_sba_tl_access":{"max_time":890.85,"sim_time":300000.0,"passed":0,"total":20,"percent":0.0}},"passed":0,"total":20,"percent":0.0},"jtag_dmi_debug_disabled":{"tests":{"rv_dm_jtag_dmi_debug_disabled":{"max_time":1.62,"sim_time":426.49005200000005,"passed":0,"total":2,"percent":0.0}},"passed":0,"total":2,"percent":0.0},"sba_debug_disabled":{"tests":{"rv_dm_sba_debug_disabled":{"max_time":4.5,"sim_time":1748.837821,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"ndmreset_req":{"tests":{"rv_dm_ndmreset_req":{"max_time":1.49,"sim_time":268.729591,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"hart_unavail":{"tests":{"rv_dm_hart_unavail":{"max_time":1.1,"sim_time":223.588204,"passed":0,"total":5,"percent":0.0}},"passed":0,"total":5,"percent":0.0},"tap_ctrl_transitions":{"tests":{"rv_dm_tap_fsm_rand_reset":{"max_time":91.14,"sim_time":24310.782057,"passed":10,"total":10,"percent":100.0},"rv_dm_tap_fsm":{"max_time":10.95,"sim_time":8473.051412,"passed":1,"total":1,"percent":100.0}},"passed":11,"total":11,"percent":100.0},"hartsel_warl":{"tests":{"rv_dm_hartsel_warl":{"max_time":1.55,"sim_time":174.138641,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_all":{"tests":{"rv_dm_stress_all":{"max_time":7371.43,"sim_time":10000000.0,"passed":4,"total":50,"percent":8.0}},"passed":4,"total":50,"percent":8.0},"alert_test":{"tests":{"rv_dm_alert_test":{"max_time":1.68,"sim_time":180.274997,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"rv_dm_tl_errors":{"max_time":6.41,"sim_time":1727.416932,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_illegal_access":{"tests":{"rv_dm_tl_errors":{"max_time":6.41,"sim_time":1727.416932,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_outstanding_access":{"tests":{"rv_dm_csr_aliasing":{"max_time":59.01,"sim_time":16194.731281999999,"passed":5,"total":5,"percent":100.0},"rv_dm_csr_hw_reset":{"max_time":3.3,"sim_time":179.327606,"passed":5,"total":5,"percent":100.0},"rv_dm_csr_rw":{"max_time":2.92,"sim_time":294.066012,"passed":20,"total":20,"percent":100.0},"rv_dm_same_csr_outstanding":{"max_time":9.67,"sim_time":9783.982119999999,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_partial_access":{"tests":{"rv_dm_csr_aliasing":{"max_time":59.01,"sim_time":16194.731281999999,"passed":5,"total":5,"percent":100.0},"rv_dm_csr_hw_reset":{"max_time":3.3,"sim_time":179.327606,"passed":5,"total":5,"percent":100.0},"rv_dm_csr_rw":{"max_time":2.92,"sim_time":294.066012,"passed":20,"total":20,"percent":100.0},"rv_dm_same_csr_outstanding":{"max_time":9.67,"sim_time":9783.982119999999,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"passed":150,"total":283,"percent":53.003533568904594},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"rv_dm_tl_intg_err":{"max_time":31.04,"sim_time":19973.344535999997,"passed":20,"total":20,"percent":100.0},"rv_dm_sec_cm":{"max_time":5.13,"sim_time":2131.599955,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"rv_dm_tl_intg_err":{"max_time":31.04,"sim_time":19973.344535999997,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_lc_hw_debug_en_intersig_mubi":{"tests":{"rv_dm_sba_debug_disabled":{"max_time":4.5,"sim_time":1748.837821,"passed":2,"total":2,"percent":100.0},"rv_dm_debug_disabled":{"max_time":1.4,"sim_time":44.386427000000005,"passed":1,"total":2,"percent":50.0}},"passed":3,"total":4,"percent":75.0},"sec_cm_lc_dft_en_intersig_mubi":{"tests":{"rv_dm_sba_debug_disabled":{"max_time":4.5,"sim_time":1748.837821,"passed":2,"total":2,"percent":100.0},"rv_dm_debug_disabled":{"max_time":1.4,"sim_time":44.386427000000005,"passed":1,"total":2,"percent":50.0}},"passed":3,"total":4,"percent":75.0},"sec_cm_otp_dis_rv_dm_late_debug_intersig_mubi":{"tests":{"rv_dm_smoke":{"max_time":1.77,"sim_time":849.697543,"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_dm_en_ctrl_lc_gated":{"tests":{"rv_dm_buffered_enable":{"max_time":1.82,"sim_time":322.75243900000004,"passed":9,"total":10,"percent":90.0}},"passed":9,"total":10,"percent":90.0},"sec_cm_sba_tl_lc_gate_fsm_sparse":{"tests":{"rv_dm_sparse_lc_gate_fsm":{"max_time":0.98,"sim_time":88.58551,"passed":4,"total":4,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"sec_cm_mem_tl_lc_gate_fsm_sparse":{"tests":{"rv_dm_sparse_lc_gate_fsm":{"max_time":0.98,"sim_time":88.58551,"passed":4,"total":4,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"sec_cm_exec_ctrl_mubi":{"tests":{"rv_dm_buffered_enable":{"max_time":1.82,"sim_time":322.75243900000004,"passed":9,"total":10,"percent":90.0}},"passed":9,"total":10,"percent":90.0}},"passed":43,"total":45,"percent":95.55555555555556},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"rv_dm_stress_all_with_rand_reset":{"max_time":39.62,"sim_time":1944.877637,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"unmapped":{"testpoints":{"Unmapped":{"tests":{"rv_dm_scanmode":{"max_time":110.5,"sim_time":300000.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":91.06,"branch":76.07,"condition_expression":77.86,"toggle":74.23,"fsm":56.25},"assertion":96.16,"functional":85.26},"cov_report_page":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/cov_report/dashboard.html","failed_jobs":{"buckets":{"UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue":[{"name":"rv_dm_sba_tl_access","qual_name":"0.rv_dm_sba_tl_access.108300452473872380472812294181673400045719393627846808325643796409210414629085","seed":108300452473872380472812294181673400045719393627846808325643796409210414629085,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"0.rv_dm_delayed_resp_sba_tl_access.46953192667554533805944223092256033910460008003949032761812312956183677028950","seed":46953192667554533805944223092256033910460008003949032761812312956183677028950,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"0.rv_dm_bad_sba_tl_access.43002041161581309397645405585629013785776505479028080461863269425591012479631","seed":43002041161581309397645405585629013785776505479028080461863269425591012479631,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"0.rv_dm_autoincr_sba_tl_access.46636619637584322515798631012164145816035561430053157985616694851635931842927","seed":46636619637584322515798631012164145816035561430053157985616694851635931842927,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_scanmode","qual_name":"0.rv_dm_scanmode.50673722338422946674305509577940052097189510956879134135883569628178028112981","seed":50673722338422946674305509577940052097189510956879134135883569628178028112981,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_scanmode/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"1.rv_dm_sba_tl_access.43592816547161842828362883325499885867509469068029806407955284856985116021693","seed":43592816547161842828362883325499885867509469068029806407955284856985116021693,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"1.rv_dm_delayed_resp_sba_tl_access.57188679695884115495580123621424273929222656983731582938239126730648475876147","seed":57188679695884115495580123621424273929222656983731582938239126730648475876147,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"1.rv_dm_bad_sba_tl_access.83091549239774194936967494771604393554392376693742944162175733932677987254875","seed":83091549239774194936967494771604393554392376693742944162175733932677987254875,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"1.rv_dm_autoincr_sba_tl_access.12730286809474713138758655843487960110362297060368817189505450649794967454407","seed":12730286809474713138758655843487960110362297060368817189505450649794967454407,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"2.rv_dm_sba_tl_access.8279425189324919608891206166733543048382088557423478692313690635673008389866","seed":8279425189324919608891206166733543048382088557423478692313690635673008389866,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/2.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"2.rv_dm_delayed_resp_sba_tl_access.47477037488678238482694921253165233750527592727862498210298906663523345286148","seed":47477037488678238482694921253165233750527592727862498210298906663523345286148,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/2.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"2.rv_dm_bad_sba_tl_access.68818006148436712036373892713840144629491803582104477493853822485501582980089","seed":68818006148436712036373892713840144629491803582104477493853822485501582980089,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/2.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"2.rv_dm_autoincr_sba_tl_access.71903365959444924417547382304782494511972096649372568653470720656235537124123","seed":71903365959444924417547382304782494511972096649372568653470720656235537124123,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/2.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"3.rv_dm_sba_tl_access.103937914383454573945312932647830633327655817791521020580400026883534302932464","seed":103937914383454573945312932647830633327655817791521020580400026883534302932464,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/3.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"3.rv_dm_delayed_resp_sba_tl_access.61422658875624853886902798833407937598902542321983819089734715891099458294034","seed":61422658875624853886902798833407937598902542321983819089734715891099458294034,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/3.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"3.rv_dm_bad_sba_tl_access.69141350747603768355989529839703654274223781665635228416789128266932202858576","seed":69141350747603768355989529839703654274223781665635228416789128266932202858576,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/3.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"3.rv_dm_autoincr_sba_tl_access.6962917654407183586751931172659405608914196559573047391856246861701715949454","seed":6962917654407183586751931172659405608914196559573047391856246861701715949454,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/3.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"4.rv_dm_sba_tl_access.71192955043778331338751902703663688008638046401367962874690736745627458662123","seed":71192955043778331338751902703663688008638046401367962874690736745627458662123,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/4.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"4.rv_dm_delayed_resp_sba_tl_access.98695451890184700261716742128926057339450434832116708328350424299895040904503","seed":98695451890184700261716742128926057339450434832116708328350424299895040904503,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/4.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"4.rv_dm_bad_sba_tl_access.113620490944015764405244425103568684839820585105643846199381268370901754827450","seed":113620490944015764405244425103568684839820585105643846199381268370901754827450,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/4.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"4.rv_dm_autoincr_sba_tl_access.17604341825726642868263233032468112914055299022156132334550563613327095541671","seed":17604341825726642868263233032468112914055299022156132334550563613327095541671,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/4.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"5.rv_dm_sba_tl_access.9068487775278787321882090674244306487417785431697490764245294329085067468952","seed":9068487775278787321882090674244306487417785431697490764245294329085067468952,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/5.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"5.rv_dm_delayed_resp_sba_tl_access.81172536196675939716751922983667305123958423118468600046926067203465497561978","seed":81172536196675939716751922983667305123958423118468600046926067203465497561978,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/5.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"5.rv_dm_bad_sba_tl_access.103376574471140950443164231063821238230754246028764470766460311494764757085555","seed":103376574471140950443164231063821238230754246028764470766460311494764757085555,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/5.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"5.rv_dm_autoincr_sba_tl_access.49332592865718126428079127800236129530584347425894561695538873751502811969820","seed":49332592865718126428079127800236129530584347425894561695538873751502811969820,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/5.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"6.rv_dm_sba_tl_access.8258108378649040450972567206931222937025316213394551215045803804290024288854","seed":8258108378649040450972567206931222937025316213394551215045803804290024288854,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/6.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"6.rv_dm_delayed_resp_sba_tl_access.68289753377021699176622795367122532734945844644225422149730190318137869491157","seed":68289753377021699176622795367122532734945844644225422149730190318137869491157,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/6.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"6.rv_dm_bad_sba_tl_access.79657111784424898617830735989451082994734858290978675591901690524845771838578","seed":79657111784424898617830735989451082994734858290978675591901690524845771838578,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/6.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"6.rv_dm_autoincr_sba_tl_access.81400655164489116813453639092862279141495494311990378511272098276941373226446","seed":81400655164489116813453639092862279141495494311990378511272098276941373226446,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/6.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"7.rv_dm_sba_tl_access.26717266814229443514129324778613082522687064796232118266193620333410069766933","seed":26717266814229443514129324778613082522687064796232118266193620333410069766933,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/7.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"7.rv_dm_delayed_resp_sba_tl_access.106290576309765224426949655401774025241107520878777192966580760085538709873566","seed":106290576309765224426949655401774025241107520878777192966580760085538709873566,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/7.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"7.rv_dm_bad_sba_tl_access.55222913054790893548977531896607797525924491058505319726075563931575707283278","seed":55222913054790893548977531896607797525924491058505319726075563931575707283278,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/7.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"7.rv_dm_autoincr_sba_tl_access.27850787954723799959494935456248529623764956418926882267112536972018598807640","seed":27850787954723799959494935456248529623764956418926882267112536972018598807640,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/7.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"8.rv_dm_sba_tl_access.34598241607091779339592770123560784428305272129486007289160778866351790422252","seed":34598241607091779339592770123560784428305272129486007289160778866351790422252,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/8.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"8.rv_dm_delayed_resp_sba_tl_access.87955792025461419132137629452357004308007336352572089894873154630536612933562","seed":87955792025461419132137629452357004308007336352572089894873154630536612933562,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/8.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"8.rv_dm_bad_sba_tl_access.60313787872795460311070110821757186506914588700572792410598376698603703305080","seed":60313787872795460311070110821757186506914588700572792410598376698603703305080,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/8.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"8.rv_dm_autoincr_sba_tl_access.3228257877126509899061061955722635566267915811069381955052328326532461092577","seed":3228257877126509899061061955722635566267915811069381955052328326532461092577,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/8.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"9.rv_dm_sba_tl_access.72348697044439751321796901887859152114170674633502618880264214149444481647327","seed":72348697044439751321796901887859152114170674633502618880264214149444481647327,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/9.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"9.rv_dm_delayed_resp_sba_tl_access.529136037889661360512250345119911054437391730962867734331998006270476501103","seed":529136037889661360512250345119911054437391730962867734331998006270476501103,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/9.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"9.rv_dm_bad_sba_tl_access.100275254088848338975532657468852340090448681265351839841937692249927218071042","seed":100275254088848338975532657468852340090448681265351839841937692249927218071042,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/9.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"9.rv_dm_autoincr_sba_tl_access.106646967877893121345167652677475640806642684125062376421491360269127854953583","seed":106646967877893121345167652677475640806642684125062376421491360269127854953583,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/9.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"9.rv_dm_stress_all.27985193853738951260927461516407763192223122904538950223068452494259323007887","seed":27985193853738951260927461516407763192223122904538950223068452494259323007887,"line":82,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/9.rv_dm_stress_all/latest/run.log","log_context":["UVM_FATAL @ 10000000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 10000000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 10000000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"10.rv_dm_sba_tl_access.83833157114048097285024235817786661031871023811087210297825361106117548293047","seed":83833157114048097285024235817786661031871023811087210297825361106117548293047,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/10.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"10.rv_dm_delayed_resp_sba_tl_access.22864131725750316523486315154680351582731261917734872755584446281823652604395","seed":22864131725750316523486315154680351582731261917734872755584446281823652604395,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/10.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"10.rv_dm_bad_sba_tl_access.111063967663025098303559307098662802660549496383012402128918451539454164492877","seed":111063967663025098303559307098662802660549496383012402128918451539454164492877,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/10.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"10.rv_dm_autoincr_sba_tl_access.39180604991723953774691787329334864285292656576070573819161324573462721652445","seed":39180604991723953774691787329334864285292656576070573819161324573462721652445,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/10.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"11.rv_dm_sba_tl_access.72899308717413878593462558907744719565856543563107598616414253963975731015167","seed":72899308717413878593462558907744719565856543563107598616414253963975731015167,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/11.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"11.rv_dm_delayed_resp_sba_tl_access.30481403542567968356929256302296458236917064261152956194011110752704411419938","seed":30481403542567968356929256302296458236917064261152956194011110752704411419938,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/11.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"11.rv_dm_bad_sba_tl_access.17036784465545307501730998551001851773833577528872453521411737529523586991567","seed":17036784465545307501730998551001851773833577528872453521411737529523586991567,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/11.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"11.rv_dm_autoincr_sba_tl_access.27665237929602682332317737548057039123420586254421232214568195843105452855125","seed":27665237929602682332317737548057039123420586254421232214568195843105452855125,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/11.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"12.rv_dm_sba_tl_access.75675373292657636968723481867427125603565906538450000098334023944509701750859","seed":75675373292657636968723481867427125603565906538450000098334023944509701750859,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/12.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"12.rv_dm_delayed_resp_sba_tl_access.19792470454518788647053957605281942405779395646191105829037595206745233264925","seed":19792470454518788647053957605281942405779395646191105829037595206745233264925,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/12.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"12.rv_dm_bad_sba_tl_access.55388818867207465842839478214209926496443843505275073996590199746802974204783","seed":55388818867207465842839478214209926496443843505275073996590199746802974204783,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/12.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"12.rv_dm_autoincr_sba_tl_access.56702285458604223722047348055746026254091445505231202445390035755550543192015","seed":56702285458604223722047348055746026254091445505231202445390035755550543192015,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/12.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"13.rv_dm_sba_tl_access.102044755124315880675030902609453037709308850743865116166101238199593965896302","seed":102044755124315880675030902609453037709308850743865116166101238199593965896302,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/13.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"13.rv_dm_delayed_resp_sba_tl_access.79956322042435537260081000288777004234713374797435908078258365179215085866071","seed":79956322042435537260081000288777004234713374797435908078258365179215085866071,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/13.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"13.rv_dm_bad_sba_tl_access.53664029077160378280206350828690601631069007795810720726931544970062477068545","seed":53664029077160378280206350828690601631069007795810720726931544970062477068545,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/13.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"13.rv_dm_autoincr_sba_tl_access.22476749118068098605198972336417057601176470547622503219058762420017252594829","seed":22476749118068098605198972336417057601176470547622503219058762420017252594829,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/13.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"13.rv_dm_stress_all.34200759221141697344189223115850495198453652911954662583551790422597532988271","seed":34200759221141697344189223115850495198453652911954662583551790422597532988271,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/13.rv_dm_stress_all/latest/run.log","log_context":["UVM_FATAL @ 10000000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 10000000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 10000000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"14.rv_dm_sba_tl_access.55822831424702985184622134942805136373559103902882188260118439828268979268364","seed":55822831424702985184622134942805136373559103902882188260118439828268979268364,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/14.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"14.rv_dm_delayed_resp_sba_tl_access.1049653783899528819210491165082240503651582149724576910713031148933732183204","seed":1049653783899528819210491165082240503651582149724576910713031148933732183204,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/14.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"14.rv_dm_bad_sba_tl_access.78011979841752354512162884674700977991593965379502030685038137339400081000282","seed":78011979841752354512162884674700977991593965379502030685038137339400081000282,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/14.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"14.rv_dm_autoincr_sba_tl_access.99280721171608087934190439610219810261066603934945926423610890911396965714807","seed":99280721171608087934190439610219810261066603934945926423610890911396965714807,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/14.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"15.rv_dm_sba_tl_access.1267752013724730181954674548546120298063763584780798171108321725413452701619","seed":1267752013724730181954674548546120298063763584780798171108321725413452701619,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/15.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"15.rv_dm_delayed_resp_sba_tl_access.112155776896803497965531403113170091538031932941263959094679967614725732292523","seed":112155776896803497965531403113170091538031932941263959094679967614725732292523,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/15.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"15.rv_dm_bad_sba_tl_access.75420303617560687193214066888569924442006127593671668696077697219777680093346","seed":75420303617560687193214066888569924442006127593671668696077697219777680093346,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/15.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"15.rv_dm_autoincr_sba_tl_access.87343910377370899250720253151749512158391822544482656776493060677442628047625","seed":87343910377370899250720253151749512158391822544482656776493060677442628047625,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/15.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"16.rv_dm_sba_tl_access.32470696621572996372335833189974513954544203032259784504846975582683110636788","seed":32470696621572996372335833189974513954544203032259784504846975582683110636788,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/16.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"16.rv_dm_delayed_resp_sba_tl_access.51605852191531276527853856237980745413405875260862213526597063976664109228654","seed":51605852191531276527853856237980745413405875260862213526597063976664109228654,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/16.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"16.rv_dm_bad_sba_tl_access.189152924585507197722093275681833548711228937538681259498086256965275270039","seed":189152924585507197722093275681833548711228937538681259498086256965275270039,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/16.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"16.rv_dm_autoincr_sba_tl_access.70401172307513602292465385756325306511617770083657884073408834865486333598008","seed":70401172307513602292465385756325306511617770083657884073408834865486333598008,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/16.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"17.rv_dm_sba_tl_access.45679113773133481969821473881226320036868971213007095401663986917955847686574","seed":45679113773133481969821473881226320036868971213007095401663986917955847686574,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/17.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"17.rv_dm_delayed_resp_sba_tl_access.39275816867691745840657312366727533318101016286004728340754391986211286185345","seed":39275816867691745840657312366727533318101016286004728340754391986211286185345,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/17.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"17.rv_dm_bad_sba_tl_access.100896306573853948867678662136784688297838952486632161919893887335026633044916","seed":100896306573853948867678662136784688297838952486632161919893887335026633044916,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/17.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"17.rv_dm_autoincr_sba_tl_access.97887602220631757643681162865668031376322076521122737373887226800684976549102","seed":97887602220631757643681162865668031376322076521122737373887226800684976549102,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/17.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"18.rv_dm_sba_tl_access.101547400101721227181482693490449535823907849326103021979936984047648716289792","seed":101547400101721227181482693490449535823907849326103021979936984047648716289792,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/18.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"18.rv_dm_delayed_resp_sba_tl_access.79465207286337206601994769268391494634897466146777394972161789244876822799979","seed":79465207286337206601994769268391494634897466146777394972161789244876822799979,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/18.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"18.rv_dm_bad_sba_tl_access.106091810073846740012985811884234517852159720096466506309764374011230977257918","seed":106091810073846740012985811884234517852159720096466506309764374011230977257918,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/18.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"18.rv_dm_autoincr_sba_tl_access.7089895131718037336783759374775628893401907132524000153692477126996571902696","seed":7089895131718037336783759374775628893401907132524000153692477126996571902696,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/18.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_sba_tl_access","qual_name":"19.rv_dm_sba_tl_access.97990696889187366716753402484813690327524135791164931919722261142885979871719","seed":97990696889187366716753402484813690327524135791164931919722261142885979871719,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/19.rv_dm_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_delayed_resp_sba_tl_access","qual_name":"19.rv_dm_delayed_resp_sba_tl_access.99060606203470239248552622490007332799191573946171160061171708625757494673777","seed":99060606203470239248552622490007332799191573946171160061171708625757494673777,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/19.rv_dm_delayed_resp_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_bad_sba_tl_access","qual_name":"19.rv_dm_bad_sba_tl_access.29951089689343387395536765090739401505668520190026598238093229319034485559773","seed":29951089689343387395536765090739401505668520190026598238093229319034485559773,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/19.rv_dm_bad_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_autoincr_sba_tl_access","qual_name":"19.rv_dm_autoincr_sba_tl_access.98901283781983011251758403599039438292235314461323403385838043054466250199168","seed":98901283781983011251758403599039438292235314461323403385838043054466250199168,"line":86,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/19.rv_dm_autoincr_sba_tl_access/latest/run.log","log_context":["UVM_FATAL @ 300000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 300000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 300000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"25.rv_dm_stress_all.94032450493509158140056943301621642280846184562482038850486104199912433474408","seed":94032450493509158140056943301621642280846184562482038850486104199912433474408,"line":79,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/25.rv_dm_stress_all/latest/run.log","log_context":["UVM_FATAL @ 10000000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 10000000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 10000000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"33.rv_dm_stress_all.85793061853179808481118767672562260078697858851002616736685368409555657446094","seed":85793061853179808481118767672562260078697858851002616736685368409555657446094,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/33.rv_dm_stress_all/latest/run.log","log_context":["UVM_FATAL @ 10000000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 10000000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 10000000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"39.rv_dm_stress_all.69177025675193340257237789199748460087570116756442288136895798568815599769373","seed":69177025675193340257237789199748460087570116756442288136895798568815599769373,"line":83,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/39.rv_dm_stress_all/latest/run.log","log_context":["UVM_FATAL @ 10000000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 10000000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 10000000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"47.rv_dm_stress_all.14439337283872136867649301463195964338541671458664096386301813830959428308021","seed":14439337283872136867649301463195964338541671458664096386301813830959428308021,"line":81,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/47.rv_dm_stress_all/latest/run.log","log_context":["UVM_FATAL @ 10000000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 10000000000000 ps hit, indicating a probable testbench issue\n","UVM_INFO @ 10000000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (rv_dm_mem_tl_access_resuming_vseq.sv:56) [rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == *'b* (* [*] vs * [*])":[{"name":"rv_dm_mem_tl_access_resuming","qual_name":"0.rv_dm_mem_tl_access_resuming.99940901510164266688025437403597002060373250007973425033549957135898606340024","seed":99940901510164266688025437403597002060373250007973425033549957135898606340024,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_mem_tl_access_resuming/latest/run.log","log_context":["UVM_ERROR @ 120157208 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 120157208 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_mem_tl_access_resuming","qual_name":"1.rv_dm_mem_tl_access_resuming.32234913819272708170848872512705373669358750338459081699254160571838636642743","seed":32234913819272708170848872512705373669358750338459081699254160571838636642743,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_mem_tl_access_resuming/latest/run.log","log_context":["UVM_ERROR @ 191178778 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 191178778 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"5.rv_dm_stress_all.66885597993693908471575060097407226182989236754102131695307986971451826925006","seed":66885597993693908471575060097407226182989236754102131695307986971451826925006,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/5.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 581955900 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 581955900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"5.rv_dm_stress_all_with_rand_reset.78820650360470582965452469556393817578441168352726212287104667370206706789195","seed":78820650360470582965452469556393817578441168352726212287104667370206706789195,"line":102,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/5.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 1239034298 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 1239034298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"6.rv_dm_stress_all_with_rand_reset.73540185383466820872786664019931054571773744105120417211743258400801877606548","seed":73540185383466820872786664019931054571773744105120417211743258400801877606548,"line":94,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/6.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 1236222607 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 1236222607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"16.rv_dm_stress_all.72733664340605638039012582893084380264493246897956797445900851456596536830166","seed":72733664340605638039012582893084380264493246897956797445900851456596536830166,"line":82,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/16.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 1486161722 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 1486161722 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"17.rv_dm_stress_all.114848469113464551646446284511180370156087040231521888672074390949835089248352","seed":114848469113464551646446284511180370156087040231521888672074390949835089248352,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/17.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @  85717146 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @  85717146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"18.rv_dm_stress_all.20161190798168033274616794205325223026849127207862110940179568188034837036370","seed":20161190798168033274616794205325223026849127207862110940179568188034837036370,"line":80,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/18.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 2260263165 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 2260263165 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"26.rv_dm_stress_all.34715806029807648486664594374658319009778212791735465400558585583564413975689","seed":34715806029807648486664594374658319009778212791735465400558585583564413975689,"line":80,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/26.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 4035804687 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 4035804687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"31.rv_dm_stress_all.57925483276166700876547500470270305848884302028134203053344706662208932990982","seed":57925483276166700876547500470270305848884302028134203053344706662208932990982,"line":79,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/31.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 596109602 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 596109602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"36.rv_dm_stress_all.30630608867655604676136514951712489187974543803192293824582972698291682101046","seed":30630608867655604676136514951712489187974543803192293824582972698291682101046,"line":81,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/36.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 1103270319 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 1103270319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"44.rv_dm_stress_all.58706321589983703172621950071685274556149440165047020293202190186075424262874","seed":58706321589983703172621950071685274556149440165047020293202190186075424262874,"line":80,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/44.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 707124608 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 707124608 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"48.rv_dm_stress_all.65223047268282236791300757906570242266802037483125475962168288254365103911183","seed":65223047268282236791300757906570242266802037483125475962168288254365103911183,"line":79,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/48.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 563221157 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 563221157 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"49.rv_dm_stress_all.44493884046112758449063576305346413527992463062016601104516432526544928189564","seed":44493884046112758449063576305346413527992463062016601104516432526544928189564,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/49.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 254667563 ps: (rv_dm_mem_tl_access_resuming_vseq.sv:56) [uvm_test_top.env.virtual_sequencer.rv_dm_mem_tl_access_resuming_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyhalted) == 1'b1 (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 254667563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (rv_dm_hart_unavail_vseq.sv:24) [rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (* [*] vs * [*])":[{"name":"rv_dm_hart_unavail","qual_name":"0.rv_dm_hart_unavail.94579072140979695880677143500627519701137670737766181738514705354421292828280","seed":94579072140979695880677143500627519701137670737766181738514705354421292828280,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_hart_unavail/latest/run.log","log_context":["UVM_ERROR @ 216930783 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 216930783 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_hart_unavail","qual_name":"1.rv_dm_hart_unavail.88828136932385279111569702104206805057015751418705441523867902285088006343086","seed":88828136932385279111569702104206805057015751418705441523867902285088006343086,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_hart_unavail/latest/run.log","log_context":["UVM_ERROR @  38081569 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @  38081569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"1.rv_dm_stress_all.94868139562838233532060531804646536999216515290139230145771484314709622431485","seed":94868139562838233532060531804646536999216515290139230145771484314709622431485,"line":81,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 1314332539 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 1314332539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_hart_unavail","qual_name":"2.rv_dm_hart_unavail.107031245548204795135064761638728899982055613684781134487605658492372476453678","seed":107031245548204795135064761638728899982055613684781134487605658492372476453678,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/2.rv_dm_hart_unavail/latest/run.log","log_context":["UVM_ERROR @ 122521330 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 122521330 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_hart_unavail","qual_name":"3.rv_dm_hart_unavail.48499651397823671971188168676630541534221513626808534789047005593226855606066","seed":48499651397823671971188168676630541534221513626808534789047005593226855606066,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/3.rv_dm_hart_unavail/latest/run.log","log_context":["UVM_ERROR @ 223588204 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 223588204 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"3.rv_dm_stress_all.50442723690079592235299546078228549707746966340142742572501016233598287474055","seed":50442723690079592235299546078228549707746966340142742572501016233598287474055,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/3.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 152480186 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 152480186 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_hart_unavail","qual_name":"4.rv_dm_hart_unavail.337908530005014316479495198064545220722885235176240700018457728981152343219","seed":337908530005014316479495198064545220722885235176240700018457728981152343219,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/4.rv_dm_hart_unavail/latest/run.log","log_context":["UVM_ERROR @ 215436619 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 215436619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"8.rv_dm_stress_all.94787533629629757957718886957843242101859151415717808278397302475812694243653","seed":94787533629629757957718886957843242101859151415717808278397302475812694243653,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/8.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @  61102394 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @  61102394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"8.rv_dm_stress_all_with_rand_reset.96070674564522056269586500787008615398022194841014757947080529860600983437603","seed":96070674564522056269586500787008615398022194841014757947080529860600983437603,"line":81,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/8.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 554839403 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 554839403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"10.rv_dm_stress_all.64113694033640773599707322488677446121035819312187383740202276095245462182229","seed":64113694033640773599707322488677446121035819312187383740202276095245462182229,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/10.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 186426361 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 186426361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"12.rv_dm_stress_all.79847275646123086330124454706300242615026950162999275237538836571084280078833","seed":79847275646123086330124454706300242615026950162999275237538836571084280078833,"line":82,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/12.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 2716579672 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 2716579672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"15.rv_dm_stress_all.24165915409821910059352954277731144908347055235704230867719772515900511074458","seed":24165915409821910059352954277731144908347055235704230867719772515900511074458,"line":80,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/15.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 1898887478 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 1898887478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"21.rv_dm_stress_all.33071565450695870844214411461043378542000235859654019920096126863714373411246","seed":33071565450695870844214411461043378542000235859654019920096126863714373411246,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/21.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 411826344 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 411826344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"22.rv_dm_stress_all.76463773240860561640700316660004403253390812349122744542368927056100151255105","seed":76463773240860561640700316660004403253390812349122744542368927056100151255105,"line":81,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/22.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 5942459115 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 5942459115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"23.rv_dm_stress_all.104275936705438059087585443728103929745114514796773150233100758693673673772256","seed":104275936705438059087585443728103929745114514796773150233100758693673673772256,"line":81,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/23.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 2742627997 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 2742627997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"24.rv_dm_stress_all.76574725579034729848591312536807227639149370978754491578594438823473739132253","seed":76574725579034729848591312536807227639149370978754491578594438823473739132253,"line":85,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/24.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 3248442914 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 3248442914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"27.rv_dm_stress_all.103587868460982101328561210045130684965862865057203182297077451535350184249112","seed":103587868460982101328561210045130684965862865057203182297077451535350184249112,"line":82,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/27.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 4594081296 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 4594081296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"28.rv_dm_stress_all.55656514305976066991035686430352462750136953505536885096050175840562759609379","seed":55656514305976066991035686430352462750136953505536885096050175840562759609379,"line":80,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/28.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 598240123 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 598240123 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"34.rv_dm_stress_all.105046393962169379811786610183102485961946711250251725224256270992156829785729","seed":105046393962169379811786610183102485961946711250251725224256270992156829785729,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/34.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 128870485 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 128870485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"35.rv_dm_stress_all.57838061094505429125258327114736707229771384014408114456968360969964955092245","seed":57838061094505429125258327114736707229771384014408114456968360969964955092245,"line":82,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/35.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 1654715116 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 1654715116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"40.rv_dm_stress_all.81425785054999659980569963413755732108924742408764751698750835375648575823954","seed":81425785054999659980569963413755732108924742408764751698750835375648575823954,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/40.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 203089201 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 203089201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"45.rv_dm_stress_all.71701280293832372110073679206512729249740010154864486629743566358469037882332","seed":71701280293832372110073679206512729249740010154864486629743566358469037882332,"line":80,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/45.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 1588052597 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 1588052597 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"46.rv_dm_stress_all.29119574353012536385651522791975193540403929805136542361051176378212704003618","seed":29119574353012536385651522791975193540403929805136542361051176378212704003618,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/46.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 319471829 ps: (rv_dm_hart_unavail_vseq.sv:24) [uvm_test_top.env.virtual_sequencer.rv_dm_hart_unavail_vseq] Check failed `gmv(jtag_dmi_ral.dmstatus.anyunavail) == req_unavailable (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 319471829 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (* [*] vs * [*])":[{"name":"rv_dm_jtag_dmi_debug_disabled","qual_name":"0.rv_dm_jtag_dmi_debug_disabled.75791479714021198961057105257934509942414579072335973404420494537152429351610","seed":75791479714021198961057105257934509942414579072335973404420494537152429351610,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_jtag_dmi_debug_disabled/latest/run.log","log_context":["UVM_ERROR @  89193863 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (304766976 [0x122a6000] vs 0 [0x0]) \n","UVM_INFO @  89193863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"0.rv_dm_stress_all_with_rand_reset.97647223897703037533285321773519354224304143099117527546173685632647421572420","seed":97647223897703037533285321773519354224304143099117527546173685632647421572420,"line":82,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 718097980 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (923083479 [0x370522d7] vs 0 [0x0]) \n","UVM_INFO @ 718097980 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_jtag_dmi_debug_disabled","qual_name":"1.rv_dm_jtag_dmi_debug_disabled.115424228896378636638662598841528135240107277348154134072764244827138783276337","seed":115424228896378636638662598841528135240107277348154134072764244827138783276337,"line":77,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_jtag_dmi_debug_disabled/latest/run.log","log_context":["UVM_ERROR @ 426490052 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (1496535965 [0x5933539d] vs 0 [0x0]) \n","UVM_INFO @ 426490052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"2.rv_dm_stress_all.69074951039660210857150183470306516326290546884574752936703744391417777126926","seed":69074951039660210857150183470306516326290546884574752936703744391417777126926,"line":81,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/2.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 2863321565 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (754069815 [0x2cf23137] vs 0 [0x0]) \n","UVM_INFO @ 2863321565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"2.rv_dm_stress_all_with_rand_reset.14449830755300388160566397111588751250549369447349963823240545520844419369074","seed":14449830755300388160566397111588751250549369447349963823240545520844419369074,"line":80,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/2.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 280246291 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (51460326 [0x31138e6] vs 0 [0x0]) \n","UVM_INFO @ 280246291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"3.rv_dm_stress_all_with_rand_reset.58551844187154286704699648811010062650667702795093302927426071769397273090750","seed":58551844187154286704699648811010062650667702795093302927426071769397273090750,"line":112,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/3.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2792119659 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (1970476156 [0x7573147c] vs 0 [0x0]) \n","UVM_INFO @ 2792119659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"4.rv_dm_stress_all.78785491855031223396912843910406803516360158062168762783004581424801954224313","seed":78785491855031223396912843910406803516360158062168762783004581424801954224313,"line":81,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/4.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 2204383607 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (2825209427 [0xa8654653] vs 0 [0x0]) \n","UVM_INFO @ 2204383607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"4.rv_dm_stress_all_with_rand_reset.36529096051133949204382256477919641300684372105128972896270957490444636879421","seed":36529096051133949204382256477919641300684372105128972896270957490444636879421,"line":82,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/4.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 280662183 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (481265841 [0x1caf88b1] vs 0 [0x0]) \n","UVM_INFO @ 280662183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"7.rv_dm_stress_all.90769133969548347027873652013009497524187815585682807400586481814635468998949","seed":90769133969548347027873652013009497524187815585682807400586481814635468998949,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/7.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 179086344 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (3161455143 [0xbc6ffa27] vs 0 [0x0]) \n","UVM_INFO @ 179086344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"20.rv_dm_stress_all.65795698895897299146901140362251788934254975481956657651812769979230557329453","seed":65795698895897299146901140362251788934254975481956657651812769979230557329453,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/20.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 201409499 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (1309310686 [0x4e0a7ede] vs 0 [0x0]) \n","UVM_INFO @ 201409499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"32.rv_dm_stress_all.85481707616972814576026440031392956880504316477442968353931432386785223574420","seed":85481707616972814576026440031392956880504316477442968353931432386785223574420,"line":82,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/32.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 2939409619 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (3230708211 [0xc090b1f3] vs 0 [0x0]) \n","UVM_INFO @ 2939409619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"42.rv_dm_stress_all.85133988489233167288289969373232413002411324968607081210158468733042303877055","seed":85133988489233167288289969373232413002411324968607081210158468733042303877055,"line":78,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/42.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 269801335 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (3465613282 [0xce910fe2] vs 0 [0x0]) \n","UVM_INFO @ 269801335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all","qual_name":"43.rv_dm_stress_all.90301554765682504142847885993621397436538013412702932162979759383661398747543","seed":90301554765682504142847885993621397436538013412702932162979759383661398747543,"line":82,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/43.rv_dm_stress_all/latest/run.log","log_context":["UVM_ERROR @ 2880849736 ps: (rv_dm_jtag_dmi_debug_disabled_vseq.sv:16) [uvm_test_top.env.virtual_sequencer.rv_dm_jtag_dmi_debug_disabled_vseq] Check failed rdata == expected_value (736761145 [0x2bea1539] vs 0 [0x0]) \n","UVM_INFO @ 2880849736 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Job timed out after * minutes":[{"name":"rv_dm_stress_all","qual_name":"0.rv_dm_stress_all.3326331819880042755411418992267876843805749126384336062568247957018484957288","seed":3326331819880042755411418992267876843805749126384336062568247957018484957288,"line":null,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/0.rv_dm_stress_all/latest/run.log","log_context":["Job timed out after 180 minutes"]},{"name":"rv_dm_stress_all","qual_name":"6.rv_dm_stress_all.77127811650120295774538261998883077591750015318606834175292699552252192980537","seed":77127811650120295774538261998883077591750015318606834175292699552252192980537,"line":null,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/6.rv_dm_stress_all/latest/run.log","log_context":["Job timed out after 180 minutes"]},{"name":"rv_dm_stress_all","qual_name":"29.rv_dm_stress_all.4758600235283796633350067822977380824242532481452732164761582898745157345164","seed":4758600235283796633350067822977380824242532481452732164761582898745157345164,"line":null,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/29.rv_dm_stress_all/latest/run.log","log_context":["Job timed out after 180 minutes"]},{"name":"rv_dm_stress_all","qual_name":"30.rv_dm_stress_all.5715337046030367859345102783253832965405291137094235937409955370824061834069","seed":5715337046030367859345102783253832965405291137094235937409955370824061834069,"line":null,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/30.rv_dm_stress_all/latest/run.log","log_context":["Job timed out after 180 minutes"]},{"name":"rv_dm_stress_all","qual_name":"37.rv_dm_stress_all.84062501936905796441823762532529453726326554259182293916121099067052894409344","seed":84062501936905796441823762532529453726326554259182293916121099067052894409344,"line":null,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/37.rv_dm_stress_all/latest/run.log","log_context":["Job timed out after 180 minutes"]},{"name":"rv_dm_stress_all","qual_name":"41.rv_dm_stress_all.106607202236797665211472606999672883191390447589022613364038718419752956193632","seed":106607202236797665211472606999672883191390447589022613364038718419752956193632,"line":null,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/41.rv_dm_stress_all/latest/run.log","log_context":["Job timed out after 180 minutes"]}],"UVM_ERROR (rv_dm_debug_disabled_vseq.sv:33) [rv_dm_debug_disabled_vseq] Check failed (rvalue == expected_output)":[{"name":"rv_dm_debug_disabled","qual_name":"1.rv_dm_debug_disabled.75889639791789467507973368943462812573646234282357024444518540357270629080821","seed":75889639791789467507973368943462812573646234282357024444518540357270629080821,"line":81,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_debug_disabled/latest/run.log","log_context":["UVM_ERROR @  42293130 ps: (rv_dm_debug_disabled_vseq.sv:33) [uvm_test_top.env.virtual_sequencer.rv_dm_debug_disabled_vseq] Check failed (rvalue == expected_output)  \n","UVM_INFO @  42293130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (cip_base_vseq.sv:1170) [rv_dm_common_vseq] Check failed (vseq_done)":[{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"1.rv_dm_stress_all_with_rand_reset.31707861605980602642018212358445099183937845092234971374840315527371731890130","seed":31707861605980602642018212358445099183937845092234971374840315527371731890130,"line":91,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/1.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_FATAL @ 994691989 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.rv_dm_common_vseq] Check failed (vseq_done)  \n","UVM_INFO @ 994691989 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"7.rv_dm_stress_all_with_rand_reset.16522448721068363976312979966089838419445462902262901993158496135282468983562","seed":16522448721068363976312979966089838419445462902262901993158496135282468983562,"line":99,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/7.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_FATAL @ 3883862933 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.rv_dm_common_vseq] Check failed (vseq_done)  \n","UVM_INFO @ 3883862933 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"rv_dm_stress_all_with_rand_reset","qual_name":"9.rv_dm_stress_all_with_rand_reset.15738210634949110000467976736026625434116073633452242621649519983318221857820","seed":15738210634949110000467976736026625434116073633452242621649519983318221857820,"line":107,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/9.rv_dm_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_FATAL @ 1944877637 ps: (cip_base_vseq.sv:1170) [uvm_test_top.env.virtual_sequencer.rv_dm_common_vseq] Check failed (vseq_done)  \n","UVM_INFO @ 1944877637 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (rv_dm_buffered_enable_vseq.sv:164) [rv_dm_buffered_enable_vseq] Check failed saw_a_valid == tgt_copy == Sba (* [*] vs * [*])":[{"name":"rv_dm_buffered_enable","qual_name":"6.rv_dm_buffered_enable.64772689145733632789107846010912808281266257259346833350587079221760932770164","seed":64772689145733632789107846010912808281266257259346833350587079221760932770164,"line":83,"log_path":"/nightly/current_run/scratch/master/rv_dm-sim-vcs/6.rv_dm_buffered_enable/latest/run.log","log_context":["UVM_ERROR @ 164154738 ps: (rv_dm_buffered_enable_vseq.sv:164) [uvm_test_top.env.virtual_sequencer.rv_dm_buffered_enable_vseq] Check failed saw_a_valid == tgt_copy == Sba (0 [0x0] vs 1 [0x1]) \n","UVM_INFO @ 164154738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":335,"total":483,"percent":69.35817805383023}