{"block":{"name":"sram_ctrl","variant":"main","commit":"5b8f6746131e231116e685585432b70359d2c727","commit_short":"5b8f674","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/5b8f6746131e231116e685585432b70359d2c727","revision_info":"GitHub Revision: [`5b8f674`](https://github.com/lowrisc/opentitan/tree/5b8f6746131e231116e685585432b70359d2c727)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-04-20T00:07:04Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/sram_ctrl_main/data/sram_ctrl_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"sram_ctrl_smoke":{"max_time":7.0,"sim_time":673.712089,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_hw_reset":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":2.0,"sim_time":14.061701999999999,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_rw":{"tests":{"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":23.25638,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"csr_bit_bash":{"tests":{"sram_ctrl_csr_bit_bash":{"max_time":3.0,"sim_time":132.721146,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_aliasing":{"tests":{"sram_ctrl_csr_aliasing":{"max_time":2.0,"sim_time":14.889899999999999,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"sram_ctrl_csr_mem_rw_with_rand_reset":{"max_time":5.0,"sim_time":1404.962105,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":23.25638,"passed":20,"total":20,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":2.0,"sim_time":14.889899999999999,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"mem_walk":{"tests":{"sram_ctrl_mem_walk":{"max_time":335.0,"sim_time":20687.265883,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"mem_partial_access":{"tests":{"sram_ctrl_mem_partial_access":{"max_time":158.0,"sim_time":22226.877015000002,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":70,"total":70,"percent":100.0},"V2":{"testpoints":{"multiple_keys":{"tests":{"sram_ctrl_multiple_keys":{"max_time":78.0,"sim_time":8849.698735,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"stress_pipeline":{"tests":{"sram_ctrl_stress_pipeline":{"max_time":339.0,"sim_time":27744.939396,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"bijection":{"tests":{"sram_ctrl_bijection":{"max_time":227.0,"sim_time":190120.08855000001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"access_during_key_req":{"tests":{"sram_ctrl_access_during_key_req":{"max_time":127.0,"sim_time":113521.154434,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"lc_escalation":{"tests":{"sram_ctrl_lc_escalation":{"max_time":83.0,"sim_time":54334.332864,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"executable":{"tests":{"sram_ctrl_executable":{"max_time":73.0,"sim_time":30690.392202,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"partial_access":{"tests":{"sram_ctrl_partial_access":{"max_time":8.0,"sim_time":2729.890108,"passed":5,"total":5,"percent":100.0},"sram_ctrl_partial_access_b2b":{"max_time":419.0,"sim_time":19770.326052,"passed":5,"total":5,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"max_throughput":{"tests":{"sram_ctrl_max_throughput":{"max_time":7.0,"sim_time":7297.92127,"passed":0,"total":5,"percent":0.0},"sram_ctrl_throughput_w_partial_write":{"max_time":8.0,"sim_time":2765.763196,"passed":5,"total":5,"percent":100.0},"sram_ctrl_throughput_w_readback":{"max_time":7.0,"sim_time":2736.255178,"passed":0,"total":5,"percent":0.0}},"passed":5,"total":15,"percent":33.333333333333336},"regwen":{"tests":{"sram_ctrl_regwen":{"max_time":20.0,"sim_time":17151.948501,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"ram_cfg":{"tests":{"sram_ctrl_ram_cfg":{"max_time":4.0,"sim_time":1346.118217,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"stress_all":{"tests":{"sram_ctrl_stress_all":{"max_time":537.0,"sim_time":147707.254127,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"alert_test":{"tests":{"sram_ctrl_alert_test":{"max_time":2.0,"sim_time":28.725644,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":6.0,"sim_time":146.20544099999998,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_illegal_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":6.0,"sim_time":146.20544099999998,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_outstanding_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":2.0,"sim_time":14.061701999999999,"passed":5,"total":5,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":23.25638,"passed":20,"total":20,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":2.0,"sim_time":14.889899999999999,"passed":5,"total":5,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":2.0,"sim_time":29.648220000000002,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_partial_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":2.0,"sim_time":14.061701999999999,"passed":5,"total":5,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":23.25638,"passed":20,"total":20,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":2.0,"sim_time":14.889899999999999,"passed":5,"total":5,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":2.0,"sim_time":29.648220000000002,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"passed":180,"total":190,"percent":94.73684210526316},"V2S":{"testpoints":{"passthru_mem_tl_intg_err":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":48.0,"sim_time":7373.270888,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_intg_err":{"tests":{"sram_ctrl_tl_intg_err":{"max_time":4.0,"sim_time":1421.122917,"passed":20,"total":20,"percent":100.0},"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":737.224666,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"prim_count_check":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":737.224666,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"sram_ctrl_tl_intg_err":{"max_time":4.0,"sim_time":1421.122917,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_ctrl_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":20.0,"sim_time":17151.948501,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_readback_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":20.0,"sim_time":17151.948501,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_exec_config_regwen":{"tests":{"sram_ctrl_csr_rw":{"max_time":2.0,"sim_time":23.25638,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_exec_config_mubi":{"tests":{"sram_ctrl_executable":{"max_time":73.0,"sim_time":30690.392202,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_exec_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":73.0,"sim_time":30690.392202,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_lc_hw_debug_en_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":73.0,"sim_time":30690.392202,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_lc_escalate_en_intersig_mubi":{"tests":{"sram_ctrl_lc_escalation":{"max_time":83.0,"sim_time":54334.332864,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_prim_ram_ctrl_mubi":{"tests":{"sram_ctrl_mubi_enc_err":{"max_time":7.0,"sim_time":715.416512,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_mem_integrity":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":48.0,"sim_time":7373.270888,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"sec_cm_mem_readback":{"tests":{"sram_ctrl_readback_err":{"max_time":8.0,"sim_time":5114.576573,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_mem_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":7.0,"sim_time":673.712089,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_addr_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":7.0,"sim_time":673.712089,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_instr_bus_lc_gated":{"tests":{"sram_ctrl_executable":{"max_time":73.0,"sim_time":30690.392202,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_ram_tl_lc_gate_fsm_sparse":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":737.224666,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_key_global_esc":{"tests":{"sram_ctrl_lc_escalation":{"max_time":83.0,"sim_time":54334.332864,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_key_local_esc":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":737.224666,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_init_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":737.224666,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_scramble_key_sideload":{"tests":{"sram_ctrl_smoke":{"max_time":7.0,"sim_time":673.712089,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"sec_cm_tlul_fifo_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":5.0,"sim_time":737.224666,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":95,"total":95,"percent":100.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"sram_ctrl_stress_all_with_rand_reset":{"max_time":73.0,"sim_time":2643.8180610000004,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"coverage":{"code":{"block":96.35,"line_statement":97.11,"branch":94.65,"condition_expression":null,"toggle":96.09,"fsm":100.0},"assertion":96.46,"functional":96.8},"cov_report_page":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/cov_report/index.html","failed_jobs":{"buckets":{"UVM_FATAL (sram_ctrl_base_vseq.sv:329) [sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-*:*], *'b0}) <= *; mask dist {'* :/ * - partial_access_pct, [* : '* - *] :/ partial_access_pct};}) Randomization failed!":[{"name":"sram_ctrl_max_throughput","qual_name":"0.sram_ctrl_max_throughput.105005150193796429690978782847617363512236841350781585958219682461781742576455","seed":105005150193796429690978782847617363512236841350781585958219682461781742576455,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/0.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 717173685 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 717173685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"0.sram_ctrl_throughput_w_readback.21228370336530540203369369444360098932724516631241931201801477230028785400438","seed":21228370336530540203369369444360098932724516631241931201801477230028785400438,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/0.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 1317421822 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 1317421822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"1.sram_ctrl_max_throughput.109598389458166188662360614730297290263113062326735041880132563911607906588740","seed":109598389458166188662360614730297290263113062326735041880132563911607906588740,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/1.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 688692083 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 688692083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"1.sram_ctrl_throughput_w_readback.30851667500732752320071681753600952879049360098025992606882084485160343204528","seed":30851667500732752320071681753600952879049360098025992606882084485160343204528,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/1.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 2632139567 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 2632139567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"2.sram_ctrl_max_throughput.21389210707094300944857164525432245281369079970477542227107112622271161428765","seed":21389210707094300944857164525432245281369079970477542227107112622271161428765,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/2.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 657852145 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 657852145 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"2.sram_ctrl_throughput_w_readback.81478963331419243173208550000978068847999925856983917194307790675009746493526","seed":81478963331419243173208550000978068847999925856983917194307790675009746493526,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/2.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 2736255178 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 2736255178 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"3.sram_ctrl_max_throughput.100511388573114600114476600291208612513161092233344164106960406588777491924809","seed":100511388573114600114476600291208612513161092233344164106960406588777491924809,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/3.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 7297921270 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 7297921270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"3.sram_ctrl_throughput_w_readback.46798465873708515725801750561412631971399887526928201539357369171832561902174","seed":46798465873708515725801750561412631971399887526928201539357369171832561902174,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/3.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 1688299466 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 1688299466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_max_throughput","qual_name":"4.sram_ctrl_max_throughput.48495228816950217034321631195649133809185462856889210912634454280228861703952","seed":48495228816950217034321631195649133809185462856889210912634454280228861703952,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/4.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 1328320547 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 1328320547 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"4.sram_ctrl_throughput_w_readback.98062495978990975021767527148001116806057734026893161899232225032584588121516","seed":98062495978990975021767527148001116806057734026893161899232225032584588121516,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/4.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 1342106015 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 1342106015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":280,"total":290,"percent":96.55172413793103}