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/nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_escalate/latest\n","2026/05/02 02:33:25 Downloading https://releases.bazel.build/8.0.1/release/bazel-8.0.1-linux-x86_64...\n","Opening zip \"/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)\": open(): No such file or directory\n","FATAL: Failed to open '/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)' as a zip file: (error: 2): No such file or directory\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:52: pre_run] Error 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[/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:52: pre_run] Error 1\n"]}],"UVM_ERROR (cip_base_vseq.sv:1237) [otbn_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"0.otbn_stress_all_with_rand_reset.74425092228622574325158428202858966135204545840333834339029184305910934808678","seed":74425092228622574325158428202858966135204545840333834339029184305910934808678,"line":287,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 2577921812 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 2577921812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"5.otbn_stress_all_with_rand_reset.45358572230598630610559701261964075492118146936463638332872590648966332913618","seed":45358572230598630610559701261964075492118146936463638332872590648966332913618,"line":161,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/5.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 968548397 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 968548397 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"6.otbn_stress_all_with_rand_reset.93169792076551757976340776974239157021551703581558032674339934366129451675670","seed":93169792076551757976340776974239157021551703581558032674339934366129451675670,"line":408,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/6.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 9358717650 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 9358717650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_stress_all_with_rand_reset","qual_name":"7.otbn_stress_all_with_rand_reset.114593497296301778837739352538941658188027953553242593291740773603948382806549","seed":114593497296301778837739352538941658188027953553242593291740773603948382806549,"line":163,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/7.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 1675696918 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 1675696918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.u_otbn_core.u_otbn_rnd.u_xoshiro256pp.xoshiro_q cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)":[{"name":"otbn_zero_state_err_urnd","qual_name":"0.otbn_zero_state_err_urnd.55333878815272905735682409833217760843007785788341330649302280336832244443813","seed":55333878815272905735682409833217760843007785788341330649302280336832244443813,"line":108,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_zero_state_err_urnd/latest/run.log","log_context":["UVM_ERROR @  10690212 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.u_otbn_core.u_otbn_rnd.u_xoshiro256pp.xoshiro_q cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n","UVM_INFO @  10690212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_zero_state_err_urnd","qual_name":"1.otbn_zero_state_err_urnd.101415037748237759871133778224338917889096065041958218718194539219448698939611","seed":101415037748237759871133778224338917889096065041958218718194539219448698939611,"line":112,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/1.otbn_zero_state_err_urnd/latest/run.log","log_context":["UVM_ERROR @   7113886 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.u_otbn_core.u_otbn_rnd.u_xoshiro256pp.xoshiro_q cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n","UVM_INFO @   7113886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_zero_state_err_urnd","qual_name":"2.otbn_zero_state_err_urnd.34298484399827917710882614081708780136975927456406374374388468882506407741759","seed":34298484399827917710882614081708780136975927456406374374388468882506407741759,"line":109,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/2.otbn_zero_state_err_urnd/latest/run.log","log_context":["UVM_ERROR @  32553860 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.u_otbn_core.u_otbn_rnd.u_xoshiro256pp.xoshiro_q cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n","UVM_INFO @  32553860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_zero_state_err_urnd","qual_name":"3.otbn_zero_state_err_urnd.34458219052700628585432002327909260731118325723790793926510609770741230062960","seed":34458219052700628585432002327909260731118325723790793926510609770741230062960,"line":105,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/3.otbn_zero_state_err_urnd/latest/run.log","log_context":["UVM_ERROR @   5923880 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.u_otbn_core.u_otbn_rnd.u_xoshiro256pp.xoshiro_q cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n","UVM_INFO @   5923880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_zero_state_err_urnd","qual_name":"4.otbn_zero_state_err_urnd.23830368921447951292071140562402586190303321331075297037162791497517328564353","seed":23830368921447951292071140562402586190303321331075297037162791497517328564353,"line":107,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/4.otbn_zero_state_err_urnd/latest/run.log","log_context":["UVM_ERROR @   7137430 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.u_otbn_core.u_otbn_rnd.u_xoshiro256pp.xoshiro_q cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n","UVM_INFO @   7137430 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.edn_urnd_ack cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)":[{"name":"otbn_urnd_err","qual_name":"0.otbn_urnd_err.1271177275045188440743901089985033096405820419503177354142649402142278574977","seed":1271177275045188440743901089985033096405820419503177354142649402142278574977,"line":109,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_urnd_err/latest/run.log","log_context":["UVM_ERROR @  14142843 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.edn_urnd_ack cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n","UVM_INFO @  14142843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_urnd_err","qual_name":"1.otbn_urnd_err.47024627815696528895726617599938393480729433300570351599755298582697659601211","seed":47024627815696528895726617599938393480729433300570351599755298582697659601211,"line":112,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/1.otbn_urnd_err/latest/run.log","log_context":["UVM_ERROR @  28468668 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.edn_urnd_ack cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n","UVM_INFO @  28468668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:372) [csr_utils_pkg::csr_rd_sub.isolation_fork] Timeout waiting to csr_rd otbn_reg_block.status (addr=*)":[{"name":"otbn_rf_base_intg_err","qual_name":"2.otbn_rf_base_intg_err.104792939087815556958018878298287283032136678616705503809959214049826549040382","seed":104792939087815556958018878298287283032136678616705503809959214049826549040382,"line":122,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/2.otbn_rf_base_intg_err/latest/run.log","log_context":["UVM_FATAL @ 2075965838 ps: (csr_utils_pkg.sv:372) [csr_utils_pkg::csr_rd_sub.isolation_fork] Timeout waiting to csr_rd otbn_reg_block.status (addr=0x517a0018)\n","UVM_INFO @ 2075965838 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_sim_*/tb.sv,292): Assertion MatchingStatus_A has failed":[{"name":"otbn_partial_wipe","qual_name":"2.otbn_partial_wipe.77469351619863666852442548602680594280525722564193976611164135747554848124297","seed":77469351619863666852442548602680594280525722564193976611164135747554848124297,"line":108,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/2.otbn_partial_wipe/latest/run.log","log_context":["xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_sim_0.1/tb.sv,292): (time 3034220 PS) Assertion tb.MatchingStatus_A has failed \n","UVM_ERROR @   3034220 ps: (tb.sv:292) [ASSERT FAILED] MatchingStatus_A\n","UVM_INFO @   3034220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1028) virtual_sequencer [otbn_imem_err_vseq] expect alert:fatal to fire":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"3.otbn_stress_all_with_rand_reset.12660180982847253239628376313567746462418386899143132892852009233496663662365","seed":12660180982847253239628376313567746462418386899143132892852009233496663662365,"line":529,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/3.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 938902825 ps: (cip_base_vseq.sv:1028) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] expect alert:fatal to fire\n","UVM_INFO @ 938902825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (otbn_base_vseq.sv:348) [otbn_dmem_err_vseq] Check failed (!cfg.under_reset)":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"4.otbn_stress_all_with_rand_reset.71227008658571369027936342422501329946563419097877961299007390583154027702557","seed":71227008658571369027936342422501329946563419097877961299007390583154027702557,"line":172,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/4.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_FATAL @ 325346891 ps: (otbn_base_vseq.sv:348) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!cfg.under_reset)  \n","UVM_INFO @ 325346891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_insn_cnt_if.sv,21): Assertion InsnCntMatches_A has failed":[{"name":"otbn_stack_addr_integ_chk","qual_name":"4.otbn_stack_addr_integ_chk.26241192361735293809264889801632289935113740678469687207021552596049839648401","seed":26241192361735293809264889801632289935113740678469687207021552596049839648401,"line":114,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/4.otbn_stack_addr_integ_chk/latest/run.log","log_context":["xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 56612416 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed \n","UVM_ERROR @  56612416 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A\n","UVM_INFO @  56612416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"otbn_escalate","qual_name":"47.otbn_escalate.15862187551361107532870821090001892077569960030131551500622281988504380395084","seed":15862187551361107532870821090001892077569960030131551500622281988504380395084,"line":113,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/47.otbn_escalate/latest/run.log","log_context":["xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 8685462 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed \n","UVM_ERROR @   8685462 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A\n","UVM_INFO @   8685462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_FATAL (otbn_base_vseq.sv:348) [otbn_imem_err_vseq] Check failed (!cfg.under_reset)":[{"name":"otbn_stress_all_with_rand_reset","qual_name":"9.otbn_stress_all_with_rand_reset.115220428941147664472073161880191578805696807177917442746769639661466958049749","seed":115220428941147664472073161880191578805696807177917442746769639661466958049749,"line":313,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/9.otbn_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_FATAL @ 626608935 ps: (otbn_base_vseq.sv:348) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!cfg.under_reset)  \n","UVM_INFO @ 626608935 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otbn_scoreboard.sv:321) [scoreboard] Check failed item.d_data == exp_read_data.val (* [*] vs * [*]) value for register otbn_reg_block.status":[{"name":"otbn_escalate","qual_name":"40.otbn_escalate.40773184693177910977201007587834713824308578954188714412607499056171397371147","seed":40773184693177910977201007587834713824308578954188714412607499056171397371147,"line":105,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/40.otbn_escalate/latest/run.log","log_context":["UVM_ERROR @   1511982 ps: (otbn_scoreboard.sv:321) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_read_data.val (4 [0x4] vs 255 [0xff]) value for register otbn_reg_block.status\n","UVM_INFO @   1511982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (otbn_scoreboard.sv:550) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a recov alert but it still hasn't arrived.":[{"name":"otbn_passthru_mem_tl_intg_err","qual_name":"0.otbn_passthru_mem_tl_intg_err.75804707291288440467943245274437990630619969989957156344015987119126079198375","seed":75804707291288440467943245274437990630619969989957156344015987119126079198375,"line":91,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_passthru_mem_tl_intg_err/latest/run.log","log_context":["UVM_FATAL @   8921930 ps: (otbn_scoreboard.sv:550) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a recov alert but it still hasn't arrived.\n","UVM_INFO @   8921930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_passthru_mem_tl_intg_err","qual_name":"11.otbn_passthru_mem_tl_intg_err.34010579615615529008200448666074018380377344876132745306512124914923913371663","seed":34010579615615529008200448666074018380377344876132745306512124914923913371663,"line":91,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/11.otbn_passthru_mem_tl_intg_err/latest/run.log","log_context":["UVM_FATAL @  10442003 ps: (otbn_scoreboard.sv:550) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a recov alert but it still hasn't arrived.\n","UVM_INFO @  10442003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_ip_otbn_*/rtl/otbn_rnd.sv,233): Assertion UrndNoReseedOnReset_A has failed":[{"name":"otbn_passthru_mem_tl_intg_err","qual_name":"5.otbn_passthru_mem_tl_intg_err.71262631388239929684025145569801287352373599270241777257022510166636477792371","seed":71262631388239929684025145569801287352373599270241777257022510166636477792371,"line":128,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/5.otbn_passthru_mem_tl_intg_err/latest/run.log","log_context":["xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_ip_otbn_0.1/rtl/otbn_rnd.sv,233): (time 80358183 PS) Assertion tb.dut.u_otbn_core.u_otbn_rnd.UrndNoReseedOnReset_A has failed \n","UVM_ERROR @  80358183 ps: (otbn_rnd.sv:233) [ASSERT FAILED] UrndNoReseedOnReset_A\n","UVM_INFO @  80358183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_FATAL (otbn_scoreboard.sv:550) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a fatal alert but it still hasn't arrived.":[{"name":"otbn_passthru_mem_tl_intg_err","qual_name":"7.otbn_passthru_mem_tl_intg_err.59250262263141629941818277455550538843789407720435734094474505712068583260293","seed":59250262263141629941818277455550538843789407720435734094474505712068583260293,"line":91,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/7.otbn_passthru_mem_tl_intg_err/latest/run.log","log_context":["UVM_FATAL @  40091860 ps: (otbn_scoreboard.sv:550) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.\n","UVM_INFO @  40091860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otbn_passthru_mem_tl_intg_err","qual_name":"12.otbn_passthru_mem_tl_intg_err.46225226945419153584137703721324896591346831007165064725142872657909625782007","seed":46225226945419153584137703721324896591346831007165064725142872657909625782007,"line":91,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/12.otbn_passthru_mem_tl_intg_err/latest/run.log","log_context":["UVM_FATAL @  44122902 ps: (otbn_scoreboard.sv:550) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.\n","UVM_INFO @  44122902 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":560,"total":586,"percent":95.56313993174061}