{"block":{"name":"spi_device","variant":"1r1w","commit":"5eeb50d2355fe0971a539579065bbb4a0596071b","commit_short":"5eeb50d","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/5eeb50d2355fe0971a539579065bbb4a0596071b","revision_info":"GitHub Revision: [`5eeb50d`](https://github.com/lowrisc/opentitan/tree/5eeb50d2355fe0971a539579065bbb4a0596071b)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-05-16T03:01:19Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/spi_device_1r1w/data/spi_device_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"spi_device_flash_and_tpm":{"max_time":727.0,"sim_time":187882.13859400002,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"csr_hw_reset":{"tests":{"spi_device_csr_hw_reset":{"max_time":4.0,"sim_time":167.69597,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_rw":{"tests":{"spi_device_csr_rw":{"max_time":6.0,"sim_time":225.348118,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"csr_bit_bash":{"tests":{"spi_device_csr_bit_bash":{"max_time":54.0,"sim_time":7216.006235000001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_aliasing":{"tests":{"spi_device_csr_aliasing":{"max_time":29.0,"sim_time":929.3886040000001,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"spi_device_csr_mem_rw_with_rand_reset":{"max_time":8.0,"sim_time":240.846594,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"spi_device_csr_rw":{"max_time":6.0,"sim_time":225.348118,"passed":20,"total":20,"percent":100.0},"spi_device_csr_aliasing":{"max_time":29.0,"sim_time":929.3886040000001,"passed":5,"total":5,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"mem_walk":{"tests":{"spi_device_mem_walk":{"max_time":2.0,"sim_time":30.354492999999998,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"mem_partial_access":{"tests":{"spi_device_mem_partial_access":{"max_time":4.0,"sim_time":55.38211,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0}},"passed":114,"total":115,"percent":99.1304347826087},"V2":{"testpoints":{"csb_read":{"tests":{"spi_device_csb_read":{"max_time":3.0,"sim_time":15.363488,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"mem_parity":{"tests":{"spi_device_mem_parity":{"max_time":2.0,"sim_time":1.261093,"passed":0,"total":20,"percent":0.0}},"passed":0,"total":20,"percent":0.0},"mem_cfg":{"tests":{"spi_device_ram_cfg":{"max_time":2.0,"sim_time":3.250143,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tpm_read":{"tests":{"spi_device_tpm_rw":{"max_time":19.0,"sim_time":1089.19126,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tpm_write":{"tests":{"spi_device_tpm_rw":{"max_time":19.0,"sim_time":1089.19126,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tpm_hw_reg":{"tests":{"spi_device_tpm_read_hw_reg":{"max_time":56.0,"sim_time":7655.877834,"passed":50,"total":50,"percent":100.0},"spi_device_tpm_sts_read":{"max_time":3.0,"sim_time":144.384739,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"tpm_fully_random_case":{"tests":{"spi_device_tpm_all":{"max_time":129.0,"sim_time":39224.752168,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"pass_cmd_filtering":{"tests":{"spi_device_pass_cmd_filtering":{"max_time":99.0,"sim_time":47417.769505000004,"passed":50,"total":50,"percent":100.0},"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"pass_addr_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":77.0,"sim_time":33830.94700199999,"passed":50,"total":50,"percent":100.0},"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"pass_payload_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":77.0,"sim_time":33830.94700199999,"passed":50,"total":50,"percent":100.0},"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"cmd_info_slots":{"tests":{"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"cmd_read_status":{"tests":{"spi_device_intercept":{"max_time":93.0,"sim_time":4734.2230389999995,"passed":50,"total":50,"percent":100.0},"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"cmd_read_jedec":{"tests":{"spi_device_intercept":{"max_time":93.0,"sim_time":4734.2230389999995,"passed":50,"total":50,"percent":100.0},"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"cmd_read_sfdp":{"tests":{"spi_device_intercept":{"max_time":93.0,"sim_time":4734.2230389999995,"passed":50,"total":50,"percent":100.0},"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"cmd_fast_read":{"tests":{"spi_device_intercept":{"max_time":93.0,"sim_time":4734.2230389999995,"passed":50,"total":50,"percent":100.0},"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"cmd_read_pipeline":{"tests":{"spi_device_intercept":{"max_time":93.0,"sim_time":4734.2230389999995,"passed":50,"total":50,"percent":100.0},"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"flash_cmd_upload":{"tests":{"spi_device_upload":{"max_time":87.0,"sim_time":32879.276328,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"mailbox_command":{"tests":{"spi_device_mailbox":{"max_time":208.0,"sim_time":12696.933226,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"mailbox_cross_outside_command":{"tests":{"spi_device_mailbox":{"max_time":208.0,"sim_time":12696.933226,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"mailbox_cross_inside_command":{"tests":{"spi_device_mailbox":{"max_time":208.0,"sim_time":12696.933226,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"cmd_read_buffer":{"tests":{"spi_device_flash_mode":{"max_time":78.0,"sim_time":12772.647396,"passed":50,"total":50,"percent":100.0},"spi_device_read_buffer_direct":{"max_time":40.0,"sim_time":5143.914605999999,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"cmd_dummy_cycle":{"tests":{"spi_device_mailbox":{"max_time":208.0,"sim_time":12696.933226,"passed":50,"total":50,"percent":100.0},"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":100,"total":100,"percent":100.0},"quad_spi":{"tests":{"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"dual_spi":{"tests":{"spi_device_flash_all":{"max_time":557.0,"sim_time":209235.884494,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"4b_3b_feature":{"tests":{"spi_device_cfg_cmd":{"max_time":56.0,"sim_time":2261.2827119999997,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"write_enable_disable":{"tests":{"spi_device_cfg_cmd":{"max_time":56.0,"sim_time":2261.2827119999997,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"TPM_with_flash_or_passthrough_mode":{"tests":{"spi_device_flash_and_tpm":{"max_time":727.0,"sim_time":187882.13859400002,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"tpm_and_flash_trans_with_min_inactive_time":{"tests":{"spi_device_flash_and_tpm_min_idle":{"max_time":940.0,"sim_time":116620.393393,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"stress_all":{"tests":{"spi_device_stress_all":{"max_time":1367.0,"sim_time":192382.297478,"passed":49,"total":50,"percent":98.0}},"passed":49,"total":50,"percent":98.0},"alert_test":{"tests":{"spi_device_alert_test":{"max_time":2.0,"sim_time":12.119969999999999,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"intr_test":{"tests":{"spi_device_intr_test":{"max_time":2.0,"sim_time":79.753609,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"spi_device_tl_errors":{"max_time":13.0,"sim_time":857.704723,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_illegal_access":{"tests":{"spi_device_tl_errors":{"max_time":13.0,"sim_time":857.704723,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0},"tl_d_outstanding_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":4.0,"sim_time":167.69597,"passed":5,"total":5,"percent":100.0},"spi_device_csr_rw":{"max_time":6.0,"sim_time":225.348118,"passed":20,"total":20,"percent":100.0},"spi_device_csr_aliasing":{"max_time":29.0,"sim_time":929.3886040000001,"passed":5,"total":5,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":10.0,"sim_time":431.447541,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"tl_d_partial_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":4.0,"sim_time":167.69597,"passed":5,"total":5,"percent":100.0},"spi_device_csr_rw":{"max_time":6.0,"sim_time":225.348118,"passed":20,"total":20,"percent":100.0},"spi_device_csr_aliasing":{"max_time":29.0,"sim_time":929.3886040000001,"passed":5,"total":5,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":10.0,"sim_time":431.447541,"passed":20,"total":20,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"passed":1018,"total":1041,"percent":97.79058597502402},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"spi_device_sec_cm":{"max_time":4.0,"sim_time":974.1678,"passed":5,"total":5,"percent":100.0},"spi_device_tl_intg_err":{"max_time":42.0,"sim_time":3519.122145,"passed":20,"total":20,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"spi_device_tl_intg_err":{"max_time":42.0,"sim_time":3519.122145,"passed":20,"total":20,"percent":100.0}},"passed":20,"total":20,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"unmapped":{"testpoints":{"Unmapped":{"tests":{"spi_device_flash_mode_ignore_cmds":{"max_time":500.00000000000006,"sim_time":235961.193236,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0}},"coverage":{"code":{"block":98.41,"line_statement":98.82,"branch":97.14,"condition_expression":null,"toggle":81.25,"fsm":89.58},"assertion":94.76,"functional":65.74},"cov_report_page":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ1] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)":[{"name":"spi_device_mem_parity","qual_name":"0.spi_device_mem_parity.72997894627597456671907973694812945232346259330358307591974489994567674075076","seed":72997894627597456671907973694812945232346259330358307591974489994567674075076,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1081093 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[961] not found within the scope .\n","UVM_ERROR @   1081093 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[961] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"1.spi_device_mem_parity.77581184420852407467048515097577539634028105939952406925171381755526629524183","seed":77581184420852407467048515097577539634028105939952406925171381755526629524183,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/1.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1949335 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[916] not found within the scope .\n","UVM_ERROR @   1949335 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[916] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"2.spi_device_mem_parity.54054861154462739611610068454714077960572666297177289010338502918461520642389","seed":54054861154462739611610068454714077960572666297177289010338502918461520642389,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/2.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1905378 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[912] not found within the scope .\n","UVM_ERROR @   1905378 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[912] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"3.spi_device_mem_parity.62256327376565824379398605374579634235401394767134217302591779571151469308634","seed":62256327376565824379398605374579634235401394767134217302591779571151469308634,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/3.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1523835 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[933] not found within the scope .\n","UVM_ERROR @   1523835 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[933] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"4.spi_device_mem_parity.69715699743053089749199140717881104553891245711037207637447237350140714394051","seed":69715699743053089749199140717881104553891245711037207637447237350140714394051,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/4.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1084109 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[996] not found within the scope .\n","UVM_ERROR @   1084109 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[996] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"5.spi_device_mem_parity.72308066675669233024888396568544596423225645861879638401185620421418394498315","seed":72308066675669233024888396568544596423225645861879638401185620421418394498315,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/5.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1931482 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[898] not found within the scope .\n","UVM_ERROR @   1931482 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[898] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"6.spi_device_mem_parity.53088728186584428944291322757284739000967883020998745347187665630607361934538","seed":53088728186584428944291322757284739000967883020998745347187665630607361934538,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/6.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   3547577 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[978] not found within the scope .\n","UVM_ERROR @   3547577 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[978] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"7.spi_device_mem_parity.108597719274239788755960803719155749107876670251352779216829967305801690010282","seed":108597719274239788755960803719155749107876670251352779216829967305801690010282,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/7.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1649265 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[900] not found within the scope .\n","UVM_ERROR @   1649265 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[900] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"8.spi_device_mem_parity.55036337706881024614694307630692565804512984649888694622202565321445785087141","seed":55036337706881024614694307630692565804512984649888694622202565321445785087141,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/8.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1264469 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[948] not found within the scope .\n","UVM_ERROR @   1264469 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[948] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"9.spi_device_mem_parity.66589659260328055278741122501745627679673292319100173923278642595297037682666","seed":66589659260328055278741122501745627679673292319100173923278642595297037682666,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/9.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   4794350 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[982] not found within the scope .\n","UVM_ERROR @   4794350 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[982] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"10.spi_device_mem_parity.102655231347967912384971873795105947244373405782422441919427298217002772589971","seed":102655231347967912384971873795105947244373405782422441919427298217002772589971,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/10.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   3793005 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[907] not found within the scope .\n","UVM_ERROR @   3793005 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[907] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"11.spi_device_mem_parity.111301715148730906291621353912261925396547758874886387043907064951534679365625","seed":111301715148730906291621353912261925396547758874886387043907064951534679365625,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/11.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   5299115 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[981] not found within the scope .\n","UVM_ERROR @   5299115 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[981] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"12.spi_device_mem_parity.83141895355403074898953517285248479621401092552109503754089759878451352502590","seed":83141895355403074898953517285248479621401092552109503754089759878451352502590,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/12.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1759895 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[959] not found within the scope .\n","UVM_ERROR @   1759895 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[959] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"13.spi_device_mem_parity.9043819033347868865984538832284827383987221048911427663025407445032672879563","seed":9043819033347868865984538832284827383987221048911427663025407445032672879563,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/13.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @    975288 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[983] not found within the scope .\n","UVM_ERROR @    975288 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[983] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"14.spi_device_mem_parity.48870267063492203311829779336429043775694131015602686326782853922480999220734","seed":48870267063492203311829779336429043775694131015602686326782853922480999220734,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/14.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @    920783 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[971] not found within the scope .\n","UVM_ERROR @    920783 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[971] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"15.spi_device_mem_parity.81975815385204892796963423200143866723064793791330290471587901481275560383358","seed":81975815385204892796963423200143866723064793791330290471587901481275560383358,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/15.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   2244964 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[904] not found within the scope .\n","UVM_ERROR @   2244964 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[904] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"16.spi_device_mem_parity.40883990953527191435092676573489368706669161779898693175887755973770388451994","seed":40883990953527191435092676573489368706669161779898693175887755973770388451994,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/16.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   2076226 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[991] not found within the scope .\n","UVM_ERROR @   2076226 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[991] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"17.spi_device_mem_parity.36494786229275313639862003740861143799971824360619034763773023285136083915775","seed":36494786229275313639862003740861143799971824360619034763773023285136083915775,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/17.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   3997377 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[903] not found within the scope .\n","UVM_ERROR @   3997377 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[903] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"18.spi_device_mem_parity.56676513313405705873603015443945256641960030035296524819494408503522827424254","seed":56676513313405705873603015443945256641960030035296524819494408503522827424254,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/18.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   2774763 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[994] not found within the scope .\n","UVM_ERROR @   2774763 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[994] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"19.spi_device_mem_parity.2152969991678222222265547332818294759290155103785261056307845361032280478325","seed":2152969991678222222265547332818294759290155103785261056307845361032280478325,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/19.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   4490557 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[909] not found within the scope .\n","UVM_ERROR @   4490557 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[909] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.56772406229750935002693310150390822481596421080417764609566659675454733942189","seed":56772406229750935002693310150390822481596421080417764609566659675454733942189,"line":85,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @    882143 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x56aa0f [10101101010101000001111] vs 0x0 [0]) \n","UVM_ERROR @    956143 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xfa2691 [111110100010011010010001] vs 0x0 [0]) \n","UVM_ERROR @    975143 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x1a22a6 [110100010001010100110] vs 0x0 [0]) \n","UVM_ERROR @   1026143 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xdde036 [110111011110000000110110] vs 0x0 [0]) \n"]}],"UVM_ERROR (spi_device_scoreboard.sv:2815) [scoreboard] Check failed |(intr_trigger_pending & interrupt_mask) == * (* [*] vs * [*])":[{"name":"spi_device_flash_and_tpm","qual_name":"24.spi_device_flash_and_tpm.63967710173334861002499774213472781635263318641389437374373357498145418555787","seed":63967710173334861002499774213472781635263318641389437374373357498145418555787,"line":106,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/24.spi_device_flash_and_tpm/latest/run.log","log_context":["UVM_INFO @ 45619443772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (spi_device_scoreboard.sv:2352) [scoreboard] Check failed item.d_data[i] == intr_exp[i] (* [*] vs * [*]) Compare ReadbufWatermark mismatch, act (*) != exp *":[{"name":"spi_device_stress_all","qual_name":"41.spi_device_stress_all.40160927154624585700184659204534816715284415518206772643175681144929713579307","seed":40160927154624585700184659204534816715284415518206772643175681144929713579307,"line":136,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/41.spi_device_stress_all/latest/run.log","log_context":["UVM_INFO @ 13756257032 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::spi_device_flash_all_vseq.main_seq.unmblk1 - END:running iteration 0/2\n","UVM_INFO @ 13756257032 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::spi_device_flash_all_vseq.main_seq.unmblk1 - running iteration 1/2\n","UVM_INFO @ 13806237032 ps: (spi_device_tpm_read_hw_reg_vseq.sv:48) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.tpm_vseq] starting sequence 2/14\n","tl_ul_fuzzy_flash_status_q[i] = 0x98e488\n"]}]}},"passed":1128,"total":1151,"percent":98.00173761946134}