{"block":{"name":"dma","variant":null,"commit":"2348eb2d2a78c1cb023cfd0db2dc7500b046cbf7","commit_short":"2348eb2","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/2348eb2d2a78c1cb023cfd0db2dc7500b046cbf7","revision_info":"GitHub Revision: [`2348eb2`](https://github.com/lowrisc/opentitan/tree/2348eb2d2a78c1cb023cfd0db2dc7500b046cbf7)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-06-06T03:31:11Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/dma/data/dma_testplan.html","stages":{"V1":{"testpoints":{"dma_memory_smoke":{"tests":{"dma_memory_smoke":{"max_time":8.0,"sim_time":1566.96166,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"dma_handshake_smoke":{"tests":{"dma_handshake_smoke":{"max_time":8.0,"sim_time":1572.066882,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"dma_generic_smoke":{"tests":{"dma_generic_smoke":{"max_time":9.0,"sim_time":862.957885,"passed":50,"total":50,"percent":100.0}},"passed":50,"total":50,"percent":100.0},"csr_hw_reset":{"tests":{"dma_csr_hw_reset":{"max_time":2.0,"sim_time":28.902168000000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"dma_csr_rw":{"max_time":2.0,"sim_time":19.842363000000002,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_bit_bash":{"tests":{"dma_csr_bit_bash":{"max_time":11.0,"sim_time":607.4629540000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"dma_csr_aliasing":{"max_time":8.0,"sim_time":2015.251669,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"dma_csr_mem_rw_with_rand_reset":{"max_time":2.0,"sim_time":102.354946,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"dma_csr_rw":{"max_time":2.0,"sim_time":19.842363000000002,"passed":5,"total":5,"percent":100.0},"dma_csr_aliasing":{"max_time":8.0,"sim_time":2015.251669,"passed":1,"total":1,"percent":100.0}},"passed":6,"total":6,"percent":100.0}},"passed":113,"total":113,"percent":100.0},"V2":{"testpoints":{"dma_memory_region_lock":{"tests":{"dma_memory_region_lock":{"max_time":99.0,"sim_time":26583.393322,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"dma_memory_tl_error":{"tests":{"dma_memory_stress":{"max_time":685.0,"sim_time":55623.369177,"passed":3,"total":3,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"dma_handshake_tl_error":{"tests":{"dma_handshake_stress":{"max_time":1673.0,"sim_time":144550.263973,"passed":3,"total":3,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"dma_handshake_stress":{"tests":{"dma_handshake_stress":{"max_time":1673.0,"sim_time":144550.263973,"passed":3,"total":3,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"dma_memory_stress":{"tests":{"dma_memory_stress":{"max_time":685.0,"sim_time":55623.369177,"passed":3,"total":3,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"dma_generic_stress":{"tests":{"dma_generic_stress":{"max_time":1423.0,"sim_time":95007.829491,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"dma_handshake_mem_buffer_overflow":{"tests":{"dma_handshake_stress":{"max_time":1673.0,"sim_time":144550.263973,"passed":3,"total":3,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"dma_abort":{"tests":{"dma_abort":{"max_time":16.0,"sim_time":1731.88211,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"dma_stress_all":{"tests":{"dma_stress_all":{"max_time":189.0,"sim_time":22113.417103,"passed":3,"total":3,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"alert_test":{"tests":{"dma_alert_test":{"max_time":2.0,"sim_time":27.435869,"passed":10,"total":10,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"intr_test":{"tests":{"dma_intr_test":{"max_time":2.0,"sim_time":17.105632,"passed":10,"total":10,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"dma_tl_errors":{"max_time":5.0,"sim_time":441.401978,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"tl_d_illegal_access":{"tests":{"dma_tl_errors":{"max_time":5.0,"sim_time":441.401978,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"tl_d_outstanding_access":{"tests":{"dma_csr_hw_reset":{"max_time":2.0,"sim_time":28.902168000000003,"passed":1,"total":1,"percent":100.0},"dma_csr_rw":{"max_time":2.0,"sim_time":19.842363000000002,"passed":5,"total":5,"percent":100.0},"dma_csr_aliasing":{"max_time":8.0,"sim_time":2015.251669,"passed":1,"total":1,"percent":100.0},"dma_same_csr_outstanding":{"max_time":3.0,"sim_time":760.807093,"passed":5,"total":5,"percent":100.0}},"passed":12,"total":12,"percent":100.0},"tl_d_partial_access":{"tests":{"dma_csr_hw_reset":{"max_time":2.0,"sim_time":28.902168000000003,"passed":1,"total":1,"percent":100.0},"dma_csr_rw":{"max_time":2.0,"sim_time":19.842363000000002,"passed":5,"total":5,"percent":100.0},"dma_csr_aliasing":{"max_time":8.0,"sim_time":2015.251669,"passed":1,"total":1,"percent":100.0},"dma_same_csr_outstanding":{"max_time":3.0,"sim_time":760.807093,"passed":5,"total":5,"percent":100.0}},"passed":12,"total":12,"percent":100.0}},"passed":81,"total":81,"percent":100.0},"V2S":{"testpoints":{"dma_illegal_addr_range":{"tests":{"dma_mem_enabled":{"max_time":28.0,"sim_time":702.958544,"passed":5,"total":5,"percent":100.0},"dma_generic_stress":{"max_time":1423.0,"sim_time":95007.829491,"passed":5,"total":5,"percent":100.0},"dma_handshake_stress":{"max_time":1673.0,"sim_time":144550.263973,"passed":3,"total":3,"percent":100.0}},"passed":13,"total":13,"percent":100.0},"dma_config_lock":{"tests":{"dma_config_lock":{"max_time":12.0,"sim_time":1277.867571,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"tl_intg_err":{"tests":{"dma_tl_intg_err":{"max_time":5.0,"sim_time":191.571,"passed":25,"total":25,"percent":100.0},"dma_sec_cm":{"max_time":2.0,"sim_time":33.221347,"passed":5,"total":5,"percent":100.0}},"passed":30,"total":30,"percent":100.0}},"passed":58,"total":58,"percent":100.0},"unmapped":{"testpoints":{"Unmapped":{"tests":{"dma_short_transfer":{"max_time":227.0,"sim_time":21752.804081000002,"passed":25,"total":25,"percent":100.0},"dma_longer_transfer":{"max_time":138.0,"sim_time":22982.550511,"passed":5,"total":5,"percent":100.0},"dma_stress_all_with_rand_reset":{"max_time":16.0,"sim_time":2088.761504,"passed":0,"total":1,"percent":0.0}},"passed":30,"total":31,"percent":96.7741935483871}},"passed":30,"total":31,"percent":96.7741935483871}},"coverage":{"code":{"block":97.38,"line_statement":96.89,"branch":95.83,"condition_expression":null,"toggle":83.12,"fsm":92.96},"assertion":96.61,"functional":77.49},"cov_report_page":"/nightly/current_run/scratch/master/dma-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR @ *ps: (cip_base_vseq.sv:1287) [dma_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"dma_stress_all_with_rand_reset","qual_name":"0.dma_stress_all_with_rand_reset.91882038732284347788154365629917685249933053689118480397758530833922819199167","seed":91882038732284347788154365629917685249933053689118480397758530833922819199167,"line":122,"log_path":"/nightly/current_run/scratch/master/dma-sim-xcelium/0.dma_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 2088761504ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":267,"total":268,"percent":99.6268656716418}