{"block":{"name":"spi_device","variant":"1r1w","commit":"c632d919cc88f9ca17b4571c502e5b90feb817d7","commit_short":"c632d91","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/c632d919cc88f9ca17b4571c502e5b90feb817d7","revision_info":"GitHub Revision: [`c632d91`](https://github.com/lowrisc/opentitan/tree/c632d919cc88f9ca17b4571c502e5b90feb817d7)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-07-03T15:00:30Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/spi_device_1r1w/data/spi_device_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"spi_device_flash_and_tpm":{"max_time":402.0,"sim_time":33308.193039,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"csr_hw_reset":{"tests":{"spi_device_csr_hw_reset":{"max_time":1.0,"sim_time":38.679497000000005,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"spi_device_csr_rw":{"max_time":7.0,"sim_time":218.48521100000002,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"csr_bit_bash":{"tests":{"spi_device_csr_bit_bash":{"max_time":44.0,"sim_time":2336.1491800000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"spi_device_csr_aliasing":{"max_time":6.0,"sim_time":112.389518,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"spi_device_csr_mem_rw_with_rand_reset":{"max_time":8.0,"sim_time":804.522171,"passed":5,"total":5,"percent":100.0}},"passed":5,"total":5,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"spi_device_csr_rw":{"max_time":7.0,"sim_time":218.48521100000002,"passed":5,"total":5,"percent":100.0},"spi_device_csr_aliasing":{"max_time":6.0,"sim_time":112.389518,"passed":1,"total":1,"percent":100.0}},"passed":6,"total":6,"percent":100.0},"mem_walk":{"tests":{"spi_device_mem_walk":{"max_time":1.0,"sim_time":12.479811999999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mem_partial_access":{"tests":{"spi_device_mem_partial_access":{"max_time":3.0,"sim_time":152.06820499999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"V2":{"testpoints":{"csb_read":{"tests":{"spi_device_csb_read":{"max_time":3.0,"sim_time":18.745169,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"mem_parity":{"tests":{"spi_device_mem_parity":{"max_time":2.0,"sim_time":3.986203,"passed":0,"total":20,"percent":0.0}},"passed":0,"total":20,"percent":0.0},"mem_cfg":{"tests":{"spi_device_ram_cfg":{"max_time":2.0,"sim_time":7.126421000000001,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tpm_read":{"tests":{"spi_device_tpm_rw":{"max_time":11.0,"sim_time":238.071378,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"tpm_write":{"tests":{"spi_device_tpm_rw":{"max_time":11.0,"sim_time":238.071378,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"tpm_hw_reg":{"tests":{"spi_device_tpm_read_hw_reg":{"max_time":45.0,"sim_time":4894.961803,"passed":15,"total":15,"percent":100.0},"spi_device_tpm_sts_read":{"max_time":3.0,"sim_time":73.128637,"passed":15,"total":15,"percent":100.0}},"passed":30,"total":30,"percent":100.0},"tpm_fully_random_case":{"tests":{"spi_device_tpm_all":{"max_time":136.0,"sim_time":21497.631934,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"pass_cmd_filtering":{"tests":{"spi_device_pass_cmd_filtering":{"max_time":80.0,"sim_time":15289.404601,"passed":15,"total":15,"percent":100.0},"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"pass_addr_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":57.0,"sim_time":5941.437842,"passed":15,"total":15,"percent":100.0},"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"pass_payload_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":57.0,"sim_time":5941.437842,"passed":15,"total":15,"percent":100.0},"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"cmd_info_slots":{"tests":{"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"cmd_read_status":{"tests":{"spi_device_intercept":{"max_time":35.0,"sim_time":6143.847751,"passed":15,"total":15,"percent":100.0},"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"cmd_read_jedec":{"tests":{"spi_device_intercept":{"max_time":35.0,"sim_time":6143.847751,"passed":15,"total":15,"percent":100.0},"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"cmd_read_sfdp":{"tests":{"spi_device_intercept":{"max_time":35.0,"sim_time":6143.847751,"passed":15,"total":15,"percent":100.0},"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"cmd_fast_read":{"tests":{"spi_device_intercept":{"max_time":35.0,"sim_time":6143.847751,"passed":15,"total":15,"percent":100.0},"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"cmd_read_pipeline":{"tests":{"spi_device_intercept":{"max_time":35.0,"sim_time":6143.847751,"passed":15,"total":15,"percent":100.0},"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"flash_cmd_upload":{"tests":{"spi_device_upload":{"max_time":48.0,"sim_time":5800.788341,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"mailbox_command":{"tests":{"spi_device_mailbox":{"max_time":157.0,"sim_time":24450.776351,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"mailbox_cross_outside_command":{"tests":{"spi_device_mailbox":{"max_time":157.0,"sim_time":24450.776351,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"mailbox_cross_inside_command":{"tests":{"spi_device_mailbox":{"max_time":157.0,"sim_time":24450.776351,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"cmd_read_buffer":{"tests":{"spi_device_flash_mode":{"max_time":72.0,"sim_time":10843.353445,"passed":15,"total":15,"percent":100.0},"spi_device_read_buffer_direct":{"max_time":40.0,"sim_time":2929.009215,"passed":15,"total":15,"percent":100.0}},"passed":30,"total":30,"percent":100.0},"cmd_dummy_cycle":{"tests":{"spi_device_mailbox":{"max_time":157.0,"sim_time":24450.776351,"passed":15,"total":15,"percent":100.0},"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":40,"total":40,"percent":100.0},"quad_spi":{"tests":{"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"dual_spi":{"tests":{"spi_device_flash_all":{"max_time":414.0,"sim_time":136463.892617,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"4b_3b_feature":{"tests":{"spi_device_cfg_cmd":{"max_time":34.0,"sim_time":8464.825455,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"write_enable_disable":{"tests":{"spi_device_cfg_cmd":{"max_time":34.0,"sim_time":8464.825455,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"flash_mode_ignore_cmds":{"tests":{"spi_device_flash_mode_ignore_cmds":{"max_time":366.0,"sim_time":35112.067866,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"TPM_with_flash_or_passthrough_mode":{"tests":{"spi_device_flash_and_tpm":{"max_time":402.0,"sim_time":33308.193039,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"tpm_and_flash_trans_with_min_inactive_time":{"tests":{"spi_device_flash_and_tpm_min_idle":{"max_time":2749.0,"sim_time":1500000.0,"passed":24,"total":25,"percent":96.0}},"passed":24,"total":25,"percent":96.0},"stress_all":{"tests":{"spi_device_stress_all":{"max_time":1410.0,"sim_time":339452.076102,"passed":15,"total":15,"percent":100.0}},"passed":15,"total":15,"percent":100.0},"alert_test":{"tests":{"spi_device_alert_test":{"max_time":7.0,"sim_time":43.839957999999996,"passed":10,"total":10,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"intr_test":{"tests":{"spi_device_intr_test":{"max_time":2.0,"sim_time":31.666313,"passed":10,"total":10,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"spi_device_tl_errors":{"max_time":13.0,"sim_time":230.42876199999998,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"tl_d_illegal_access":{"tests":{"spi_device_tl_errors":{"max_time":13.0,"sim_time":230.42876199999998,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0},"tl_d_outstanding_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":1.0,"sim_time":38.679497000000005,"passed":1,"total":1,"percent":100.0},"spi_device_csr_rw":{"max_time":7.0,"sim_time":218.48521100000002,"passed":5,"total":5,"percent":100.0},"spi_device_csr_aliasing":{"max_time":6.0,"sim_time":112.389518,"passed":1,"total":1,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":8.0,"sim_time":60.253919,"passed":5,"total":5,"percent":100.0}},"passed":12,"total":12,"percent":100.0},"tl_d_partial_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":1.0,"sim_time":38.679497000000005,"passed":1,"total":1,"percent":100.0},"spi_device_csr_rw":{"max_time":7.0,"sim_time":218.48521100000002,"passed":5,"total":5,"percent":100.0},"spi_device_csr_aliasing":{"max_time":6.0,"sim_time":112.389518,"passed":1,"total":1,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":8.0,"sim_time":60.253919,"passed":5,"total":5,"percent":100.0}},"passed":12,"total":12,"percent":100.0}},"passed":356,"total":378,"percent":94.17989417989418},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"spi_device_sec_cm":{"max_time":3.0,"sim_time":90.9549,"passed":5,"total":5,"percent":100.0},"spi_device_tl_intg_err":{"max_time":39.0,"sim_time":2874.00787,"passed":25,"total":25,"percent":100.0}},"passed":30,"total":30,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"spi_device_tl_intg_err":{"max_time":39.0,"sim_time":2874.00787,"passed":25,"total":25,"percent":100.0}},"passed":25,"total":25,"percent":100.0}},"passed":30,"total":30,"percent":100.0}},"coverage":{"code":{"block":98.41,"line_statement":98.81,"branch":97.12,"condition_expression":null,"toggle":81.25,"fsm":89.58},"assertion":95.52,"functional":69.53},"cov_report_page":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ1] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)":[{"name":"spi_device_mem_parity","qual_name":"0.spi_device_mem_parity.70879937607639186691752491002363731885560810915030983561406244449258845517820","seed":70879937607639186691752491002363731885560810915030983561406244449258845517820,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   2811985 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[984] not found within the scope .\n","UVM_ERROR @   2811985 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[984] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"1.spi_device_mem_parity.87212140910998921603895642607616946026123607463851415201591565136369767622780","seed":87212140910998921603895642607616946026123607463851415201591565136369767622780,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/1.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   3086212 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[993] not found within the scope .\n","UVM_ERROR @   3086212 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[993] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"2.spi_device_mem_parity.95226459850486945178495147260708481187391522122534774169768538518168618431860","seed":95226459850486945178495147260708481187391522122534774169768538518168618431860,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/2.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   5652369 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[987] not found within the scope .\n","UVM_ERROR @   5652369 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[987] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"3.spi_device_mem_parity.54270969101214182570809576272713185321469161395148125200849563649069656335938","seed":54270969101214182570809576272713185321469161395148125200849563649069656335938,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/3.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1688529 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[1001] not found within the scope .\n","UVM_ERROR @   1688529 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[1001] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"4.spi_device_mem_parity.40192354526690535414309948893148983125663901116588368427847725906483413032358","seed":40192354526690535414309948893148983125663901116588368427847725906483413032358,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/4.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1230502 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[945] not found within the scope .\n","UVM_ERROR @   1230502 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[945] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"5.spi_device_mem_parity.110850713131993404252325364882889426481089112066470995165042120351878548594900","seed":110850713131993404252325364882889426481089112066470995165042120351878548594900,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/5.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   4005741 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[920] not found within the scope .\n","UVM_ERROR @   4005741 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[920] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"6.spi_device_mem_parity.8970559306837561378263445145817479457935915533852002207405467413387991492085","seed":8970559306837561378263445145817479457935915533852002207405467413387991492085,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/6.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   4051369 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[957] not found within the scope .\n","UVM_ERROR @   4051369 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[957] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"7.spi_device_mem_parity.6019379035755015826544876931558491801464116739472986015048956639440803381796","seed":6019379035755015826544876931558491801464116739472986015048956639440803381796,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/7.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   4145443 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[910] not found within the scope .\n","UVM_ERROR @   4145443 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[910] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"8.spi_device_mem_parity.107044996497293105998313370046381818435410451557217566888549396851239856764021","seed":107044996497293105998313370046381818435410451557217566888549396851239856764021,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/8.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   2575692 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[931] not found within the scope .\n","UVM_ERROR @   2575692 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[931] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"9.spi_device_mem_parity.59361790072057756850385056468409562380842095323264529514930094832132480704669","seed":59361790072057756850385056468409562380842095323264529514930094832132480704669,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/9.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   2639826 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[913] not found within the scope .\n","UVM_ERROR @   2639826 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[913] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"10.spi_device_mem_parity.68659527637530042805180862421468867051894295151371577758796805087100856955020","seed":68659527637530042805180862421468867051894295151371577758796805087100856955020,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/10.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @    951842 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[934] not found within the scope .\n","UVM_ERROR @    951842 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[934] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"11.spi_device_mem_parity.101999212490209501160986273186120163766091895413186977064204764435696736030236","seed":101999212490209501160986273186120163766091895413186977064204764435696736030236,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/11.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1323278 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[908] not found within the scope .\n","UVM_ERROR @   1323278 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[908] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"12.spi_device_mem_parity.80976200652271144520263267604105676223649139735903232609557688803571366127471","seed":80976200652271144520263267604105676223649139735903232609557688803571366127471,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/12.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1930328 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[925] not found within the scope .\n","UVM_ERROR @   1930328 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[925] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"13.spi_device_mem_parity.19915955280259621389119577414360245660709962758218285942762804825745717752068","seed":19915955280259621389119577414360245660709962758218285942762804825745717752068,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/13.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1917446 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[986] not found within the scope .\n","UVM_ERROR @   1917446 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[986] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"14.spi_device_mem_parity.98879560373743148489224640597435319278678964694926500317670370832654132023499","seed":98879560373743148489224640597435319278678964694926500317670370832654132023499,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/14.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @    770909 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[975] not found within the scope .\n","UVM_ERROR @    770909 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[975] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"15.spi_device_mem_parity.110052144981999472375017101234535993537748031906424160245069178066463774284567","seed":110052144981999472375017101234535993537748031906424160245069178066463774284567,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/15.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @    924020 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[1006] not found within the scope .\n","UVM_ERROR @    924020 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[1006] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"16.spi_device_mem_parity.92783713051100864025916571038861302994359665740318871902016442400019997107969","seed":92783713051100864025916571038861302994359665740318871902016442400019997107969,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/16.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   7888176 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[900] not found within the scope .\n","UVM_ERROR @   7888176 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[900] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"17.spi_device_mem_parity.101098311184155578790934474477603264888437224500496637814312147345118748545326","seed":101098311184155578790934474477603264888437224500496637814312147345118748545326,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/17.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1220243 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[918] not found within the scope .\n","UVM_ERROR @   1220243 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[918] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"18.spi_device_mem_parity.629471624169242062806247663952080992910883150353133618553123456990148952284","seed":629471624169242062806247663952080992910883150353133618553123456990148952284,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/18.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1889486 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[1004] not found within the scope .\n","UVM_ERROR @   1889486 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[1004] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]},{"name":"spi_device_mem_parity","qual_name":"19.spi_device_mem_parity.53455078098354850472328467774610711273073584526378988420770650736722130853934","seed":53455078098354850472328467774610711273073584526378988420770650736722130853934,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/19.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1711699 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[956] not found within the scope .\n","UVM_ERROR @   1711699 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[956] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.34218240855983625471477654712119936881433012807799380708887225767036111571092","seed":34218240855983625471477654712119936881433012807799380708887225767036111571092,"line":85,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @   4520421 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xb8b579 [101110001011010101111001] vs 0x0 [0]) \n","UVM_ERROR @   4563421 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x43573c [10000110101011100111100] vs 0x0 [0]) \n","UVM_ERROR @   4644421 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x952b6a [100101010010101101101010] vs 0x0 [0]) \n","UVM_ERROR @   4730421 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x5f0dda [10111110000110111011010] vs 0x0 [0]) \n"]}],"UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue":[{"name":"spi_device_flash_and_tpm_min_idle","qual_name":"2.spi_device_flash_and_tpm_min_idle.77217620358307364743025267952362878266620767175192809662182901992324173748563","seed":77217620358307364743025267952362878266620767175192809662182901992324173748563,"line":109,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/2.spi_device_flash_and_tpm_min_idle/latest/run.log","log_context":["UVM_INFO @ 1500000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":394,"total":416,"percent":94.71153846153847}