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---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"5.gpio_stress_all.89364917817546691791250726736913805400774732067516426812950433861585241364991","seed":89364917817546691791250726736913805400774732067516426812950433861585241364991,"line":127,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 2997617112 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"6.gpio_stress_all.40609265539261239877646471696095680643342755171072061865898072507497790771101","seed":40609265539261239877646471696095680643342755171072061865898072507497790771101,"line":488,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 3698584176 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"7.gpio_stress_all.4577854507669980602276981141577903930911301525829920827680429978966510235982","seed":4577854507669980602276981141577903930911301525829920827680429978966510235982,"line":426,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 2274117294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"8.gpio_stress_all.72699225736154389594334505089107862230114198327967102429617171175766120177364","seed":72699225736154389594334505089107862230114198327967102429617171175766120177364,"line":76,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @  13146243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"9.gpio_stress_all.46808857733500889973311934517548681734094177363631598512621530522576444462943","seed":46808857733500889973311934517548681734094177363631598512621530522576444462943,"line":1073,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 3079259492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -*":[{"name":"gpio_stress_all_with_rand_reset","qual_name":"0.gpio_stress_all_with_rand_reset.99847940196826505319944319535221508651219055703779666934665826295362883318969","seed":99847940196826505319944319535221508651219055703779666934665826295362883318969,"line":78,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @   4898162 ps: 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---\n","\n","\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"9.gpio_stress_all_with_rand_reset.52862736575559099551599818364080552092971809108759638461007649573012175794093","seed":52862736575559099551599818364080552092971809108759638461007649573012175794093,"line":78,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 134582856 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_* reset value: 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(uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"3.gpio_stress_all_with_rand_reset.89365067404077405532530741016970040890635372065839172783610625498929826868141","seed":89365067404077405532530741016970040890635372065839172783610625498929826868141,"line":301,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 4042533645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"5.gpio_stress_all_with_rand_reset.82398979541182256149626166557817163933516056061528437917806815054781278327905","seed":82398979541182256149626166557817163933516056061528437917806815054781278327905,"line":354,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 4230601499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"6.gpio_stress_all_with_rand_reset.36207625585246088471420777076031365254398063548480448144093737891333929883812","seed":36207625585246088471420777076031365254398063548480448144093737891333929883812,"line":80,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  26286248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"7.gpio_stress_all_with_rand_reset.23410775754177840766788110073184022064270238979971877446904178608823373122448","seed":23410775754177840766788110073184022064270238979971877446904178608823373122448,"line":254,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 613972378 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"8.gpio_stress_all_with_rand_reset.87156514144008254965727091197234434639072111928600021001615616363345992642563","seed":87156514144008254965727091197234434639072111928600021001615616363345992642563,"line":80,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  10224017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:660) [gpio_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch":[{"name":"gpio_same_csr_outstanding","qual_name":"4.gpio_same_csr_outstanding.35256502000366758911775958519251063119411698546943979788215253103784613347906","seed":35256502000366758911775958519251063119411698546943979788215253103784613347906,"line":78,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_same_csr_outstanding/latest/run.log","log_context":["UVM_INFO @  18379861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: gpio_reg_block.inp_prd_cnt_ctrl_*.enable reset value: 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