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/nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1854867969 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_min_thold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/0.aon_timer_smoke_min_thold.1854867969 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 0.aon_timer_smoke_min_thold.1854867969 -covoverwrite' seed=99418809679363151112318242703806950999849618452769340484061656621789605726721 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=99418809679363151112318242703806950999849618452769340484061656621789605726721 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_smoke_min_thold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_min_thold_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_wkup_count_cdc_hi","qual_name":"0.aon_timer_wkup_count_cdc_hi.8434439530501769394037631041695483269536150026741939219074435608735167647389","seed":8434439530501769394037631041695483269536150026741939219074435608735167647389,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_wkup_count_cdc_hi/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_wkup_count_cdc_hi/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2575404701 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_wkup_count_cdc_hi_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/0.aon_timer_wkup_count_cdc_hi.2575404701 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 0.aon_timer_wkup_count_cdc_hi.2575404701 -covoverwrite' seed=8434439530501769394037631041695483269536150026741939219074435608735167647389 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=8434439530501769394037631041695483269536150026741939219074435608735167647389 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_wkup_count_cdc_hi/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_wkup_count_cdc_hi_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alternating_enable_on_off","qual_name":"0.aon_timer_alternating_enable_on_off.73898464504379908444006701280856610099425719557523307764145093438796796367190","seed":73898464504379908444006701280856610099425719557523307764145093438796796367190,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_alternating_enable_on_off/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_alternating_enable_on_off/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3010302294 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_alternating_enable_on_off_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/0.aon_timer_alternating_enable_on_off.3010302294 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 0.aon_timer_alternating_enable_on_off.3010302294 -covoverwrite' seed=73898464504379908444006701280856610099425719557523307764145093438796796367190 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=73898464504379908444006701280856610099425719557523307764145093438796796367190 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_alternating_enable_on_off/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_alternating_enable_on_off_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"0.aon_timer_stress_all_with_rand_reset.77038293359901420666387842434253235046985917255054957227583484277364436450200","seed":77038293359901420666387842434253235046985917255054957227583484277364436450200,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2711305112 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/0.aon_timer_stress_all_with_rand_reset.2711305112 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 0.aon_timer_stress_all_with_rand_reset.2711305112 -covoverwrite' seed=77038293359901420666387842434253235046985917255054957227583484277364436450200 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=77038293359901420666387842434253235046985917255054957227583484277364436450200 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_sec_cm","qual_name":"0.aon_timer_sec_cm.36347139974820053010203632420305451390150966783383115012674297529234409771745","seed":36347139974820053010203632420305451390150966783383115012674297529234409771745,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1997656801 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/0.aon_timer_sec_cm.1997656801 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 0.aon_timer_sec_cm.1997656801 -covoverwrite' seed=36347139974820053010203632420305451390150966783383115012674297529234409771745 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=36347139974820053010203632420305451390150966783383115012674297529234409771745 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"0.aon_timer_tl_errors.91469170033149915010101436181251129408135228791999711861662970329811082606012","seed":91469170033149915010101436181251129408135228791999711861662970329811082606012,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1413805500 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_tl_errors.1413805500 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_tl_errors.1413805500 -covoverwrite' seed=91469170033149915010101436181251129408135228791999711861662970329811082606012 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=91469170033149915010101436181251129408135228791999711861662970329811082606012 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"0.aon_timer_tl_intg_err.1799361671704897831767520350833612372979882298595737435564325271021015407006","seed":1799361671704897831767520350833612372979882298595737435564325271021015407006,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2055870878 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_tl_intg_err.2055870878 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_tl_intg_err.2055870878 -covoverwrite' seed=1799361671704897831767520350833612372979882298595737435564325271021015407006 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=1799361671704897831767520350833612372979882298595737435564325271021015407006 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"0.aon_timer_intr_test.101738555621182627541267218597009441947644167205329591155802980446498369970526","seed":101738555621182627541267218597009441947644167205329591155802980446498369970526,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2445680990 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_intr_test.2445680990 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_intr_test.2445680990 -covoverwrite' seed=101738555621182627541267218597009441947644167205329591155802980446498369970526 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=101738555621182627541267218597009441947644167205329591155802980446498369970526 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"0.aon_timer_alert_test.7108932842357662939333113353543437634486773494932115215694408579069483708796","seed":7108932842357662939333113353543437634486773494932115215694408579069483708796,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=4021580156 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/0.aon_timer_alert_test.4021580156 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 0.aon_timer_alert_test.4021580156 -covoverwrite' seed=7108932842357662939333113353543437634486773494932115215694408579069483708796 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=7108932842357662939333113353543437634486773494932115215694408579069483708796 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_mem_walk","qual_name":"0.aon_timer_mem_walk.69548890720498990531861894467118000307943893826767925607275201419638648849048","seed":69548890720498990531861894467118000307943893826767925607275201419638648849048,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_mem_walk/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_mem_walk/latest run_opts='+csr_mem_walk +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=524272280 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_mem_walk.524272280 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_mem_walk.524272280 -covoverwrite' seed=69548890720498990531861894467118000307943893826767925607275201419638648849048 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=69548890720498990531861894467118000307943893826767925607275201419638648849048 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_mem_walk/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_mem_partial_access","qual_name":"0.aon_timer_mem_partial_access.45569086779140580840898117477355496178479099470620446642147358287828005169623","seed":45569086779140580840898117477355496178479099470620446642147358287828005169623,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_mem_partial_access/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_mem_partial_access/latest run_opts='+run_mem_partial_access +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3846449623 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_mem_partial_access.3846449623 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_mem_partial_access.3846449623 -covoverwrite' seed=45569086779140580840898117477355496178479099470620446642147358287828005169623 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=45569086779140580840898117477355496178479099470620446642147358287828005169623 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_mem_partial_access/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_hw_reset","qual_name":"0.aon_timer_csr_hw_reset.33248606507106402011112579487240673188144331046347386334243178008398447946586","seed":33248606507106402011112579487240673188144331046347386334243178008398447946586,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_hw_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_hw_reset/latest run_opts='+csr_hw_reset +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=254978906 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_csr_hw_reset.254978906 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_csr_hw_reset.254978906 -covoverwrite' seed=33248606507106402011112579487240673188144331046347386334243178008398447946586 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=33248606507106402011112579487240673188144331046347386334243178008398447946586 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_hw_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_rw","qual_name":"0.aon_timer_csr_rw.95702961312515688141795443996781814983097574449059846316900478638794081654928","seed":95702961312515688141795443996781814983097574449059846316900478638794081654928,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_rw/latest run_opts='+csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2416269456 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_csr_rw.2416269456 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_csr_rw.2416269456 -covoverwrite' seed=95702961312515688141795443996781814983097574449059846316900478638794081654928 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=95702961312515688141795443996781814983097574449059846316900478638794081654928 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_bit_bash","qual_name":"0.aon_timer_csr_bit_bash.37382239690495910810046653260707897393624786521829089834377761196678425963289","seed":37382239690495910810046653260707897393624786521829089834377761196678425963289,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_bit_bash/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_bit_bash/latest run_opts='+csr_bit_bash +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3729615641 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_csr_bit_bash.3729615641 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_csr_bit_bash.3729615641 -covoverwrite' seed=37382239690495910810046653260707897393624786521829089834377761196678425963289 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=37382239690495910810046653260707897393624786521829089834377761196678425963289 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_bit_bash/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_aliasing","qual_name":"0.aon_timer_csr_aliasing.72436735275996075491426984927386515050393989607774997327844556499223645179054","seed":72436735275996075491426984927386515050393989607774997327844556499223645179054,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_aliasing/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_aliasing/latest run_opts='+csr_aliasing +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3761687726 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_csr_aliasing.3761687726 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_csr_aliasing.3761687726 -covoverwrite' seed=72436735275996075491426984927386515050393989607774997327844556499223645179054 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=72436735275996075491426984927386515050393989607774997327844556499223645179054 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_aliasing/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_same_csr_outstanding","qual_name":"0.aon_timer_same_csr_outstanding.85089406330631748548018625289897233444078439210676894976442329225967506832573","seed":85089406330631748548018625289897233444078439210676894976442329225967506832573,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=247217341 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_same_csr_outstanding.247217341 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_same_csr_outstanding.247217341 -covoverwrite' seed=85089406330631748548018625289897233444078439210676894976442329225967506832573 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=85089406330631748548018625289897233444078439210676894976442329225967506832573 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_mem_rw_with_rand_reset","qual_name":"0.aon_timer_csr_mem_rw_with_rand_reset.74055056819640853437876409310552286350143123856488306106032778853589890480947","seed":74055056819640853437876409310552286350143123856488306106032778853589890480947,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1916123955 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/0.aon_timer_csr_mem_rw_with_rand_reset.1916123955 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 0.aon_timer_csr_mem_rw_with_rand_reset.1916123955 -covoverwrite' seed=74055056819640853437876409310552286350143123856488306106032778853589890480947 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=74055056819640853437876409310552286350143123856488306106032778853589890480947 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/0.aon_timer_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke","qual_name":"1.aon_timer_smoke.36791127398953595782968408240613423378743587671285495329740461266174877365632","seed":36791127398953595782968408240613423378743587671285495329740461266174877365632,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3022517632 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_smoke.3022517632 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_smoke.3022517632 -covoverwrite' seed=36791127398953595782968408240613423378743587671285495329740461266174877365632 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=36791127398953595782968408240613423378743587671285495329740461266174877365632 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"1.aon_timer_prescaler.50718146831808286608573338407992762346900228243887954090674155195628783691043","seed":50718146831808286608573338407992762346900228243887954090674155195628783691043,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2950718755 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_prescaler.2950718755 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_prescaler.2950718755 -covoverwrite' seed=50718146831808286608573338407992762346900228243887954090674155195628783691043 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=50718146831808286608573338407992762346900228243887954090674155195628783691043 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_jump","qual_name":"1.aon_timer_jump.88897986214033703089031359905831054631767854710047692168588899656050897060516","seed":88897986214033703089031359905831054631767854710047692168588899656050897060516,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_jump/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_jump/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1148191396 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_jump_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_jump.1148191396 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_jump.1148191396 -covoverwrite' seed=88897986214033703089031359905831054631767854710047692168588899656050897060516 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=88897986214033703089031359905831054631767854710047692168588899656050897060516 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_jump/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_jump_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_custom_intr","qual_name":"1.aon_timer_custom_intr.42607373139442066546752204292006251063741456751024083833771607131352318512646","seed":42607373139442066546752204292006251063741456751024083833771607131352318512646,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_custom_intr/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_custom_intr/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3334376966 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_custom_intr_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_custom_intr.3334376966 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_custom_intr.3334376966 -covoverwrite' seed=42607373139442066546752204292006251063741456751024083833771607131352318512646 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=42607373139442066546752204292006251063741456751024083833771607131352318512646 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_custom_intr/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_custom_intr_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke_max_thold","qual_name":"1.aon_timer_smoke_max_thold.73327591353642289160219052682223754044152414046669403642069734121889429198299","seed":73327591353642289160219052682223754044152414046669403642069734121889429198299,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_smoke_max_thold/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_smoke_max_thold/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2943882715 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_max_thold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_smoke_max_thold.2943882715 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_smoke_max_thold.2943882715 -covoverwrite' seed=73327591353642289160219052682223754044152414046669403642069734121889429198299 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=73327591353642289160219052682223754044152414046669403642069734121889429198299 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_smoke_max_thold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_max_thold_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke_min_thold","qual_name":"1.aon_timer_smoke_min_thold.63905703909196790045843975265526047019675034654158468901421068213897547438612","seed":63905703909196790045843975265526047019675034654158468901421068213897547438612,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_smoke_min_thold/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_smoke_min_thold/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2158189076 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_min_thold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_smoke_min_thold.2158189076 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_smoke_min_thold.2158189076 -covoverwrite' seed=63905703909196790045843975265526047019675034654158468901421068213897547438612 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=63905703909196790045843975265526047019675034654158468901421068213897547438612 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_smoke_min_thold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_min_thold_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_wkup_count_cdc_hi","qual_name":"1.aon_timer_wkup_count_cdc_hi.78466418522468264935131172093380148985968840550129040985627938996082973703715","seed":78466418522468264935131172093380148985968840550129040985627938996082973703715,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_wkup_count_cdc_hi/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_wkup_count_cdc_hi/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2192408099 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_wkup_count_cdc_hi_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_wkup_count_cdc_hi.2192408099 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_wkup_count_cdc_hi.2192408099 -covoverwrite' seed=78466418522468264935131172093380148985968840550129040985627938996082973703715 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=78466418522468264935131172093380148985968840550129040985627938996082973703715 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_wkup_count_cdc_hi/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_wkup_count_cdc_hi_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alternating_enable_on_off","qual_name":"1.aon_timer_alternating_enable_on_off.51665934119477268295865168214438711925404545413642900473183727377866174513730","seed":51665934119477268295865168214438711925404545413642900473183727377866174513730,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_alternating_enable_on_off/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_alternating_enable_on_off/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3572253250 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_alternating_enable_on_off_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_alternating_enable_on_off.3572253250 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_alternating_enable_on_off.3572253250 -covoverwrite' seed=51665934119477268295865168214438711925404545413642900473183727377866174513730 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=51665934119477268295865168214438711925404545413642900473183727377866174513730 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_alternating_enable_on_off/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_alternating_enable_on_off_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"1.aon_timer_stress_all_with_rand_reset.45856426138104014432217696892336955763398667848812232663004478599215201380415","seed":45856426138104014432217696892336955763398667848812232663004478599215201380415,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1238100031 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_stress_all_with_rand_reset.1238100031 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_stress_all_with_rand_reset.1238100031 -covoverwrite' seed=45856426138104014432217696892336955763398667848812232663004478599215201380415 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=45856426138104014432217696892336955763398667848812232663004478599215201380415 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_sec_cm","qual_name":"1.aon_timer_sec_cm.86308046232093317179622686815961576472649054428858822578501369077295374711516","seed":86308046232093317179622686815961576472649054428858822578501369077295374711516,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=4285315804 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_sec_cm.4285315804 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_sec_cm.4285315804 -covoverwrite' seed=86308046232093317179622686815961576472649054428858822578501369077295374711516 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=86308046232093317179622686815961576472649054428858822578501369077295374711516 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"1.aon_timer_tl_errors.40320441764718218807222519713528681745504492182175545669405930114062778590641","seed":40320441764718218807222519713528681745504492182175545669405930114062778590641,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1524065713 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/1.aon_timer_tl_errors.1524065713 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.aon_timer_tl_errors.1524065713 -covoverwrite' seed=40320441764718218807222519713528681745504492182175545669405930114062778590641 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=40320441764718218807222519713528681745504492182175545669405930114062778590641 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"1.aon_timer_tl_intg_err.22776147353366249959779626138393904402632878133263975131451846274747924252188","seed":22776147353366249959779626138393904402632878133263975131451846274747924252188,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3698624028 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/1.aon_timer_tl_intg_err.3698624028 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.aon_timer_tl_intg_err.3698624028 -covoverwrite' seed=22776147353366249959779626138393904402632878133263975131451846274747924252188 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=22776147353366249959779626138393904402632878133263975131451846274747924252188 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"1.aon_timer_intr_test.7984152699281633463625247672177127375075131860323581283404922068752264666737","seed":7984152699281633463625247672177127375075131860323581283404922068752264666737,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1994989169 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/1.aon_timer_intr_test.1994989169 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.aon_timer_intr_test.1994989169 -covoverwrite' seed=7984152699281633463625247672177127375075131860323581283404922068752264666737 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=7984152699281633463625247672177127375075131860323581283404922068752264666737 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"1.aon_timer_alert_test.28973179572545644544482303187634052303406990748668325405200754601635242909973","seed":28973179572545644544482303187634052303406990748668325405200754601635242909973,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=768942357 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/1.aon_timer_alert_test.768942357 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 1.aon_timer_alert_test.768942357 -covoverwrite' seed=28973179572545644544482303187634052303406990748668325405200754601635242909973 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=28973179572545644544482303187634052303406990748668325405200754601635242909973 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_rw","qual_name":"1.aon_timer_csr_rw.84427695852028361570839503459749343720963996301824107738895763656015365153014","seed":84427695852028361570839503459749343720963996301824107738895763656015365153014,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_csr_rw/latest run_opts='+csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3779731702 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/1.aon_timer_csr_rw.3779731702 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.aon_timer_csr_rw.3779731702 -covoverwrite' seed=84427695852028361570839503459749343720963996301824107738895763656015365153014 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=84427695852028361570839503459749343720963996301824107738895763656015365153014 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_same_csr_outstanding","qual_name":"1.aon_timer_same_csr_outstanding.1373481603109149211090152648865338131021283843401042663767262867557179721303","seed":1373481603109149211090152648865338131021283843401042663767262867557179721303,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=799540823 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/1.aon_timer_same_csr_outstanding.799540823 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.aon_timer_same_csr_outstanding.799540823 -covoverwrite' seed=1373481603109149211090152648865338131021283843401042663767262867557179721303 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=1373481603109149211090152648865338131021283843401042663767262867557179721303 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_mem_rw_with_rand_reset","qual_name":"1.aon_timer_csr_mem_rw_with_rand_reset.30234358893676833617094956719537648426555382521101952554978549977656954063994","seed":30234358893676833617094956719537648426555382521101952554978549977656954063994,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2674789498 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/1.aon_timer_csr_mem_rw_with_rand_reset.2674789498 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 1.aon_timer_csr_mem_rw_with_rand_reset.2674789498 -covoverwrite' seed=30234358893676833617094956719537648426555382521101952554978549977656954063994 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=30234358893676833617094956719537648426555382521101952554978549977656954063994 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/1.aon_timer_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke","qual_name":"2.aon_timer_smoke.89749188623160899916926686230348962074564842219871567014964599913052217343937","seed":89749188623160899916926686230348962074564842219871567014964599913052217343937,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1171849153 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_smoke.1171849153 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_smoke.1171849153 -covoverwrite' seed=89749188623160899916926686230348962074564842219871567014964599913052217343937 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=89749188623160899916926686230348962074564842219871567014964599913052217343937 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"2.aon_timer_prescaler.111926310545876103609263463756730596786050633033687071100720186654928204458963","seed":111926310545876103609263463756730596786050633033687071100720186654928204458963,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1374940115 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_prescaler.1374940115 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_prescaler.1374940115 -covoverwrite' seed=111926310545876103609263463756730596786050633033687071100720186654928204458963 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=111926310545876103609263463756730596786050633033687071100720186654928204458963 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_jump","qual_name":"2.aon_timer_jump.84903549833805389245982982141830568862266836809837865180754199115066103076067","seed":84903549833805389245982982141830568862266836809837865180754199115066103076067,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_jump/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_jump/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1451791587 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_jump_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_jump.1451791587 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_jump.1451791587 -covoverwrite' seed=84903549833805389245982982141830568862266836809837865180754199115066103076067 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=84903549833805389245982982141830568862266836809837865180754199115066103076067 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_jump/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_jump_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_custom_intr","qual_name":"2.aon_timer_custom_intr.109656767222743023470444491891137506108373004717945630629238293977662655625449","seed":109656767222743023470444491891137506108373004717945630629238293977662655625449,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_custom_intr/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_custom_intr/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3868522729 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_custom_intr_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_custom_intr.3868522729 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_custom_intr.3868522729 -covoverwrite' seed=109656767222743023470444491891137506108373004717945630629238293977662655625449 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=109656767222743023470444491891137506108373004717945630629238293977662655625449 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_custom_intr/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_custom_intr_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke_max_thold","qual_name":"2.aon_timer_smoke_max_thold.106241025614781590911701114377055465460211694319518358838169480870087944932038","seed":106241025614781590911701114377055465460211694319518358838169480870087944932038,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_smoke_max_thold/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_smoke_max_thold/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2916453062 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_max_thold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_smoke_max_thold.2916453062 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_smoke_max_thold.2916453062 -covoverwrite' seed=106241025614781590911701114377055465460211694319518358838169480870087944932038 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=106241025614781590911701114377055465460211694319518358838169480870087944932038 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_smoke_max_thold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_max_thold_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke_min_thold","qual_name":"2.aon_timer_smoke_min_thold.82975991452744756963864935984683325882312742560155963790090153686416955843100","seed":82975991452744756963864935984683325882312742560155963790090153686416955843100,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_smoke_min_thold/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_smoke_min_thold/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1465688604 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_min_thold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_smoke_min_thold.1465688604 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_smoke_min_thold.1465688604 -covoverwrite' seed=82975991452744756963864935984683325882312742560155963790090153686416955843100 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=82975991452744756963864935984683325882312742560155963790090153686416955843100 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_smoke_min_thold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_min_thold_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_wkup_count_cdc_hi","qual_name":"2.aon_timer_wkup_count_cdc_hi.87854835849748162203300587500450142467176713546902916746035330582163144221417","seed":87854835849748162203300587500450142467176713546902916746035330582163144221417,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_wkup_count_cdc_hi/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_wkup_count_cdc_hi/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2016846569 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_wkup_count_cdc_hi_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_wkup_count_cdc_hi.2016846569 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_wkup_count_cdc_hi.2016846569 -covoverwrite' seed=87854835849748162203300587500450142467176713546902916746035330582163144221417 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=87854835849748162203300587500450142467176713546902916746035330582163144221417 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_wkup_count_cdc_hi/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_wkup_count_cdc_hi_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alternating_enable_on_off","qual_name":"2.aon_timer_alternating_enable_on_off.43761835287532547219436030754821417212283234460281137512644916638167441605140","seed":43761835287532547219436030754821417212283234460281137512644916638167441605140,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_alternating_enable_on_off/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_alternating_enable_on_off/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2927362580 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_alternating_enable_on_off_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_alternating_enable_on_off.2927362580 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_alternating_enable_on_off.2927362580 -covoverwrite' seed=43761835287532547219436030754821417212283234460281137512644916638167441605140 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=43761835287532547219436030754821417212283234460281137512644916638167441605140 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_alternating_enable_on_off/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_alternating_enable_on_off_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"2.aon_timer_stress_all_with_rand_reset.3288956834152662087808092976532526339189314093051747168580463317551036061484","seed":3288956834152662087808092976532526339189314093051747168580463317551036061484,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=977622828 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_stress_all_with_rand_reset.977622828 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_stress_all_with_rand_reset.977622828 -covoverwrite' seed=3288956834152662087808092976532526339189314093051747168580463317551036061484 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=3288956834152662087808092976532526339189314093051747168580463317551036061484 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_sec_cm","qual_name":"2.aon_timer_sec_cm.92965829648974750317681881148988298906994096255725484679401457841337574435898","seed":92965829648974750317681881148988298906994096255725484679401457841337574435898,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=731982906 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_sec_cm.731982906 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_sec_cm.731982906 -covoverwrite' seed=92965829648974750317681881148988298906994096255725484679401457841337574435898 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=92965829648974750317681881148988298906994096255725484679401457841337574435898 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"2.aon_timer_tl_errors.62288686633241026939876113615183060312447868858629028338723036096414013022098","seed":62288686633241026939876113615183060312447868858629028338723036096414013022098,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=563437458 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/2.aon_timer_tl_errors.563437458 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.aon_timer_tl_errors.563437458 -covoverwrite' seed=62288686633241026939876113615183060312447868858629028338723036096414013022098 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=62288686633241026939876113615183060312447868858629028338723036096414013022098 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"2.aon_timer_tl_intg_err.113704434423105660376586845390918560236185997696310706305977888632788900323705","seed":113704434423105660376586845390918560236185997696310706305977888632788900323705,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=963584377 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/2.aon_timer_tl_intg_err.963584377 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.aon_timer_tl_intg_err.963584377 -covoverwrite' seed=113704434423105660376586845390918560236185997696310706305977888632788900323705 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=113704434423105660376586845390918560236185997696310706305977888632788900323705 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"2.aon_timer_intr_test.107505646152672641256167356788099707104880239042362502098268661327416370521713","seed":107505646152672641256167356788099707104880239042362502098268661327416370521713,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3236816497 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/2.aon_timer_intr_test.3236816497 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.aon_timer_intr_test.3236816497 -covoverwrite' seed=107505646152672641256167356788099707104880239042362502098268661327416370521713 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=107505646152672641256167356788099707104880239042362502098268661327416370521713 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"2.aon_timer_alert_test.21247311540540193983742890171676465796778258486035069691759141209656721173773","seed":21247311540540193983742890171676465796778258486035069691759141209656721173773,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=336882957 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/2.aon_timer_alert_test.336882957 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 2.aon_timer_alert_test.336882957 -covoverwrite' seed=21247311540540193983742890171676465796778258486035069691759141209656721173773 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=21247311540540193983742890171676465796778258486035069691759141209656721173773 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_rw","qual_name":"2.aon_timer_csr_rw.30615171604855212931002421485675545095411253063748999958590823987898951900169","seed":30615171604855212931002421485675545095411253063748999958590823987898951900169,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_csr_rw/latest run_opts='+csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2859965449 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/2.aon_timer_csr_rw.2859965449 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.aon_timer_csr_rw.2859965449 -covoverwrite' seed=30615171604855212931002421485675545095411253063748999958590823987898951900169 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=30615171604855212931002421485675545095411253063748999958590823987898951900169 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_same_csr_outstanding","qual_name":"2.aon_timer_same_csr_outstanding.34425702044860957351758073931353222349816089001786448948342374281638624737113","seed":34425702044860957351758073931353222349816089001786448948342374281638624737113,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=742766425 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/2.aon_timer_same_csr_outstanding.742766425 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.aon_timer_same_csr_outstanding.742766425 -covoverwrite' seed=34425702044860957351758073931353222349816089001786448948342374281638624737113 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=34425702044860957351758073931353222349816089001786448948342374281638624737113 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_mem_rw_with_rand_reset","qual_name":"2.aon_timer_csr_mem_rw_with_rand_reset.38667604320825615618130735385245431006380916003216994795268950986349925333518","seed":38667604320825615618130735385245431006380916003216994795268950986349925333518,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=790329870 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/2.aon_timer_csr_mem_rw_with_rand_reset.790329870 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 2.aon_timer_csr_mem_rw_with_rand_reset.790329870 -covoverwrite' seed=38667604320825615618130735385245431006380916003216994795268950986349925333518 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=38667604320825615618130735385245431006380916003216994795268950986349925333518 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/2.aon_timer_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke","qual_name":"3.aon_timer_smoke.4778825501174937006487771098611783540199706756866403364968715060681109754786","seed":4778825501174937006487771098611783540199706756866403364968715060681109754786,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1661293474 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_smoke.1661293474 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_smoke.1661293474 -covoverwrite' seed=4778825501174937006487771098611783540199706756866403364968715060681109754786 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=4778825501174937006487771098611783540199706756866403364968715060681109754786 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"3.aon_timer_prescaler.7659293205047900076442610180002263972882543941875368034801101946152036278372","seed":7659293205047900076442610180002263972882543941875368034801101946152036278372,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=729489508 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_prescaler.729489508 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_prescaler.729489508 -covoverwrite' seed=7659293205047900076442610180002263972882543941875368034801101946152036278372 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=7659293205047900076442610180002263972882543941875368034801101946152036278372 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_jump","qual_name":"3.aon_timer_jump.34458327305637567672415722902576721264268933355226800811363750962351260939494","seed":34458327305637567672415722902576721264268933355226800811363750962351260939494,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_jump/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_jump/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3930436838 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_jump_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_jump.3930436838 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_jump.3930436838 -covoverwrite' seed=34458327305637567672415722902576721264268933355226800811363750962351260939494 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=34458327305637567672415722902576721264268933355226800811363750962351260939494 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_jump/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_jump_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_custom_intr","qual_name":"3.aon_timer_custom_intr.36480497172270829880272765741568903939485531984841391428865693380759678917487","seed":36480497172270829880272765741568903939485531984841391428865693380759678917487,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_custom_intr/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_custom_intr/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1847892847 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_custom_intr_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_custom_intr.1847892847 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_custom_intr.1847892847 -covoverwrite' seed=36480497172270829880272765741568903939485531984841391428865693380759678917487 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=36480497172270829880272765741568903939485531984841391428865693380759678917487 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_custom_intr/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_custom_intr_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke_max_thold","qual_name":"3.aon_timer_smoke_max_thold.35334831329064437418674277997372391438589392261035869905056014700793977276478","seed":35334831329064437418674277997372391438589392261035869905056014700793977276478,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_smoke_max_thold/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_smoke_max_thold/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1903069246 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_max_thold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_smoke_max_thold.1903069246 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_smoke_max_thold.1903069246 -covoverwrite' seed=35334831329064437418674277997372391438589392261035869905056014700793977276478 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=35334831329064437418674277997372391438589392261035869905056014700793977276478 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_smoke_max_thold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_max_thold_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke_min_thold","qual_name":"3.aon_timer_smoke_min_thold.66529538711386990519230139428628837071009858886049020248106380651132449365152","seed":66529538711386990519230139428628837071009858886049020248106380651132449365152,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_smoke_min_thold/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_smoke_min_thold/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2741410976 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_min_thold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_smoke_min_thold.2741410976 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_smoke_min_thold.2741410976 -covoverwrite' seed=66529538711386990519230139428628837071009858886049020248106380651132449365152 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=66529538711386990519230139428628837071009858886049020248106380651132449365152 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_smoke_min_thold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_min_thold_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_wkup_count_cdc_hi","qual_name":"3.aon_timer_wkup_count_cdc_hi.104254722062005522744464727322100911810624413033235156692868112824478175247397","seed":104254722062005522744464727322100911810624413033235156692868112824478175247397,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_wkup_count_cdc_hi/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_wkup_count_cdc_hi/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2334833701 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_wkup_count_cdc_hi_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_wkup_count_cdc_hi.2334833701 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_wkup_count_cdc_hi.2334833701 -covoverwrite' seed=104254722062005522744464727322100911810624413033235156692868112824478175247397 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=104254722062005522744464727322100911810624413033235156692868112824478175247397 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_wkup_count_cdc_hi/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_wkup_count_cdc_hi_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alternating_enable_on_off","qual_name":"3.aon_timer_alternating_enable_on_off.20814638782727090565458986665122186075659227669350431232425148436738686552813","seed":20814638782727090565458986665122186075659227669350431232425148436738686552813,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_alternating_enable_on_off/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_alternating_enable_on_off/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2383121133 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_alternating_enable_on_off_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_alternating_enable_on_off.2383121133 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_alternating_enable_on_off.2383121133 -covoverwrite' seed=20814638782727090565458986665122186075659227669350431232425148436738686552813 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=20814638782727090565458986665122186075659227669350431232425148436738686552813 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_alternating_enable_on_off/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_alternating_enable_on_off_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"3.aon_timer_stress_all_with_rand_reset.41454045815535301647632881294317722935780553106861194347117093591732367968434","seed":41454045815535301647632881294317722935780553106861194347117093591732367968434,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1464387762 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_stress_all_with_rand_reset.1464387762 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_stress_all_with_rand_reset.1464387762 -covoverwrite' seed=41454045815535301647632881294317722935780553106861194347117093591732367968434 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=41454045815535301647632881294317722935780553106861194347117093591732367968434 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_sec_cm","qual_name":"3.aon_timer_sec_cm.65243126687004218081176838687215103820032008143355706329324508103367853338245","seed":65243126687004218081176838687215103820032008143355706329324508103367853338245,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2655252101 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_sec_cm.2655252101 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_sec_cm.2655252101 -covoverwrite' seed=65243126687004218081176838687215103820032008143355706329324508103367853338245 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=65243126687004218081176838687215103820032008143355706329324508103367853338245 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"3.aon_timer_tl_errors.10475249933026718632491514725165219255557662465533266374583557913635673955748","seed":10475249933026718632491514725165219255557662465533266374583557913635673955748,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3928841636 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/3.aon_timer_tl_errors.3928841636 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.aon_timer_tl_errors.3928841636 -covoverwrite' seed=10475249933026718632491514725165219255557662465533266374583557913635673955748 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=10475249933026718632491514725165219255557662465533266374583557913635673955748 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"3.aon_timer_tl_intg_err.77910762350372045257862161031352151282423038552005640423146870703820710419104","seed":77910762350372045257862161031352151282423038552005640423146870703820710419104,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1533876896 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/3.aon_timer_tl_intg_err.1533876896 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.aon_timer_tl_intg_err.1533876896 -covoverwrite' seed=77910762350372045257862161031352151282423038552005640423146870703820710419104 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=77910762350372045257862161031352151282423038552005640423146870703820710419104 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"3.aon_timer_intr_test.108422530736541350911782222760226120064229827283597420307250886453016659007785","seed":108422530736541350911782222760226120064229827283597420307250886453016659007785,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3448805673 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/3.aon_timer_intr_test.3448805673 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.aon_timer_intr_test.3448805673 -covoverwrite' seed=108422530736541350911782222760226120064229827283597420307250886453016659007785 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=108422530736541350911782222760226120064229827283597420307250886453016659007785 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"3.aon_timer_alert_test.53870264844792266359016123462039882132076233833095394852967227014835283126814","seed":53870264844792266359016123462039882132076233833095394852967227014835283126814,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2433182238 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/3.aon_timer_alert_test.2433182238 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 3.aon_timer_alert_test.2433182238 -covoverwrite' seed=53870264844792266359016123462039882132076233833095394852967227014835283126814 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=53870264844792266359016123462039882132076233833095394852967227014835283126814 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_rw","qual_name":"3.aon_timer_csr_rw.57771177839504377963875313585373687522368624352709960485048767602753523247440","seed":57771177839504377963875313585373687522368624352709960485048767602753523247440,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_csr_rw/latest run_opts='+csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2621270352 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/3.aon_timer_csr_rw.2621270352 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.aon_timer_csr_rw.2621270352 -covoverwrite' seed=57771177839504377963875313585373687522368624352709960485048767602753523247440 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=57771177839504377963875313585373687522368624352709960485048767602753523247440 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_same_csr_outstanding","qual_name":"3.aon_timer_same_csr_outstanding.31538392596118737080900089873666645968548076561745705101927259926374132526177","seed":31538392596118737080900089873666645968548076561745705101927259926374132526177,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3207113825 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/3.aon_timer_same_csr_outstanding.3207113825 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.aon_timer_same_csr_outstanding.3207113825 -covoverwrite' seed=31538392596118737080900089873666645968548076561745705101927259926374132526177 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=31538392596118737080900089873666645968548076561745705101927259926374132526177 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_mem_rw_with_rand_reset","qual_name":"3.aon_timer_csr_mem_rw_with_rand_reset.58748102541809303137553336685922699448286881579190272132703870551416720480068","seed":58748102541809303137553336685922699448286881579190272132703870551416720480068,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=645027652 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/3.aon_timer_csr_mem_rw_with_rand_reset.645027652 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 3.aon_timer_csr_mem_rw_with_rand_reset.645027652 -covoverwrite' seed=58748102541809303137553336685922699448286881579190272132703870551416720480068 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=58748102541809303137553336685922699448286881579190272132703870551416720480068 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/3.aon_timer_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke","qual_name":"4.aon_timer_smoke.16815345160528922235089894294258113284270475943821636591959166978317519517455","seed":16815345160528922235089894294258113284270475943821636591959166978317519517455,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3958208271 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_smoke.3958208271 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_smoke.3958208271 -covoverwrite' seed=16815345160528922235089894294258113284270475943821636591959166978317519517455 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=16815345160528922235089894294258113284270475943821636591959166978317519517455 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"4.aon_timer_prescaler.62356181957196933989290344254128736967822071287230026386390254492579356193658","seed":62356181957196933989290344254128736967822071287230026386390254492579356193658,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1209512826 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_prescaler.1209512826 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_prescaler.1209512826 -covoverwrite' seed=62356181957196933989290344254128736967822071287230026386390254492579356193658 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=62356181957196933989290344254128736967822071287230026386390254492579356193658 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_jump","qual_name":"4.aon_timer_jump.683351553074945827169455977668569330071810047142926500709132822967158116423","seed":683351553074945827169455977668569330071810047142926500709132822967158116423,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_jump/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_jump/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=636293191 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_jump_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_jump.636293191 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_jump.636293191 -covoverwrite' seed=683351553074945827169455977668569330071810047142926500709132822967158116423 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=683351553074945827169455977668569330071810047142926500709132822967158116423 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_jump/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_jump_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_custom_intr","qual_name":"4.aon_timer_custom_intr.8300227179203350205326641641078102244809101414638663956049653219708679745662","seed":8300227179203350205326641641078102244809101414638663956049653219708679745662,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_custom_intr/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_custom_intr/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1187508350 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_custom_intr_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_custom_intr.1187508350 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_custom_intr.1187508350 -covoverwrite' seed=8300227179203350205326641641078102244809101414638663956049653219708679745662 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=8300227179203350205326641641078102244809101414638663956049653219708679745662 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_custom_intr/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_custom_intr_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke_max_thold","qual_name":"4.aon_timer_smoke_max_thold.75402982995257229321691434987536643733240933211781338692748737949217048316659","seed":75402982995257229321691434987536643733240933211781338692748737949217048316659,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_smoke_max_thold/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_smoke_max_thold/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=723602163 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_max_thold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_smoke_max_thold.723602163 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_smoke_max_thold.723602163 -covoverwrite' seed=75402982995257229321691434987536643733240933211781338692748737949217048316659 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=75402982995257229321691434987536643733240933211781338692748737949217048316659 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_smoke_max_thold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_max_thold_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_smoke_min_thold","qual_name":"4.aon_timer_smoke_min_thold.11997544351672733055118107781433708271004472985806149422103708131013193030752","seed":11997544351672733055118107781433708271004472985806149422103708131013193030752,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_smoke_min_thold/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_smoke_min_thold/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1372249184 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_smoke_min_thold_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_smoke_min_thold.1372249184 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_smoke_min_thold.1372249184 -covoverwrite' seed=11997544351672733055118107781433708271004472985806149422103708131013193030752 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=11997544351672733055118107781433708271004472985806149422103708131013193030752 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_smoke_min_thold/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_smoke_min_thold_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_wkup_count_cdc_hi","qual_name":"4.aon_timer_wkup_count_cdc_hi.85914071659806877783520233509489167632015054000165398961536770666892562706578","seed":85914071659806877783520233509489167632015054000165398961536770666892562706578,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_wkup_count_cdc_hi/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_wkup_count_cdc_hi/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2841292946 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_wkup_count_cdc_hi_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_wkup_count_cdc_hi.2841292946 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_wkup_count_cdc_hi.2841292946 -covoverwrite' seed=85914071659806877783520233509489167632015054000165398961536770666892562706578 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=85914071659806877783520233509489167632015054000165398961536770666892562706578 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_wkup_count_cdc_hi/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_wkup_count_cdc_hi_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alternating_enable_on_off","qual_name":"4.aon_timer_alternating_enable_on_off.18690834231856338757118841964468993791854727914171505675233435066281939662195","seed":18690834231856338757118841964468993791854727914171505675233435066281939662195,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_alternating_enable_on_off/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_alternating_enable_on_off/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3752293747 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_alternating_enable_on_off_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_alternating_enable_on_off.3752293747 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_alternating_enable_on_off.3752293747 -covoverwrite' seed=18690834231856338757118841964468993791854727914171505675233435066281939662195 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=18690834231856338757118841964468993791854727914171505675233435066281939662195 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_alternating_enable_on_off/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_alternating_enable_on_off_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"4.aon_timer_stress_all_with_rand_reset.64885641592261079263648745750720113651020926481268749215640296553479221193901","seed":64885641592261079263648745750720113651020926481268749215640296553479221193901,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=289582253 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_stress_all_with_rand_reset.289582253 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_stress_all_with_rand_reset.289582253 -covoverwrite' seed=64885641592261079263648745750720113651020926481268749215640296553479221193901 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=64885641592261079263648745750720113651020926481268749215640296553479221193901 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_sec_cm","qual_name":"4.aon_timer_sec_cm.32934197693184415987289341972843899441583694798096390933400713708273778817046","seed":32934197693184415987289341972843899441583694798096390933400713708273778817046,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1933047830 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_sec_cm.1933047830 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_sec_cm.1933047830 -covoverwrite' seed=32934197693184415987289341972843899441583694798096390933400713708273778817046 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=32934197693184415987289341972843899441583694798096390933400713708273778817046 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"4.aon_timer_tl_errors.109451148567286206731280013364338274307517720599981105582993819271100754524820","seed":109451148567286206731280013364338274307517720599981105582993819271100754524820,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4074470036 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/4.aon_timer_tl_errors.4074470036 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.aon_timer_tl_errors.4074470036 -covoverwrite' seed=109451148567286206731280013364338274307517720599981105582993819271100754524820 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=109451148567286206731280013364338274307517720599981105582993819271100754524820 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"4.aon_timer_tl_intg_err.67907514532948786169799491453128564576679395600731120547523169238244928515363","seed":67907514532948786169799491453128564576679395600731120547523169238244928515363,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=411823395 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/4.aon_timer_tl_intg_err.411823395 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.aon_timer_tl_intg_err.411823395 -covoverwrite' seed=67907514532948786169799491453128564576679395600731120547523169238244928515363 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=67907514532948786169799491453128564576679395600731120547523169238244928515363 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"4.aon_timer_intr_test.94611843960357238818293940606182363643076893475270746338094614618568280551349","seed":94611843960357238818293940606182363643076893475270746338094614618568280551349,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3669012405 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/4.aon_timer_intr_test.3669012405 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.aon_timer_intr_test.3669012405 -covoverwrite' seed=94611843960357238818293940606182363643076893475270746338094614618568280551349 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=94611843960357238818293940606182363643076893475270746338094614618568280551349 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"4.aon_timer_alert_test.93864365187442619705393070921225564455249848338621754960663283708842621035468","seed":93864365187442619705393070921225564455249848338621754960663283708842621035468,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1175217100 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/4.aon_timer_alert_test.1175217100 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 4.aon_timer_alert_test.1175217100 -covoverwrite' seed=93864365187442619705393070921225564455249848338621754960663283708842621035468 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=93864365187442619705393070921225564455249848338621754960663283708842621035468 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_rw","qual_name":"4.aon_timer_csr_rw.98629279340821702523545422805714488694105887146988409772297883843115778632269","seed":98629279340821702523545422805714488694105887146988409772297883843115778632269,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_csr_rw/latest run_opts='+csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=799861325 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/4.aon_timer_csr_rw.799861325 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.aon_timer_csr_rw.799861325 -covoverwrite' seed=98629279340821702523545422805714488694105887146988409772297883843115778632269 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=98629279340821702523545422805714488694105887146988409772297883843115778632269 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_same_csr_outstanding","qual_name":"4.aon_timer_same_csr_outstanding.16208851667816470063334348672296512984068501312350976389789643917251790962529","seed":16208851667816470063334348672296512984068501312350976389789643917251790962529,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_same_csr_outstanding/latest run_opts='+run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1645412193 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/4.aon_timer_same_csr_outstanding.1645412193 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.aon_timer_same_csr_outstanding.1645412193 -covoverwrite' seed=16208851667816470063334348672296512984068501312350976389789643917251790962529 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=16208851667816470063334348672296512984068501312350976389789643917251790962529 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_csr_mem_rw_with_rand_reset","qual_name":"4.aon_timer_csr_mem_rw_with_rand_reset.43031465438664376906944794907281051591801486510469635028182585990193385128564","seed":43031465438664376906944794907281051591801486510469635028182585990193385128564,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_csr_mem_rw_with_rand_reset/latest run_opts='+run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=606945908 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/4.aon_timer_csr_mem_rw_with_rand_reset.606945908 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 4.aon_timer_csr_mem_rw_with_rand_reset.606945908 -covoverwrite' seed=43031465438664376906944794907281051591801486510469635028182585990193385128564 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=43031465438664376906944794907281051591801486510469635028182585990193385128564 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/4.aon_timer_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"5.aon_timer_prescaler.60155605058392949064011169942933952602436883103539486407129955025844678618656","seed":60155605058392949064011169942933952602436883103539486407129955025844678618656,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1193733664 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/5.aon_timer_prescaler.1193733664 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 5.aon_timer_prescaler.1193733664 -covoverwrite' seed=60155605058392949064011169942933952602436883103539486407129955025844678618656 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=60155605058392949064011169942933952602436883103539486407129955025844678618656 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_custom_intr","qual_name":"5.aon_timer_custom_intr.75954308051030032150279178858247768422567034043237010665682717320656833721501","seed":75954308051030032150279178858247768422567034043237010665682717320656833721501,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_custom_intr/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_custom_intr/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1286059165 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_custom_intr_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/5.aon_timer_custom_intr.1286059165 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 5.aon_timer_custom_intr.1286059165 -covoverwrite' seed=75954308051030032150279178858247768422567034043237010665682717320656833721501 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=75954308051030032150279178858247768422567034043237010665682717320656833721501 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_custom_intr/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_custom_intr_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"5.aon_timer_stress_all_with_rand_reset.33790985259038272481047220367907252038121933810291667397494923993553045032239","seed":33790985259038272481047220367907252038121933810291667397494923993553045032239,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2753039663 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/5.aon_timer_stress_all_with_rand_reset.2753039663 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 5.aon_timer_stress_all_with_rand_reset.2753039663 -covoverwrite' seed=33790985259038272481047220367907252038121933810291667397494923993553045032239 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=33790985259038272481047220367907252038121933810291667397494923993553045032239 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"5.aon_timer_tl_errors.81392031469761294610671140644162137760665431482576119280466266213690534214938","seed":81392031469761294610671140644162137760665431482576119280466266213690534214938,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1957379354 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/5.aon_timer_tl_errors.1957379354 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 5.aon_timer_tl_errors.1957379354 -covoverwrite' seed=81392031469761294610671140644162137760665431482576119280466266213690534214938 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=81392031469761294610671140644162137760665431482576119280466266213690534214938 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"5.aon_timer_tl_intg_err.93145326961639619138454401421559439282814051825768581017755627321239411012230","seed":93145326961639619138454401421559439282814051825768581017755627321239411012230,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=213037702 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/5.aon_timer_tl_intg_err.213037702 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 5.aon_timer_tl_intg_err.213037702 -covoverwrite' seed=93145326961639619138454401421559439282814051825768581017755627321239411012230 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=93145326961639619138454401421559439282814051825768581017755627321239411012230 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"5.aon_timer_intr_test.93597461686255871605538880243231717006550797140316721783092777642506574326849","seed":93597461686255871605538880243231717006550797140316721783092777642506574326849,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=988507201 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/5.aon_timer_intr_test.988507201 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 5.aon_timer_intr_test.988507201 -covoverwrite' seed=93597461686255871605538880243231717006550797140316721783092777642506574326849 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=93597461686255871605538880243231717006550797140316721783092777642506574326849 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"5.aon_timer_alert_test.53371949527408390730095995016444055132250762313508030308226654829393610143636","seed":53371949527408390730095995016444055132250762313508030308226654829393610143636,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1332082580 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/5.aon_timer_alert_test.1332082580 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 5.aon_timer_alert_test.1332082580 -covoverwrite' seed=53371949527408390730095995016444055132250762313508030308226654829393610143636 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=53371949527408390730095995016444055132250762313508030308226654829393610143636 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/5.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"6.aon_timer_prescaler.67061260927608417812075720265597047820484832285956496290379984865306800213580","seed":67061260927608417812075720265597047820484832285956496290379984865306800213580,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3720007244 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/6.aon_timer_prescaler.3720007244 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 6.aon_timer_prescaler.3720007244 -covoverwrite' seed=67061260927608417812075720265597047820484832285956496290379984865306800213580 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=67061260927608417812075720265597047820484832285956496290379984865306800213580 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_custom_intr","qual_name":"6.aon_timer_custom_intr.65258533447334886807721709618220282695624221586970370029608544905555476332988","seed":65258533447334886807721709618220282695624221586970370029608544905555476332988,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_custom_intr/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_custom_intr/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1038991804 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_custom_intr_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/6.aon_timer_custom_intr.1038991804 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 6.aon_timer_custom_intr.1038991804 -covoverwrite' seed=65258533447334886807721709618220282695624221586970370029608544905555476332988 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=65258533447334886807721709618220282695624221586970370029608544905555476332988 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_custom_intr/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_custom_intr_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"6.aon_timer_stress_all_with_rand_reset.94423393573790938865805784264542837421892685116129266744979887697406007770955","seed":94423393573790938865805784264542837421892685116129266744979887697406007770955,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3213688651 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/6.aon_timer_stress_all_with_rand_reset.3213688651 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 6.aon_timer_stress_all_with_rand_reset.3213688651 -covoverwrite' seed=94423393573790938865805784264542837421892685116129266744979887697406007770955 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=94423393573790938865805784264542837421892685116129266744979887697406007770955 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"6.aon_timer_tl_errors.86307329504407980931637879997505888733023772364317604024752069127036364476992","seed":86307329504407980931637879997505888733023772364317604024752069127036364476992,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=396448320 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/6.aon_timer_tl_errors.396448320 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 6.aon_timer_tl_errors.396448320 -covoverwrite' seed=86307329504407980931637879997505888733023772364317604024752069127036364476992 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=86307329504407980931637879997505888733023772364317604024752069127036364476992 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"6.aon_timer_tl_intg_err.74894921535372695531339652553338711415573542900645528508701774217865603070550","seed":74894921535372695531339652553338711415573542900645528508701774217865603070550,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3025943126 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/6.aon_timer_tl_intg_err.3025943126 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 6.aon_timer_tl_intg_err.3025943126 -covoverwrite' seed=74894921535372695531339652553338711415573542900645528508701774217865603070550 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=74894921535372695531339652553338711415573542900645528508701774217865603070550 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"6.aon_timer_intr_test.55631078944493103411348668399759471026568177999699386194836324828918781398767","seed":55631078944493103411348668399759471026568177999699386194836324828918781398767,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2391625455 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/6.aon_timer_intr_test.2391625455 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 6.aon_timer_intr_test.2391625455 -covoverwrite' seed=55631078944493103411348668399759471026568177999699386194836324828918781398767 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=55631078944493103411348668399759471026568177999699386194836324828918781398767 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"6.aon_timer_alert_test.100148837021070783774812816622783470373542247635375518446997770364583149875419","seed":100148837021070783774812816622783470373542247635375518446997770364583149875419,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3747918043 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/6.aon_timer_alert_test.3747918043 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 6.aon_timer_alert_test.3747918043 -covoverwrite' seed=100148837021070783774812816622783470373542247635375518446997770364583149875419 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=100148837021070783774812816622783470373542247635375518446997770364583149875419 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/6.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"7.aon_timer_prescaler.23663354688791575783424690731905185163792362834248630736281721510363646520854","seed":23663354688791575783424690731905185163792362834248630736281721510363646520854,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2645421590 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/7.aon_timer_prescaler.2645421590 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 7.aon_timer_prescaler.2645421590 -covoverwrite' seed=23663354688791575783424690731905185163792362834248630736281721510363646520854 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=23663354688791575783424690731905185163792362834248630736281721510363646520854 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_custom_intr","qual_name":"7.aon_timer_custom_intr.88370155739098548429084773498034824424939746340623951274236414446102863822282","seed":88370155739098548429084773498034824424939746340623951274236414446102863822282,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_custom_intr/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_custom_intr/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=707673546 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_custom_intr_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/7.aon_timer_custom_intr.707673546 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 7.aon_timer_custom_intr.707673546 -covoverwrite' seed=88370155739098548429084773498034824424939746340623951274236414446102863822282 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=88370155739098548429084773498034824424939746340623951274236414446102863822282 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_custom_intr/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_custom_intr_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"7.aon_timer_stress_all_with_rand_reset.60087258196311806748575020586385068243234947155185752596478286365125856337611","seed":60087258196311806748575020586385068243234947155185752596478286365125856337611,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3287424715 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/7.aon_timer_stress_all_with_rand_reset.3287424715 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 7.aon_timer_stress_all_with_rand_reset.3287424715 -covoverwrite' seed=60087258196311806748575020586385068243234947155185752596478286365125856337611 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=60087258196311806748575020586385068243234947155185752596478286365125856337611 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"7.aon_timer_tl_errors.15871540486556354053851702192061995783326307004163573251123785640786275929647","seed":15871540486556354053851702192061995783326307004163573251123785640786275929647,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3153399343 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/7.aon_timer_tl_errors.3153399343 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 7.aon_timer_tl_errors.3153399343 -covoverwrite' seed=15871540486556354053851702192061995783326307004163573251123785640786275929647 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=15871540486556354053851702192061995783326307004163573251123785640786275929647 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"7.aon_timer_tl_intg_err.91796263137899142740488238324683095083842989781497013093157552488793293407144","seed":91796263137899142740488238324683095083842989781497013093157552488793293407144,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3088532392 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/7.aon_timer_tl_intg_err.3088532392 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 7.aon_timer_tl_intg_err.3088532392 -covoverwrite' seed=91796263137899142740488238324683095083842989781497013093157552488793293407144 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=91796263137899142740488238324683095083842989781497013093157552488793293407144 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"7.aon_timer_intr_test.86858598773985358304556911525875858825179287550678782668848468597038259774175","seed":86858598773985358304556911525875858825179287550678782668848468597038259774175,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=721822431 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/7.aon_timer_intr_test.721822431 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 7.aon_timer_intr_test.721822431 -covoverwrite' seed=86858598773985358304556911525875858825179287550678782668848468597038259774175 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=86858598773985358304556911525875858825179287550678782668848468597038259774175 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"7.aon_timer_alert_test.11948165334443096120912751857719244684489410776942516954977831059020981043440","seed":11948165334443096120912751857719244684489410776942516954977831059020981043440,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1842970864 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/7.aon_timer_alert_test.1842970864 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 7.aon_timer_alert_test.1842970864 -covoverwrite' seed=11948165334443096120912751857719244684489410776942516954977831059020981043440 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=11948165334443096120912751857719244684489410776942516954977831059020981043440 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/7.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"8.aon_timer_prescaler.29584292269312603477515969843212607386350027677080108417162467871953060226683","seed":29584292269312603477515969843212607386350027677080108417162467871953060226683,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=913172091 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/8.aon_timer_prescaler.913172091 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 8.aon_timer_prescaler.913172091 -covoverwrite' seed=29584292269312603477515969843212607386350027677080108417162467871953060226683 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=29584292269312603477515969843212607386350027677080108417162467871953060226683 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_custom_intr","qual_name":"8.aon_timer_custom_intr.61904799725318806742968545670059578078644713554691569911590658580581535534749","seed":61904799725318806742968545670059578078644713554691569911590658580581535534749,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_custom_intr/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_custom_intr/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1195200157 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_custom_intr_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/8.aon_timer_custom_intr.1195200157 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 8.aon_timer_custom_intr.1195200157 -covoverwrite' seed=61904799725318806742968545670059578078644713554691569911590658580581535534749 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=61904799725318806742968545670059578078644713554691569911590658580581535534749 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_custom_intr/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_custom_intr_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"8.aon_timer_stress_all_with_rand_reset.34196417584065912589175725488556800041458736239777532141919285135204540418672","seed":34196417584065912589175725488556800041458736239777532141919285135204540418672,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=900926064 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/8.aon_timer_stress_all_with_rand_reset.900926064 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 8.aon_timer_stress_all_with_rand_reset.900926064 -covoverwrite' seed=34196417584065912589175725488556800041458736239777532141919285135204540418672 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=34196417584065912589175725488556800041458736239777532141919285135204540418672 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"8.aon_timer_tl_errors.3801645704069748865302130386070179523659634977809019018398931938256890689788","seed":3801645704069748865302130386070179523659634977809019018398931938256890689788,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1917384956 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/8.aon_timer_tl_errors.1917384956 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 8.aon_timer_tl_errors.1917384956 -covoverwrite' seed=3801645704069748865302130386070179523659634977809019018398931938256890689788 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=3801645704069748865302130386070179523659634977809019018398931938256890689788 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"8.aon_timer_tl_intg_err.20145685654088985550643408261330472219242238727180403485490670789280964617786","seed":20145685654088985550643408261330472219242238727180403485490670789280964617786,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2291213882 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/8.aon_timer_tl_intg_err.2291213882 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 8.aon_timer_tl_intg_err.2291213882 -covoverwrite' seed=20145685654088985550643408261330472219242238727180403485490670789280964617786 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=20145685654088985550643408261330472219242238727180403485490670789280964617786 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"8.aon_timer_intr_test.108643254694535714506321487704012995497257011069409641399591511471140370402920","seed":108643254694535714506321487704012995497257011069409641399591511471140370402920,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1189105256 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/8.aon_timer_intr_test.1189105256 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 8.aon_timer_intr_test.1189105256 -covoverwrite' seed=108643254694535714506321487704012995497257011069409641399591511471140370402920 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=108643254694535714506321487704012995497257011069409641399591511471140370402920 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"8.aon_timer_alert_test.32809087069860722403827942727733599645058268826436757336937803955481333395436","seed":32809087069860722403827942727733599645058268826436757336937803955481333395436,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3290361836 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/8.aon_timer_alert_test.3290361836 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 8.aon_timer_alert_test.3290361836 -covoverwrite' seed=32809087069860722403827942727733599645058268826436757336937803955481333395436 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=32809087069860722403827942727733599645058268826436757336937803955481333395436 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/8.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"9.aon_timer_prescaler.23777638704253473096552909486869168496178484827642195540447933695105592800166","seed":23777638704253473096552909486869168496178484827642195540447933695105592800166,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2105357222 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/9.aon_timer_prescaler.2105357222 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 9.aon_timer_prescaler.2105357222 -covoverwrite' seed=23777638704253473096552909486869168496178484827642195540447933695105592800166 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=23777638704253473096552909486869168496178484827642195540447933695105592800166 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_custom_intr","qual_name":"9.aon_timer_custom_intr.55470376802333283781594964475474328049987499099029210406791016513057363361422","seed":55470376802333283781594964475474328049987499099029210406791016513057363361422,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_custom_intr/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_custom_intr/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=671645326 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_custom_intr_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/9.aon_timer_custom_intr.671645326 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 9.aon_timer_custom_intr.671645326 -covoverwrite' seed=55470376802333283781594964475474328049987499099029210406791016513057363361422 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=55470376802333283781594964475474328049987499099029210406791016513057363361422 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_custom_intr/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_custom_intr_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"9.aon_timer_stress_all_with_rand_reset.17459171641174377830450984679858793944462517430171045317569871059772512730757","seed":17459171641174377830450984679858793944462517430171045317569871059772512730757,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=4247060101 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/9.aon_timer_stress_all_with_rand_reset.4247060101 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 9.aon_timer_stress_all_with_rand_reset.4247060101 -covoverwrite' seed=17459171641174377830450984679858793944462517430171045317569871059772512730757 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=17459171641174377830450984679858793944462517430171045317569871059772512730757 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"9.aon_timer_tl_errors.87858899854679287734130857865793897164161138203033958964086219117233448851797","seed":87858899854679287734130857865793897164161138203033958964086219117233448851797,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=872061269 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/9.aon_timer_tl_errors.872061269 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 9.aon_timer_tl_errors.872061269 -covoverwrite' seed=87858899854679287734130857865793897164161138203033958964086219117233448851797 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=87858899854679287734130857865793897164161138203033958964086219117233448851797 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"9.aon_timer_tl_intg_err.6351461857909597839458444097936948732068443288502073330906772506484726255060","seed":6351461857909597839458444097936948732068443288502073330906772506484726255060,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1274236372 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/9.aon_timer_tl_intg_err.1274236372 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 9.aon_timer_tl_intg_err.1274236372 -covoverwrite' seed=6351461857909597839458444097936948732068443288502073330906772506484726255060 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=6351461857909597839458444097936948732068443288502073330906772506484726255060 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_intr_test","qual_name":"9.aon_timer_intr_test.45847838613263745934950680464131786319113897179219222452466457821099386562842","seed":45847838613263745934950680464131786319113897179219222452466457821099386562842,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3693439258 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/9.aon_timer_intr_test.3693439258 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 9.aon_timer_intr_test.3693439258 -covoverwrite' seed=45847838613263745934950680464131786319113897179219222452466457821099386562842 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=45847838613263745934950680464131786319113897179219222452466457821099386562842 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_alert_test","qual_name":"9.aon_timer_alert_test.79626280181392553278329359922477827069791968944292122459544253926274011526215","seed":79626280181392553278329359922477827069791968944292122459544253926274011526215,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=150500423 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/9.aon_timer_alert_test.150500423 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 9.aon_timer_alert_test.150500423 -covoverwrite' seed=79626280181392553278329359922477827069791968944292122459544253926274011526215 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=79626280181392553278329359922477827069791968944292122459544253926274011526215 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/9.aon_timer_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"10.aon_timer_prescaler.967495405626539250573085094281265345780405267392943892789927786620986411493","seed":967495405626539250573085094281265345780405267392943892789927786620986411493,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3472181733 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/10.aon_timer_prescaler.3472181733 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 10.aon_timer_prescaler.3472181733 -covoverwrite' seed=967495405626539250573085094281265345780405267392943892789927786620986411493 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=967495405626539250573085094281265345780405267392943892789927786620986411493 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"10.aon_timer_stress_all_with_rand_reset.3208769789524869606438326718289121280988458578719932161217732989007892452827","seed":3208769789524869606438326718289121280988458578719932161217732989007892452827,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=2719356379 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/10.aon_timer_stress_all_with_rand_reset.2719356379 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 10.aon_timer_stress_all_with_rand_reset.2719356379 -covoverwrite' seed=3208769789524869606438326718289121280988458578719932161217732989007892452827 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=3208769789524869606438326718289121280988458578719932161217732989007892452827 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"10.aon_timer_tl_errors.46608187614980119673577531701685783378597029801705797768573854667096849005313","seed":46608187614980119673577531701685783378597029801705797768573854667096849005313,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=884620033 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/10.aon_timer_tl_errors.884620033 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 10.aon_timer_tl_errors.884620033 -covoverwrite' seed=46608187614980119673577531701685783378597029801705797768573854667096849005313 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=46608187614980119673577531701685783378597029801705797768573854667096849005313 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"10.aon_timer_tl_intg_err.77688768129093849778365218278784988341667080641294408568441209574967182225954","seed":77688768129093849778365218278784988341667080641294408568441209574967182225954,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=385479202 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/10.aon_timer_tl_intg_err.385479202 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 10.aon_timer_tl_intg_err.385479202 -covoverwrite' seed=77688768129093849778365218278784988341667080641294408568441209574967182225954 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=77688768129093849778365218278784988341667080641294408568441209574967182225954 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/10.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"11.aon_timer_prescaler.46659801993201051918986483414379062516157796354469794182571103070039034625683","seed":46659801993201051918986483414379062516157796354469794182571103070039034625683,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=191954579 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/11.aon_timer_prescaler.191954579 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 11.aon_timer_prescaler.191954579 -covoverwrite' seed=46659801993201051918986483414379062516157796354469794182571103070039034625683 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=46659801993201051918986483414379062516157796354469794182571103070039034625683 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"11.aon_timer_stress_all_with_rand_reset.17572851081745823914821350063249795304305086831976507534914647259850849845680","seed":17572851081745823914821350063249795304305086831976507534914647259850849845680,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3473867184 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/11.aon_timer_stress_all_with_rand_reset.3473867184 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 11.aon_timer_stress_all_with_rand_reset.3473867184 -covoverwrite' seed=17572851081745823914821350063249795304305086831976507534914647259850849845680 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=17572851081745823914821350063249795304305086831976507534914647259850849845680 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"11.aon_timer_tl_errors.99456601269124978828332529598684089275355263337371230637066398207063854824852","seed":99456601269124978828332529598684089275355263337371230637066398207063854824852,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=906378644 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/11.aon_timer_tl_errors.906378644 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 11.aon_timer_tl_errors.906378644 -covoverwrite' seed=99456601269124978828332529598684089275355263337371230637066398207063854824852 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=99456601269124978828332529598684089275355263337371230637066398207063854824852 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"11.aon_timer_tl_intg_err.84479498835633095336412907363611074148897671054168441990173915428185256529531","seed":84479498835633095336412907363611074148897671054168441990173915428185256529531,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3186396795 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/11.aon_timer_tl_intg_err.3186396795 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 11.aon_timer_tl_intg_err.3186396795 -covoverwrite' seed=84479498835633095336412907363611074148897671054168441990173915428185256529531 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=84479498835633095336412907363611074148897671054168441990173915428185256529531 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/11.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"12.aon_timer_prescaler.110576405481239113189966361619980635536331971018161439857718995541330981671638","seed":110576405481239113189966361619980635536331971018161439857718995541330981671638,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=528077526 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/12.aon_timer_prescaler.528077526 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 12.aon_timer_prescaler.528077526 -covoverwrite' seed=110576405481239113189966361619980635536331971018161439857718995541330981671638 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=110576405481239113189966361619980635536331971018161439857718995541330981671638 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"12.aon_timer_stress_all_with_rand_reset.101301368989413041174254612635551755049471674393690511589939041396990086598986","seed":101301368989413041174254612635551755049471674393690511589939041396990086598986,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=4191015242 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/12.aon_timer_stress_all_with_rand_reset.4191015242 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 12.aon_timer_stress_all_with_rand_reset.4191015242 -covoverwrite' seed=101301368989413041174254612635551755049471674393690511589939041396990086598986 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=101301368989413041174254612635551755049471674393690511589939041396990086598986 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"12.aon_timer_tl_errors.19682706408709589299337583217653683907538229022827336875302826741842604527783","seed":19682706408709589299337583217653683907538229022827336875302826741842604527783,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=104665255 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/12.aon_timer_tl_errors.104665255 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 12.aon_timer_tl_errors.104665255 -covoverwrite' seed=19682706408709589299337583217653683907538229022827336875302826741842604527783 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=19682706408709589299337583217653683907538229022827336875302826741842604527783 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"12.aon_timer_tl_intg_err.9155227683187365553216821637220946371348553826182446624532664857529532440142","seed":9155227683187365553216821637220946371348553826182446624532664857529532440142,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4191575630 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/12.aon_timer_tl_intg_err.4191575630 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 12.aon_timer_tl_intg_err.4191575630 -covoverwrite' seed=9155227683187365553216821637220946371348553826182446624532664857529532440142 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=9155227683187365553216821637220946371348553826182446624532664857529532440142 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/12.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"13.aon_timer_prescaler.39274587247757186082044991340594888154332512655806873507573586174633667184144","seed":39274587247757186082044991340594888154332512655806873507573586174633667184144,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=180864528 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/13.aon_timer_prescaler.180864528 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 13.aon_timer_prescaler.180864528 -covoverwrite' seed=39274587247757186082044991340594888154332512655806873507573586174633667184144 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=39274587247757186082044991340594888154332512655806873507573586174633667184144 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"13.aon_timer_stress_all_with_rand_reset.30621531229052237816898230078628941477336042412244062610620534073536988308571","seed":30621531229052237816898230078628941477336042412244062610620534073536988308571,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1569711195 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/13.aon_timer_stress_all_with_rand_reset.1569711195 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 13.aon_timer_stress_all_with_rand_reset.1569711195 -covoverwrite' seed=30621531229052237816898230078628941477336042412244062610620534073536988308571 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=30621531229052237816898230078628941477336042412244062610620534073536988308571 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"13.aon_timer_tl_errors.18506268528209794167923680809908730438784158701342232391362005604015366641170","seed":18506268528209794167923680809908730438784158701342232391362005604015366641170,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1392940562 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/13.aon_timer_tl_errors.1392940562 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 13.aon_timer_tl_errors.1392940562 -covoverwrite' seed=18506268528209794167923680809908730438784158701342232391362005604015366641170 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=18506268528209794167923680809908730438784158701342232391362005604015366641170 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"13.aon_timer_tl_intg_err.900069066299632354779301217273995502916355124178579013095216914334524675746","seed":900069066299632354779301217273995502916355124178579013095216914334524675746,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=4282685090 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/13.aon_timer_tl_intg_err.4282685090 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 13.aon_timer_tl_intg_err.4282685090 -covoverwrite' seed=900069066299632354779301217273995502916355124178579013095216914334524675746 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=900069066299632354779301217273995502916355124178579013095216914334524675746 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/13.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_prescaler","qual_name":"14.aon_timer_prescaler.72155016763654874315751014967703286374667349635126223485809325200908823324079","seed":72155016763654874315751014967703286374667349635126223485809325200908823324079,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_prescaler/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_prescaler/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=3660604847 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_prescaler_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/14.aon_timer_prescaler.3660604847 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 14.aon_timer_prescaler.3660604847 -covoverwrite' seed=72155016763654874315751014967703286374667349635126223485809325200908823324079 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=72155016763654874315751014967703286374667349635126223485809325200908823324079 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_prescaler/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_prescaler_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_stress_all_with_rand_reset","qual_name":"14.aon_timer_stress_all_with_rand_reset.89253289643968928957516350348937386423353563312345236567663231469821670475174","seed":89253289643968928957516350348937386423353563312345236567663231469821670475174,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_stress_all_with_rand_reset/latest run_opts='+run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=aon_timer_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/default/xcelium.d -r tb +SVSEED=1027622310 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/default/14.aon_timer_stress_all_with_rand_reset.1027622310 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope default -covtest 14.aon_timer_stress_all_with_rand_reset.1027622310 -covoverwrite' seed=89253289643968928957516350348937386423353563312345236567663231469821670475174 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=89253289643968928957516350348937386423353563312345236567663231469821670475174 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"14.aon_timer_tl_errors.111316794042438990622256715112832261551504997544000968908915822843728935465681","seed":111316794042438990622256715112832261551504997544000968908915822843728935465681,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3133616849 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/14.aon_timer_tl_errors.3133616849 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 14.aon_timer_tl_errors.3133616849 -covoverwrite' seed=111316794042438990622256715112832261551504997544000968908915822843728935465681 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=111316794042438990622256715112832261551504997544000968908915822843728935465681 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"14.aon_timer_tl_intg_err.76841108665731123965338974412442650329190702253437199086703927903399462906008","seed":76841108665731123965338974412442650329190702253437199086703927903399462906008,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2738432152 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/14.aon_timer_tl_intg_err.2738432152 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 14.aon_timer_tl_intg_err.2738432152 -covoverwrite' seed=76841108665731123965338974412442650329190702253437199086703927903399462906008 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=76841108665731123965338974412442650329190702253437199086703927903399462906008 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/14.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"15.aon_timer_tl_errors.29812269857157310622876482484705285513369382767784436208848326907505111387676","seed":29812269857157310622876482484705285513369382767784436208848326907505111387676,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/15.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/15.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2782055964 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/15.aon_timer_tl_errors.2782055964 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 15.aon_timer_tl_errors.2782055964 -covoverwrite' seed=29812269857157310622876482484705285513369382767784436208848326907505111387676 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=29812269857157310622876482484705285513369382767784436208848326907505111387676 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/15.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"15.aon_timer_tl_intg_err.65839455373873351241372964107181970799534880273655281256051662233522754977204","seed":65839455373873351241372964107181970799534880273655281256051662233522754977204,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/15.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/15.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3826679220 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/15.aon_timer_tl_intg_err.3826679220 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 15.aon_timer_tl_intg_err.3826679220 -covoverwrite' seed=65839455373873351241372964107181970799534880273655281256051662233522754977204 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=65839455373873351241372964107181970799534880273655281256051662233522754977204 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/15.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"16.aon_timer_tl_errors.78140995093954721477890536407791515023007049883313475025896945986432802586515","seed":78140995093954721477890536407791515023007049883313475025896945986432802586515,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/16.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/16.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3358162835 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/16.aon_timer_tl_errors.3358162835 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 16.aon_timer_tl_errors.3358162835 -covoverwrite' seed=78140995093954721477890536407791515023007049883313475025896945986432802586515 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=78140995093954721477890536407791515023007049883313475025896945986432802586515 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/16.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"16.aon_timer_tl_intg_err.38953408947976486767397736732092949051073739939934233681265419028652265331032","seed":38953408947976486767397736732092949051073739939934233681265419028652265331032,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/16.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/16.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=136337752 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/16.aon_timer_tl_intg_err.136337752 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 16.aon_timer_tl_intg_err.136337752 -covoverwrite' seed=38953408947976486767397736732092949051073739939934233681265419028652265331032 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=38953408947976486767397736732092949051073739939934233681265419028652265331032 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/16.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"17.aon_timer_tl_errors.11126670380780507926741611973737614118153225013080723291215723854807443736725","seed":11126670380780507926741611973737614118153225013080723291215723854807443736725,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/17.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/17.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3531638933 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/17.aon_timer_tl_errors.3531638933 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 17.aon_timer_tl_errors.3531638933 -covoverwrite' seed=11126670380780507926741611973737614118153225013080723291215723854807443736725 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=11126670380780507926741611973737614118153225013080723291215723854807443736725 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/17.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"17.aon_timer_tl_intg_err.53066580904520362117944509052906572605509820943631440840733403383972420347154","seed":53066580904520362117944509052906572605509820943631440840733403383972420347154,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/17.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/17.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=109536530 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/17.aon_timer_tl_intg_err.109536530 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 17.aon_timer_tl_intg_err.109536530 -covoverwrite' seed=53066580904520362117944509052906572605509820943631440840733403383972420347154 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=53066580904520362117944509052906572605509820943631440840733403383972420347154 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/17.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"18.aon_timer_tl_errors.64825396887917111952155570438748850448677217581841973154102602925586647679504","seed":64825396887917111952155570438748850448677217581841973154102602925586647679504,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/18.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/18.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1564017168 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/18.aon_timer_tl_errors.1564017168 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 18.aon_timer_tl_errors.1564017168 -covoverwrite' seed=64825396887917111952155570438748850448677217581841973154102602925586647679504 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=64825396887917111952155570438748850448677217581841973154102602925586647679504 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/18.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"18.aon_timer_tl_intg_err.93399514711873795167986829617842746376614582027547236314013782799796880916607","seed":93399514711873795167986829617842746376614582027547236314013782799796880916607,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/18.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/18.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=61456511 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/18.aon_timer_tl_intg_err.61456511 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 18.aon_timer_tl_intg_err.61456511 -covoverwrite' seed=93399514711873795167986829617842746376614582027547236314013782799796880916607 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=93399514711873795167986829617842746376614582027547236314013782799796880916607 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/18.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"19.aon_timer_tl_errors.26002143920327930288006727166498187557039985725745930106091654173179007506896","seed":26002143920327930288006727166498187557039985725745930106091654173179007506896,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/19.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/19.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1293982160 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/19.aon_timer_tl_errors.1293982160 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 19.aon_timer_tl_errors.1293982160 -covoverwrite' seed=26002143920327930288006727166498187557039985725745930106091654173179007506896 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=26002143920327930288006727166498187557039985725745930106091654173179007506896 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/19.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"19.aon_timer_tl_intg_err.85845354588821758203318821696288826695790232451261974815749236872454377813296","seed":85845354588821758203318821696288826695790232451261974815749236872454377813296,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/19.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/19.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1496823088 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/19.aon_timer_tl_intg_err.1496823088 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 19.aon_timer_tl_intg_err.1496823088 -covoverwrite' seed=85845354588821758203318821696288826695790232451261974815749236872454377813296 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=85845354588821758203318821696288826695790232451261974815749236872454377813296 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/19.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"20.aon_timer_tl_errors.46714050941168673056602315266183134809717185213734816026863595306654759243892","seed":46714050941168673056602315266183134809717185213734816026863595306654759243892,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/20.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/20.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=532009076 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/20.aon_timer_tl_errors.532009076 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 20.aon_timer_tl_errors.532009076 -covoverwrite' seed=46714050941168673056602315266183134809717185213734816026863595306654759243892 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=46714050941168673056602315266183134809717185213734816026863595306654759243892 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/20.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"20.aon_timer_tl_intg_err.59582739628525093448458854969098991579286015836751444852371025370987412863585","seed":59582739628525093448458854969098991579286015836751444852371025370987412863585,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/20.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/20.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2864986721 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/20.aon_timer_tl_intg_err.2864986721 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 20.aon_timer_tl_intg_err.2864986721 -covoverwrite' seed=59582739628525093448458854969098991579286015836751444852371025370987412863585 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=59582739628525093448458854969098991579286015836751444852371025370987412863585 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/20.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"21.aon_timer_tl_errors.26839097888773524699256567031209235757123764293691106801934043949310165715765","seed":26839097888773524699256567031209235757123764293691106801934043949310165715765,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/21.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/21.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2550467381 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/21.aon_timer_tl_errors.2550467381 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 21.aon_timer_tl_errors.2550467381 -covoverwrite' seed=26839097888773524699256567031209235757123764293691106801934043949310165715765 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=26839097888773524699256567031209235757123764293691106801934043949310165715765 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/21.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"21.aon_timer_tl_intg_err.80490545301363923047084861157722648541297210872125258093895830725138277690076","seed":80490545301363923047084861157722648541297210872125258093895830725138277690076,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/21.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/21.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1170434780 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/21.aon_timer_tl_intg_err.1170434780 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 21.aon_timer_tl_intg_err.1170434780 -covoverwrite' seed=80490545301363923047084861157722648541297210872125258093895830725138277690076 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=80490545301363923047084861157722648541297210872125258093895830725138277690076 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/21.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"22.aon_timer_tl_errors.25526930136216566456681721892400512735490298345630475663539716765143215231200","seed":25526930136216566456681721892400512735490298345630475663539716765143215231200,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/22.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/22.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2410008800 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/22.aon_timer_tl_errors.2410008800 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 22.aon_timer_tl_errors.2410008800 -covoverwrite' seed=25526930136216566456681721892400512735490298345630475663539716765143215231200 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=25526930136216566456681721892400512735490298345630475663539716765143215231200 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/22.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"22.aon_timer_tl_intg_err.7284897480041993068941755436987900648738725515236502098139959245143356278169","seed":7284897480041993068941755436987900648738725515236502098139959245143356278169,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/22.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/22.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=2563835289 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/22.aon_timer_tl_intg_err.2563835289 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 22.aon_timer_tl_intg_err.2563835289 -covoverwrite' seed=7284897480041993068941755436987900648738725515236502098139959245143356278169 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=7284897480041993068941755436987900648738725515236502098139959245143356278169 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/22.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"23.aon_timer_tl_errors.79135473683618564485309577415648902625230875813009341121027904385772242022789","seed":79135473683618564485309577415648902625230875813009341121027904385772242022789,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/23.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/23.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=882061701 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/23.aon_timer_tl_errors.882061701 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 23.aon_timer_tl_errors.882061701 -covoverwrite' seed=79135473683618564485309577415648902625230875813009341121027904385772242022789 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=79135473683618564485309577415648902625230875813009341121027904385772242022789 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/23.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"23.aon_timer_tl_intg_err.88871220746364796255640377863739794597239173164500165720193992085349865146026","seed":88871220746364796255640377863739794597239173164500165720193992085349865146026,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/23.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/23.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3405301418 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/23.aon_timer_tl_intg_err.3405301418 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 23.aon_timer_tl_intg_err.3405301418 -covoverwrite' seed=88871220746364796255640377863739794597239173164500165720193992085349865146026 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=88871220746364796255640377863739794597239173164500165720193992085349865146026 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/23.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_errors","qual_name":"24.aon_timer_tl_errors.17067277887432965360616461503856391149925918480612390748209135696181182203526","seed":17067277887432965360616461503856391149925918480612390748209135696181182203526,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/24.aon_timer_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/24.aon_timer_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=1055000198 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/24.aon_timer_tl_errors.1055000198 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 24.aon_timer_tl_errors.1055000198 -covoverwrite' seed=17067277887432965360616461503856391149925918480612390748209135696181182203526 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=17067277887432965360616461503856391149925918480612390748209135696181182203526 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/24.aon_timer_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"aon_timer_tl_intg_err","qual_name":"24.aon_timer_tl_intg_err.99068068131348533571632592109898399977914344759356557401510233056998359700522","seed":99068068131348533571632592109898399977914344759356557401510233056998359700522,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/24.aon_timer_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=xrun run_dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/24.aon_timer_tl_intg_err/latest run_opts='+run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -input /nightly/current_run/opentitan/hw/dv/tools/sim.tcl -nocopyright -licqueue -64bit -xmlibdirname /nightly/current_run/scratch/master/aon_timer-sim-xcelium/cover_reg_top/xcelium.d -r tb +SVSEED=3464369194 +UVM_TESTNAME=aon_timer_base_test +UVM_TEST_SEQ=aon_timer_common_vseq -nowarn DSEM2009 +en_cov=1 -covmodeldir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage/cover_reg_top/24.aon_timer_tl_intg_err.3464369194 -covworkdir /nightly/current_run/scratch/master/aon_timer-sim-xcelium/coverage -covscope cover_reg_top -covtest 24.aon_timer_tl_intg_err.3464369194 -covoverwrite' seed=99068068131348533571632592109898399977914344759356557401510233056998359700522 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=99068068131348533571632592109898399977914344759356557401510233056998359700522 --run-dir=/nightly/current_run/scratch/master/aon_timer-sim-xcelium/24.aon_timer_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=aon_timer_base_test uvm_test_seq=aon_timer_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]}],"Job returned a non-zero exit code: *":[{"name":"aon_timer","qual_name":"cov_merge","seed":null,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/cov_merge/merged/cov_merge.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk cov_merge cov_merge_cmd=imc cov_merge_opts='-64bit -licqueue -exec /nightly/current_run/opentitan/hw/dv/tools/xcelium/cov_merge.tcl'\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:109: cov_merge] Error 126\n"]}],"Job cancelled because one of its dependencies failed or was killed.":[{"name":"aon_timer","qual_name":"cov_report","seed":null,"line":null,"log_path":"/nightly/current_run/scratch/master/aon_timer-sim-xcelium/cov_report/cov_report.log","log_context":[]}]}},"passed":15,"total":180,"percent":8.333333333333334}