{"block":{"name":"gpio","variant":null,"commit":"a0994129303fcb17a56df9a84a3babc5b4069141","commit_short":"a099412","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/a0994129303fcb17a56df9a84a3babc5b4069141","revision_info":"GitHub Revision: [`a099412`](https://github.com/lowrisc/opentitan/tree/a0994129303fcb17a56df9a84a3babc5b4069141)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-08-28T21:54:34Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/top_darjeeling/ip_autogen/gpio/data/gpio_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"gpio_smoke":{"max_time":1.5167261324822903,"sim_time":0.0,"passed":0,"total":10,"percent":0.0},"gpio_smoke_no_pullup_pulldown":{"max_time":1.5270324498414993,"sim_time":0.0,"passed":0,"total":10,"percent":0.0},"gpio_smoke_en_cdc_prim":{"max_time":1.473313351161778,"sim_time":0.0,"passed":0,"total":10,"percent":0.0},"gpio_smoke_no_pullup_pulldown_en_cdc_prim":{"max_time":0.8422259595245123,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":40,"percent":0.0},"csr_hw_reset":{"tests":{"gpio_csr_hw_reset":{"max_time":0.8267882009968162,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"csr_rw":{"tests":{"gpio_csr_rw":{"max_time":0.8338574329391122,"sim_time":0.0,"passed":0,"total":5,"percent":0.0}},"passed":0,"total":5,"percent":0.0},"csr_bit_bash":{"tests":{"gpio_csr_bit_bash":{"max_time":0.8362883003428578,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"csr_aliasing":{"tests":{"gpio_csr_aliasing":{"max_time":0.8619623212143779,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"csr_mem_rw_with_rand_reset":{"tests":{"gpio_csr_mem_rw_with_rand_reset":{"max_time":1.4835549788549542,"sim_time":0.0,"passed":0,"total":5,"percent":0.0}},"passed":0,"total":5,"percent":0.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"gpio_csr_rw":{"max_time":0.8338574329391122,"sim_time":0.0,"passed":0,"total":5,"percent":0.0},"gpio_csr_aliasing":{"max_time":0.8619623212143779,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":6,"percent":0.0}},"passed":0,"total":53,"percent":0.0},"V2":{"testpoints":{"direct_and_masked_out":{"tests":{"gpio_random_dout_din":{"max_time":1.527335631661117,"sim_time":0.0,"passed":0,"total":10,"percent":0.0},"gpio_random_dout_din_no_pullup_pulldown":{"max_time":0.8366997260600328,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":20,"percent":0.0},"out_in_regs_read_write":{"tests":{"gpio_dout_din_regs_random_rw":{"max_time":1.4831471154466271,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"gpio_interrupt_programming":{"tests":{"gpio_intr_rand_pgm":{"max_time":0.8212814386934042,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"random_interrupt_trigger":{"tests":{"gpio_rand_intr_trigger":{"max_time":1.52227667812258,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"interrupt_and_noise_filter":{"tests":{"gpio_intr_with_filter_rand_intr_event":{"max_time":1.5044745104387403,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"noise_filter_stress":{"tests":{"gpio_filter_stress":{"max_time":0.8387492801994085,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"regs_long_reads_and_writes":{"tests":{"gpio_random_long_reg_writes_reg_reads":{"max_time":0.8449903074651957,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"full_random":{"tests":{"gpio_full_random":{"max_time":0.8652381412684917,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"stress_all":{"tests":{"gpio_stress_all":{"max_time":123.48000000000002,"sim_time":12693.357536,"passed":4,"total":10,"percent":40.0}},"passed":4,"total":10,"percent":40.0},"alert_test":{"tests":{"gpio_alert_test":{"max_time":0.8366197729483247,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"intr_test":{"tests":{"gpio_intr_test":{"max_time":0.8297018809244037,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"tl_d_oob_addr_access":{"tests":{"gpio_tl_errors":{"max_time":1.5106778163462877,"sim_time":0.0,"passed":0,"total":25,"percent":0.0}},"passed":0,"total":25,"percent":0.0},"tl_d_illegal_access":{"tests":{"gpio_tl_errors":{"max_time":1.5106778163462877,"sim_time":0.0,"passed":0,"total":25,"percent":0.0}},"passed":0,"total":25,"percent":0.0},"tl_d_outstanding_access":{"tests":{"gpio_csr_rw":{"max_time":0.8338574329391122,"sim_time":0.0,"passed":0,"total":5,"percent":0.0},"gpio_same_csr_outstanding":{"max_time":0.827536441385746,"sim_time":0.0,"passed":0,"total":5,"percent":0.0},"gpio_csr_aliasing":{"max_time":0.8619623212143779,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"gpio_csr_hw_reset":{"max_time":0.8267882009968162,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":12,"percent":0.0},"tl_d_partial_access":{"tests":{"gpio_csr_rw":{"max_time":0.8338574329391122,"sim_time":0.0,"passed":0,"total":5,"percent":0.0},"gpio_same_csr_outstanding":{"max_time":0.827536441385746,"sim_time":0.0,"passed":0,"total":5,"percent":0.0},"gpio_csr_aliasing":{"max_time":0.8619623212143779,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"gpio_csr_hw_reset":{"max_time":0.8267882009968162,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":12,"percent":0.0}},"passed":4,"total":157,"percent":2.5477707006369426},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"gpio_tl_intg_err":{"max_time":0.8464588019996881,"sim_time":0.0,"passed":0,"total":25,"percent":0.0},"gpio_sec_cm":{"max_time":0.8314547967165709,"sim_time":0.0,"passed":0,"total":5,"percent":0.0}},"passed":0,"total":30,"percent":0.0},"sec_cm_bus_integrity":{"tests":{"gpio_tl_intg_err":{"max_time":0.8464588019996881,"sim_time":0.0,"passed":0,"total":25,"percent":0.0}},"passed":0,"total":25,"percent":0.0}},"passed":0,"total":30,"percent":0.0},"V3":{"testpoints":{"straps_data":{"tests":{"gpio_rand_straps":{"max_time":1.4778145579621196,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0},"stress_all_with_rand_reset":{"tests":{"gpio_stress_all_with_rand_reset":{"max_time":1.490448959171772,"sim_time":0.0,"passed":0,"total":10,"percent":0.0}},"passed":0,"total":10,"percent":0.0}},"passed":0,"total":20,"percent":0.0},"unmapped":{"testpoints":{"Unmapped":{"tests":{"gpio_inp_prd_cnt":{"max_time":0.8500496167689562,"sim_time":0.0,"passed":0,"total":50,"percent":0.0}},"passed":0,"total":50,"percent":0.0}},"passed":0,"total":50,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":null,"branch":null,"condition_expression":null,"toggle":null,"fsm":null},"assertion":null,"functional":null},"cov_report_page":"/nightly/current_run/scratch/master/gpio-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"Some pass patterns missing: ['^TEST PASSED (UVM_)?CHECKS$']":[{"name":"gpio_smoke","qual_name":"0.gpio_smoke.114842027822483372946658527728185307747581539566878144027265253433047243840491","seed":114842027822483372946658527728185307747581539566878144027265253433047243840491,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=78928875 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_smoke.78928875' seed=114842027822483372946658527728185307747581539566878144027265253433047243840491 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=114842027822483372946658527728185307747581539566878144027265253433047243840491 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"0.gpio_smoke_no_pullup_pulldown.48594637919650358159437223527227121405971258564082259850046728649535472158240","seed":48594637919650358159437223527227121405971258564082259850046728649535472158240,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3452585504 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_smoke_no_pullup_pulldown.3452585504' seed=48594637919650358159437223527227121405971258564082259850046728649535472158240 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=48594637919650358159437223527227121405971258564082259850046728649535472158240 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"0.gpio_inp_prd_cnt.28091155698008589693372413641664222402285888976602746762712116070327174669872","seed":28091155698008589693372413641664222402285888976602746762712116070327174669872,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3969230384 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_inp_prd_cnt.3969230384' seed=28091155698008589693372413641664222402285888976602746762712116070327174669872 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=28091155698008589693372413641664222402285888976602746762712116070327174669872 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"0.gpio_random_dout_din.100791037368449324864113939952189341751167181583319174693103909203217833397101","seed":100791037368449324864113939952189341751167181583319174693103909203217833397101,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2985692013 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_random_dout_din.2985692013' seed=100791037368449324864113939952189341751167181583319174693103909203217833397101 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=100791037368449324864113939952189341751167181583319174693103909203217833397101 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"0.gpio_random_dout_din_no_pullup_pulldown.109257122737391120542662463326294367805254425751013097932618503054564798125726","seed":109257122737391120542662463326294367805254425751013097932618503054564798125726,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1012291230 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_random_dout_din_no_pullup_pulldown.1012291230' seed=109257122737391120542662463326294367805254425751013097932618503054564798125726 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=109257122737391120542662463326294367805254425751013097932618503054564798125726 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"0.gpio_dout_din_regs_random_rw.16909735041187407454226629430461697818602249278261775244412449913610805458355","seed":16909735041187407454226629430461697818602249278261775244412449913610805458355,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2619094451 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_dout_din_regs_random_rw.2619094451' seed=16909735041187407454226629430461697818602249278261775244412449913610805458355 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=16909735041187407454226629430461697818602249278261775244412449913610805458355 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"0.gpio_intr_rand_pgm.85546698745321019117280056021157301118926083956725345072195714323751254081337","seed":85546698745321019117280056021157301118926083956725345072195714323751254081337,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3880501049 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_intr_rand_pgm.3880501049' seed=85546698745321019117280056021157301118926083956725345072195714323751254081337 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=85546698745321019117280056021157301118926083956725345072195714323751254081337 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"0.gpio_rand_intr_trigger.12775422407780395173237497040925597693266927289537108727046578677181873994687","seed":12775422407780395173237497040925597693266927289537108727046578677181873994687,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3650173887 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_rand_intr_trigger.3650173887' seed=12775422407780395173237497040925597693266927289537108727046578677181873994687 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=12775422407780395173237497040925597693266927289537108727046578677181873994687 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"0.gpio_intr_with_filter_rand_intr_event.29384531543027590612917802737211925318730681743118456074406760386179601426874","seed":29384531543027590612917802737211925318730681743118456074406760386179601426874,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3927599546 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_intr_with_filter_rand_intr_event.3927599546' seed=29384531543027590612917802737211925318730681743118456074406760386179601426874 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=29384531543027590612917802737211925318730681743118456074406760386179601426874 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"0.gpio_filter_stress.63641527414167151955423853989953148334107740072617187359530519847507036696273","seed":63641527414167151955423853989953148334107740072617187359530519847507036696273,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=749956817 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_filter_stress.749956817' seed=63641527414167151955423853989953148334107740072617187359530519847507036696273 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=63641527414167151955423853989953148334107740072617187359530519847507036696273 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"0.gpio_random_long_reg_writes_reg_reads.20653997051821220443425012719109351995513526882883300890278548393608030549204","seed":20653997051821220443425012719109351995513526882883300890278548393608030549204,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3734598868 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_random_long_reg_writes_reg_reads.3734598868' seed=20653997051821220443425012719109351995513526882883300890278548393608030549204 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=20653997051821220443425012719109351995513526882883300890278548393608030549204 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"0.gpio_full_random.101296546484698479223338730727445989753940123654505470702771897404849531823831","seed":101296546484698479223338730727445989753940123654505470702771897404849531823831,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=385525463 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_full_random.385525463' seed=101296546484698479223338730727445989753940123654505470702771897404849531823831 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=101296546484698479223338730727445989753940123654505470702771897404849531823831 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"0.gpio_stress_all_with_rand_reset.41705605187175803274850631553349292689693294699550838273514321616217968194040","seed":41705605187175803274850631553349292689693294699550838273514321616217968194040,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3211244024 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_stress_all_with_rand_reset.3211244024' seed=41705605187175803274850631553349292689693294699550838273514321616217968194040 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=41705605187175803274850631553349292689693294699550838273514321616217968194040 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_rw","qual_name":"0.gpio_csr_rw.53527047902942974888912105013865357957961544999862113196952557350468578598241","seed":53527047902942974888912105013865357957961544999862113196952557350468578598241,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_rw/latest run_opts='+do_clear_all_interrupts=0 +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1181113697 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.gpio_csr_rw.1181113697' seed=53527047902942974888912105013865357957961544999862113196952557350468578598241 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=53527047902942974888912105013865357957961544999862113196952557350468578598241 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_same_csr_outstanding","qual_name":"0.gpio_same_csr_outstanding.103074015176687825934727084096963703423735535435914249240639675647943365281165","seed":103074015176687825934727084096963703423735535435914249240639675647943365281165,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_same_csr_outstanding/latest run_opts='+do_clear_all_interrupts=0 +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3139356045 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.gpio_same_csr_outstanding.3139356045' seed=103074015176687825934727084096963703423735535435914249240639675647943365281165 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=103074015176687825934727084096963703423735535435914249240639675647943365281165 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_aliasing","qual_name":"0.gpio_csr_aliasing.98482088709133729699016154811490552652832714844949588999351335982123061705786","seed":98482088709133729699016154811490552652832714844949588999351335982123061705786,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_aliasing/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_aliasing/latest run_opts='+do_clear_all_interrupts=0 +csr_aliasing +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=276134970 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.gpio_csr_aliasing.276134970' seed=98482088709133729699016154811490552652832714844949588999351335982123061705786 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=98482088709133729699016154811490552652832714844949588999351335982123061705786 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_aliasing/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_mem_rw_with_rand_reset","qual_name":"0.gpio_csr_mem_rw_with_rand_reset.70078878873368172926504819559970809562214591848000865596197542293790660718403","seed":70078878873368172926504819559970809562214591848000865596197542293790660718403,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_mem_rw_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1907322691 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.gpio_csr_mem_rw_with_rand_reset.1907322691' seed=70078878873368172926504819559970809562214591848000865596197542293790660718403 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=70078878873368172926504819559970809562214591848000865596197542293790660718403 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"0.gpio_tl_intg_err.81275060726359518586016403493230051829397748691561410423985869424236945801552","seed":81275060726359518586016403493230051829397748691561410423985869424236945801552,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2657681744 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.gpio_tl_intg_err.2657681744' seed=81275060726359518586016403493230051829397748691561410423985869424236945801552 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=81275060726359518586016403493230051829397748691561410423985869424236945801552 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"0.gpio_smoke_en_cdc_prim.49951399588151179284414887179318146181451867320815968245704636989955706735823","seed":49951399588151179284414887179318146181451867320815968245704636989955706735823,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=629427407 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 0.gpio_smoke_en_cdc_prim.629427407' seed=49951399588151179284414887179318146181451867320815968245704636989955706735823 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=49951399588151179284414887179318146181451867320815968245704636989955706735823 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"0.gpio_smoke_no_pullup_pulldown_en_cdc_prim.67112597766793404363420823685871832517509434327935074489280253257157639581636","seed":67112597766793404363420823685871832517509434327935074489280253257157639581636,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4243500996 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 0.gpio_smoke_no_pullup_pulldown_en_cdc_prim.4243500996' seed=67112597766793404363420823685871832517509434327935074489280253257157639581636 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=67112597766793404363420823685871832517509434327935074489280253257157639581636 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"0.gpio_rand_straps.47610483375850315807592468953191336764565984449851886980186318109774560230561","seed":47610483375850315807592468953191336764565984449851886980186318109774560230561,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=426114209 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_rand_straps.426114209' seed=47610483375850315807592468953191336764565984449851886980186318109774560230561 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=47610483375850315807592468953191336764565984449851886980186318109774560230561 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_sec_cm","qual_name":"0.gpio_sec_cm.12215387642347112453393622327632125717544145359614494868205676408879817680819","seed":12215387642347112453393622327632125717544145359614494868205676408879817680819,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2617763763 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_sec_cm.2617763763' seed=12215387642347112453393622327632125717544145359614494868205676408879817680819 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=12215387642347112453393622327632125717544145359614494868205676408879817680819 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"0.gpio_tl_errors.107394551097724588340338156685464580371173860959251298985612365062962320555970","seed":107394551097724588340338156685464580371173860959251298985612365062962320555970,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3765747650 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.gpio_tl_errors.3765747650' seed=107394551097724588340338156685464580371173860959251298985612365062962320555970 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=107394551097724588340338156685464580371173860959251298985612365062962320555970 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"0.gpio_intr_test.99059584561733675296505308827365613136595942713266374736389466749927210207067","seed":99059584561733675296505308827365613136595942713266374736389466749927210207067,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3879847771 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.gpio_intr_test.3879847771' seed=99059584561733675296505308827365613136595942713266374736389466749927210207067 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=99059584561733675296505308827365613136595942713266374736389466749927210207067 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"0.gpio_alert_test.44853183145375545330151401144331313301927140365209817895117559110949398454182","seed":44853183145375545330151401144331313301927140365209817895117559110949398454182,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2214666150 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.gpio_alert_test.2214666150' seed=44853183145375545330151401144331313301927140365209817895117559110949398454182 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=44853183145375545330151401144331313301927140365209817895117559110949398454182 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_hw_reset","qual_name":"0.gpio_csr_hw_reset.113183671405910637571887067320847941568861522990199569402921735312142172284027","seed":113183671405910637571887067320847941568861522990199569402921735312142172284027,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_hw_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_hw_reset/latest run_opts='+csr_hw_reset +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3627672699 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.gpio_csr_hw_reset.3627672699' seed=113183671405910637571887067320847941568861522990199569402921735312142172284027 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=113183671405910637571887067320847941568861522990199569402921735312142172284027 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_hw_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_bit_bash","qual_name":"0.gpio_csr_bit_bash.45482500580464746273047877876628202643377353084270858963380995486836621607581","seed":45482500580464746273047877876628202643377353084270858963380995486836621607581,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_bit_bash/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_bit_bash/latest run_opts='+csr_bit_bash +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=565740189 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.gpio_csr_bit_bash.565740189' seed=45482500580464746273047877876628202643377353084270858963380995486836621607581 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=45482500580464746273047877876628202643377353084270858963380995486836621607581 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/0.gpio_csr_bit_bash/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke","qual_name":"1.gpio_smoke.84177934255688164370266118166595569549860440580036381270710675169715083311554","seed":84177934255688164370266118166595569549860440580036381270710675169715083311554,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2679929282 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_smoke.2679929282' seed=84177934255688164370266118166595569549860440580036381270710675169715083311554 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=84177934255688164370266118166595569549860440580036381270710675169715083311554 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"1.gpio_smoke_no_pullup_pulldown.70557381028050409856903978540013019050483162677991351434706541200325385096094","seed":70557381028050409856903978540013019050483162677991351434706541200325385096094,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1055886238 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_smoke_no_pullup_pulldown.1055886238' seed=70557381028050409856903978540013019050483162677991351434706541200325385096094 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=70557381028050409856903978540013019050483162677991351434706541200325385096094 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"1.gpio_inp_prd_cnt.77287455087418720293445625790707083961785117728049504662341178485562515787972","seed":77287455087418720293445625790707083961785117728049504662341178485562515787972,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1899892932 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_inp_prd_cnt.1899892932' seed=77287455087418720293445625790707083961785117728049504662341178485562515787972 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=77287455087418720293445625790707083961785117728049504662341178485562515787972 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"1.gpio_random_dout_din.110430928345988463866201796842674366773873928868989970148378237076482002294597","seed":110430928345988463866201796842674366773873928868989970148378237076482002294597,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=377526085 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_random_dout_din.377526085' seed=110430928345988463866201796842674366773873928868989970148378237076482002294597 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=110430928345988463866201796842674366773873928868989970148378237076482002294597 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"1.gpio_random_dout_din_no_pullup_pulldown.114780285786944082527099193373039827139331635947602045128688838446470621934414","seed":114780285786944082527099193373039827139331635947602045128688838446470621934414,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=911848270 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_random_dout_din_no_pullup_pulldown.911848270' seed=114780285786944082527099193373039827139331635947602045128688838446470621934414 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=114780285786944082527099193373039827139331635947602045128688838446470621934414 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"1.gpio_dout_din_regs_random_rw.114029756190609286206308617285829385452224018336906467729198424238065026410338","seed":114029756190609286206308617285829385452224018336906467729198424238065026410338,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3994101602 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_dout_din_regs_random_rw.3994101602' seed=114029756190609286206308617285829385452224018336906467729198424238065026410338 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=114029756190609286206308617285829385452224018336906467729198424238065026410338 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"1.gpio_intr_rand_pgm.32610009460145564136629681696325618677827334859442888469627466070537890565124","seed":32610009460145564136629681696325618677827334859442888469627466070537890565124,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4031384580 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_intr_rand_pgm.4031384580' seed=32610009460145564136629681696325618677827334859442888469627466070537890565124 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=32610009460145564136629681696325618677827334859442888469627466070537890565124 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"1.gpio_rand_intr_trigger.45190099359001389838881909537734904663965866059019303732078209812819912212172","seed":45190099359001389838881909537734904663965866059019303732078209812819912212172,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=19447500 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_rand_intr_trigger.19447500' seed=45190099359001389838881909537734904663965866059019303732078209812819912212172 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=45190099359001389838881909537734904663965866059019303732078209812819912212172 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"1.gpio_intr_with_filter_rand_intr_event.104497579114566089178105124064840041621386810750691278498251170046179783237636","seed":104497579114566089178105124064840041621386810750691278498251170046179783237636,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1034969092 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_intr_with_filter_rand_intr_event.1034969092' seed=104497579114566089178105124064840041621386810750691278498251170046179783237636 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=104497579114566089178105124064840041621386810750691278498251170046179783237636 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"1.gpio_filter_stress.19309458039492570504389547184837117348133097695079119375941138057085460786656","seed":19309458039492570504389547184837117348133097695079119375941138057085460786656,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2811342304 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_filter_stress.2811342304' seed=19309458039492570504389547184837117348133097695079119375941138057085460786656 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=19309458039492570504389547184837117348133097695079119375941138057085460786656 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"1.gpio_random_long_reg_writes_reg_reads.2809519907542683380525539588102816198099374737151697036933350079859041052136","seed":2809519907542683380525539588102816198099374737151697036933350079859041052136,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3088917992 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_random_long_reg_writes_reg_reads.3088917992' seed=2809519907542683380525539588102816198099374737151697036933350079859041052136 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=2809519907542683380525539588102816198099374737151697036933350079859041052136 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"1.gpio_full_random.16139360607048926653709586909147472480837740373122164539134230023042971696813","seed":16139360607048926653709586909147472480837740373122164539134230023042971696813,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1941143213 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_full_random.1941143213' seed=16139360607048926653709586909147472480837740373122164539134230023042971696813 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=16139360607048926653709586909147472480837740373122164539134230023042971696813 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"1.gpio_stress_all_with_rand_reset.7242781657779182411940981180286884502960463404271493085072396034928066152825","seed":7242781657779182411940981180286884502960463404271493085072396034928066152825,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3662137721 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_stress_all_with_rand_reset.3662137721' seed=7242781657779182411940981180286884502960463404271493085072396034928066152825 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=7242781657779182411940981180286884502960463404271493085072396034928066152825 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_rw","qual_name":"1.gpio_csr_rw.107050728370814393481866807850206202738958985431990637756207658404712711063909","seed":107050728370814393481866807850206202738958985431990637756207658404712711063909,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_csr_rw/latest run_opts='+do_clear_all_interrupts=0 +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1660029285 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.gpio_csr_rw.1660029285' seed=107050728370814393481866807850206202738958985431990637756207658404712711063909 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=107050728370814393481866807850206202738958985431990637756207658404712711063909 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_same_csr_outstanding","qual_name":"1.gpio_same_csr_outstanding.25003477781984554490701462973559172017072454097257809083075372584629145071594","seed":25003477781984554490701462973559172017072454097257809083075372584629145071594,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_same_csr_outstanding/latest run_opts='+do_clear_all_interrupts=0 +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=774008810 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.gpio_same_csr_outstanding.774008810' seed=25003477781984554490701462973559172017072454097257809083075372584629145071594 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=25003477781984554490701462973559172017072454097257809083075372584629145071594 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_mem_rw_with_rand_reset","qual_name":"1.gpio_csr_mem_rw_with_rand_reset.63868137974642034504099221723728344825672489399797022372262982114009378562408","seed":63868137974642034504099221723728344825672489399797022372262982114009378562408,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_csr_mem_rw_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2697568616 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.gpio_csr_mem_rw_with_rand_reset.2697568616' seed=63868137974642034504099221723728344825672489399797022372262982114009378562408 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=63868137974642034504099221723728344825672489399797022372262982114009378562408 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"1.gpio_tl_intg_err.107581198262916590411161647265548694286613900917741221435009391283114205386134","seed":107581198262916590411161647265548694286613900917741221435009391283114205386134,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1177949590 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.gpio_tl_intg_err.1177949590' seed=107581198262916590411161647265548694286613900917741221435009391283114205386134 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=107581198262916590411161647265548694286613900917741221435009391283114205386134 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"1.gpio_smoke_en_cdc_prim.43587020702522709353654099701582719340329313572790206872471785470004002243633","seed":43587020702522709353654099701582719340329313572790206872471785470004002243633,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1648575537 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 1.gpio_smoke_en_cdc_prim.1648575537' seed=43587020702522709353654099701582719340329313572790206872471785470004002243633 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=43587020702522709353654099701582719340329313572790206872471785470004002243633 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"1.gpio_smoke_no_pullup_pulldown_en_cdc_prim.44952868663989800339737477457060510946609383628068739925067273309365923987694","seed":44952868663989800339737477457060510946609383628068739925067273309365923987694,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=805028078 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 1.gpio_smoke_no_pullup_pulldown_en_cdc_prim.805028078' seed=44952868663989800339737477457060510946609383628068739925067273309365923987694 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=44952868663989800339737477457060510946609383628068739925067273309365923987694 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"1.gpio_rand_straps.71876976325372192734706832230514018786798936734758413827633052496373051407708","seed":71876976325372192734706832230514018786798936734758413827633052496373051407708,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2514337116 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_rand_straps.2514337116' seed=71876976325372192734706832230514018786798936734758413827633052496373051407708 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=71876976325372192734706832230514018786798936734758413827633052496373051407708 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_sec_cm","qual_name":"1.gpio_sec_cm.81423902244449981611243823147573830702731821202554072454007346355862321926228","seed":81423902244449981611243823147573830702731821202554072454007346355862321926228,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2534314068 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_sec_cm.2534314068' seed=81423902244449981611243823147573830702731821202554072454007346355862321926228 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=81423902244449981611243823147573830702731821202554072454007346355862321926228 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"1.gpio_tl_errors.48278309394615941331194104670789522914542032121139645736806680100615954398920","seed":48278309394615941331194104670789522914542032121139645736806680100615954398920,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=391413448 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.gpio_tl_errors.391413448' seed=48278309394615941331194104670789522914542032121139645736806680100615954398920 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=48278309394615941331194104670789522914542032121139645736806680100615954398920 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"1.gpio_intr_test.86758775788636181978685926065592436348702616692421057415667298213858107743264","seed":86758775788636181978685926065592436348702616692421057415667298213858107743264,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4018691104 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.gpio_intr_test.4018691104' seed=86758775788636181978685926065592436348702616692421057415667298213858107743264 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=86758775788636181978685926065592436348702616692421057415667298213858107743264 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"1.gpio_alert_test.31118777201744681430365782790565561924791108196502051966417539871035832690342","seed":31118777201744681430365782790565561924791108196502051966417539871035832690342,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2146985638 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.gpio_alert_test.2146985638' seed=31118777201744681430365782790565561924791108196502051966417539871035832690342 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=31118777201744681430365782790565561924791108196502051966417539871035832690342 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/1.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke","qual_name":"2.gpio_smoke.41810590593861523119487166848949525287404382270723871171095880416328772429574","seed":41810590593861523119487166848949525287404382270723871171095880416328772429574,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3572180742 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_smoke.3572180742' seed=41810590593861523119487166848949525287404382270723871171095880416328772429574 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=41810590593861523119487166848949525287404382270723871171095880416328772429574 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"2.gpio_smoke_no_pullup_pulldown.6302674137861677207451889969406759571365123630664161885161448550802559693315","seed":6302674137861677207451889969406759571365123630664161885161448550802559693315,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2018341379 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_smoke_no_pullup_pulldown.2018341379' seed=6302674137861677207451889969406759571365123630664161885161448550802559693315 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=6302674137861677207451889969406759571365123630664161885161448550802559693315 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"2.gpio_inp_prd_cnt.96226485052571300158392874304659031354283396810700626023350711235151790943856","seed":96226485052571300158392874304659031354283396810700626023350711235151790943856,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2606575216 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_inp_prd_cnt.2606575216' seed=96226485052571300158392874304659031354283396810700626023350711235151790943856 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=96226485052571300158392874304659031354283396810700626023350711235151790943856 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"2.gpio_random_dout_din.32239221226229620124155654558599516830362015669127300296067791513250137470603","seed":32239221226229620124155654558599516830362015669127300296067791513250137470603,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3114366603 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_random_dout_din.3114366603' seed=32239221226229620124155654558599516830362015669127300296067791513250137470603 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=32239221226229620124155654558599516830362015669127300296067791513250137470603 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"2.gpio_random_dout_din_no_pullup_pulldown.1786598549196401090405538297053188565703227167858836864319039313484391098532","seed":1786598549196401090405538297053188565703227167858836864319039313484391098532,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3852445860 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_random_dout_din_no_pullup_pulldown.3852445860' seed=1786598549196401090405538297053188565703227167858836864319039313484391098532 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=1786598549196401090405538297053188565703227167858836864319039313484391098532 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"2.gpio_dout_din_regs_random_rw.104178625843987861381000017670802931903636319644598467234502986390968190277652","seed":104178625843987861381000017670802931903636319644598467234502986390968190277652,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1677367316 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_dout_din_regs_random_rw.1677367316' seed=104178625843987861381000017670802931903636319644598467234502986390968190277652 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=104178625843987861381000017670802931903636319644598467234502986390968190277652 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"2.gpio_intr_rand_pgm.73983415127897091361006275457213308261336693230960011309033700679328409264455","seed":73983415127897091361006275457213308261336693230960011309033700679328409264455,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3176079687 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_intr_rand_pgm.3176079687' seed=73983415127897091361006275457213308261336693230960011309033700679328409264455 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=73983415127897091361006275457213308261336693230960011309033700679328409264455 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"2.gpio_rand_intr_trigger.34618232786769307698642751523231337743075756183299130389207438897242492858342","seed":34618232786769307698642751523231337743075756183299130389207438897242492858342,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2494263270 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_rand_intr_trigger.2494263270' seed=34618232786769307698642751523231337743075756183299130389207438897242492858342 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=34618232786769307698642751523231337743075756183299130389207438897242492858342 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"2.gpio_intr_with_filter_rand_intr_event.105815545969874178229311571892921724949824490873893833414248615357480574777158","seed":105815545969874178229311571892921724949824490873893833414248615357480574777158,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3760846662 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_intr_with_filter_rand_intr_event.3760846662' seed=105815545969874178229311571892921724949824490873893833414248615357480574777158 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=105815545969874178229311571892921724949824490873893833414248615357480574777158 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"2.gpio_filter_stress.20114234580817738861253623673475127848983984902647258841283551420334338884969","seed":20114234580817738861253623673475127848983984902647258841283551420334338884969,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3747497321 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_filter_stress.3747497321' seed=20114234580817738861253623673475127848983984902647258841283551420334338884969 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=20114234580817738861253623673475127848983984902647258841283551420334338884969 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"2.gpio_random_long_reg_writes_reg_reads.78337809492172931659714600878536016257229632728883185141337061806540681877964","seed":78337809492172931659714600878536016257229632728883185141337061806540681877964,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=803707340 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_random_long_reg_writes_reg_reads.803707340' seed=78337809492172931659714600878536016257229632728883185141337061806540681877964 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=78337809492172931659714600878536016257229632728883185141337061806540681877964 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"2.gpio_full_random.345461665359244888407233503115287133389987580689573422163413805048202244219","seed":345461665359244888407233503115287133389987580689573422163413805048202244219,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=231190651 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_full_random.231190651' seed=345461665359244888407233503115287133389987580689573422163413805048202244219 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=345461665359244888407233503115287133389987580689573422163413805048202244219 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"2.gpio_stress_all_with_rand_reset.79167531824544060747828320963021874570541764106779304732207237782639857261566","seed":79167531824544060747828320963021874570541764106779304732207237782639857261566,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2848873470 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_stress_all_with_rand_reset.2848873470' seed=79167531824544060747828320963021874570541764106779304732207237782639857261566 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=79167531824544060747828320963021874570541764106779304732207237782639857261566 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_rw","qual_name":"2.gpio_csr_rw.17228590230782896810036701102923301750260871513501659691264640896182950218979","seed":17228590230782896810036701102923301750260871513501659691264640896182950218979,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_csr_rw/latest run_opts='+do_clear_all_interrupts=0 +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=245812451 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.gpio_csr_rw.245812451' seed=17228590230782896810036701102923301750260871513501659691264640896182950218979 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=17228590230782896810036701102923301750260871513501659691264640896182950218979 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_same_csr_outstanding","qual_name":"2.gpio_same_csr_outstanding.5139545143304549736780542912358051126919932526958252139545045214450956502091","seed":5139545143304549736780542912358051126919932526958252139545045214450956502091,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_same_csr_outstanding/latest run_opts='+do_clear_all_interrupts=0 +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=549323851 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.gpio_same_csr_outstanding.549323851' seed=5139545143304549736780542912358051126919932526958252139545045214450956502091 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=5139545143304549736780542912358051126919932526958252139545045214450956502091 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_mem_rw_with_rand_reset","qual_name":"2.gpio_csr_mem_rw_with_rand_reset.31264406260258891280709558826058792396610904202497237125440333687708292917698","seed":31264406260258891280709558826058792396610904202497237125440333687708292917698,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_csr_mem_rw_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1136044482 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.gpio_csr_mem_rw_with_rand_reset.1136044482' seed=31264406260258891280709558826058792396610904202497237125440333687708292917698 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=31264406260258891280709558826058792396610904202497237125440333687708292917698 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"2.gpio_tl_intg_err.95775439207256105632994125192450719877149199010952257105072195661309975419767","seed":95775439207256105632994125192450719877149199010952257105072195661309975419767,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=35609463 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.gpio_tl_intg_err.35609463' seed=95775439207256105632994125192450719877149199010952257105072195661309975419767 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=95775439207256105632994125192450719877149199010952257105072195661309975419767 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"2.gpio_smoke_en_cdc_prim.94228749803032981712036645704561400587358135365920454879613191502730526932450","seed":94228749803032981712036645704561400587358135365920454879613191502730526932450,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3261545954 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 2.gpio_smoke_en_cdc_prim.3261545954' seed=94228749803032981712036645704561400587358135365920454879613191502730526932450 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=94228749803032981712036645704561400587358135365920454879613191502730526932450 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"2.gpio_smoke_no_pullup_pulldown_en_cdc_prim.50041161598267175289924823991631410595922174367297953405354148255320538584768","seed":50041161598267175289924823991631410595922174367297953405354148255320538584768,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2703988416 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 2.gpio_smoke_no_pullup_pulldown_en_cdc_prim.2703988416' seed=50041161598267175289924823991631410595922174367297953405354148255320538584768 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=50041161598267175289924823991631410595922174367297953405354148255320538584768 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"2.gpio_rand_straps.6402602188010220952143487004023110316756729049995522060910051755416464921941","seed":6402602188010220952143487004023110316756729049995522060910051755416464921941,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1653609813 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_rand_straps.1653609813' seed=6402602188010220952143487004023110316756729049995522060910051755416464921941 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=6402602188010220952143487004023110316756729049995522060910051755416464921941 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_sec_cm","qual_name":"2.gpio_sec_cm.55844921976153551430750382879383753872820569883484222182957852881457675701929","seed":55844921976153551430750382879383753872820569883484222182957852881457675701929,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3302690473 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_sec_cm.3302690473' seed=55844921976153551430750382879383753872820569883484222182957852881457675701929 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=55844921976153551430750382879383753872820569883484222182957852881457675701929 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"2.gpio_tl_errors.20919573358755870694652459140783978387167570040079330312387997832955559574608","seed":20919573358755870694652459140783978387167570040079330312387997832955559574608,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3464133712 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.gpio_tl_errors.3464133712' seed=20919573358755870694652459140783978387167570040079330312387997832955559574608 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=20919573358755870694652459140783978387167570040079330312387997832955559574608 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"2.gpio_intr_test.99265997536837487830369476410463326433598485862854318075893685254283680545055","seed":99265997536837487830369476410463326433598485862854318075893685254283680545055,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2118908191 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.gpio_intr_test.2118908191' seed=99265997536837487830369476410463326433598485862854318075893685254283680545055 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=99265997536837487830369476410463326433598485862854318075893685254283680545055 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"2.gpio_alert_test.65505920792914047520796861827308306966265384530289738988645256269228514362369","seed":65505920792914047520796861827308306966265384530289738988645256269228514362369,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3874112513 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.gpio_alert_test.3874112513' seed=65505920792914047520796861827308306966265384530289738988645256269228514362369 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=65505920792914047520796861827308306966265384530289738988645256269228514362369 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/2.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke","qual_name":"3.gpio_smoke.19478561076462886219491787444550817183326301160988141600049648104446040231849","seed":19478561076462886219491787444550817183326301160988141600049648104446040231849,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=834162601 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_smoke.834162601' seed=19478561076462886219491787444550817183326301160988141600049648104446040231849 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=19478561076462886219491787444550817183326301160988141600049648104446040231849 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"3.gpio_smoke_no_pullup_pulldown.39062105917631700239264974017724428476996132191906688386607852807523572347550","seed":39062105917631700239264974017724428476996132191906688386607852807523572347550,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3014357662 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_smoke_no_pullup_pulldown.3014357662' seed=39062105917631700239264974017724428476996132191906688386607852807523572347550 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=39062105917631700239264974017724428476996132191906688386607852807523572347550 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"3.gpio_inp_prd_cnt.67920816717212709915403298232630117650714300505329013292487054715158113661789","seed":67920816717212709915403298232630117650714300505329013292487054715158113661789,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1844294493 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_inp_prd_cnt.1844294493' seed=67920816717212709915403298232630117650714300505329013292487054715158113661789 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=67920816717212709915403298232630117650714300505329013292487054715158113661789 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"3.gpio_random_dout_din.110993390592841944224215845952380432674992451340187300657005971726915540624088","seed":110993390592841944224215845952380432674992451340187300657005971726915540624088,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4111475416 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_random_dout_din.4111475416' seed=110993390592841944224215845952380432674992451340187300657005971726915540624088 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=110993390592841944224215845952380432674992451340187300657005971726915540624088 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"3.gpio_random_dout_din_no_pullup_pulldown.19148735932778743459537591303395015971605393682935539229483201920485982933004","seed":19148735932778743459537591303395015971605393682935539229483201920485982933004,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2175733772 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_random_dout_din_no_pullup_pulldown.2175733772' seed=19148735932778743459537591303395015971605393682935539229483201920485982933004 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=19148735932778743459537591303395015971605393682935539229483201920485982933004 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"3.gpio_dout_din_regs_random_rw.34327038452720530160752703105678240185131081616355802938180071225510403374688","seed":34327038452720530160752703105678240185131081616355802938180071225510403374688,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4045012576 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_dout_din_regs_random_rw.4045012576' seed=34327038452720530160752703105678240185131081616355802938180071225510403374688 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=34327038452720530160752703105678240185131081616355802938180071225510403374688 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"3.gpio_intr_rand_pgm.40777867554504627116323193783494072728380777277546318695858734846499423227212","seed":40777867554504627116323193783494072728380777277546318695858734846499423227212,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3927412044 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_intr_rand_pgm.3927412044' seed=40777867554504627116323193783494072728380777277546318695858734846499423227212 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=40777867554504627116323193783494072728380777277546318695858734846499423227212 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"3.gpio_rand_intr_trigger.84397701113979802331604531621634353408266640630358850090135471659071253093196","seed":84397701113979802331604531621634353408266640630358850090135471659071253093196,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=824023884 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_rand_intr_trigger.824023884' seed=84397701113979802331604531621634353408266640630358850090135471659071253093196 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=84397701113979802331604531621634353408266640630358850090135471659071253093196 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"3.gpio_intr_with_filter_rand_intr_event.85697978961188005213253711992457858647738488522594740675729792996863812174102","seed":85697978961188005213253711992457858647738488522594740675729792996863812174102,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=388628758 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_intr_with_filter_rand_intr_event.388628758' seed=85697978961188005213253711992457858647738488522594740675729792996863812174102 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=85697978961188005213253711992457858647738488522594740675729792996863812174102 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"3.gpio_filter_stress.38562926323555636747928156977744391750665212118358173437595551743084843152750","seed":38562926323555636747928156977744391750665212118358173437595551743084843152750,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1692841326 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_filter_stress.1692841326' seed=38562926323555636747928156977744391750665212118358173437595551743084843152750 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=38562926323555636747928156977744391750665212118358173437595551743084843152750 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"3.gpio_random_long_reg_writes_reg_reads.56755848418937380470858450960067264415371146827532177934661826090893451915049","seed":56755848418937380470858450960067264415371146827532177934661826090893451915049,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=307687209 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_random_long_reg_writes_reg_reads.307687209' seed=56755848418937380470858450960067264415371146827532177934661826090893451915049 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=56755848418937380470858450960067264415371146827532177934661826090893451915049 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"3.gpio_full_random.758848418971429550738420521803240482696799827800664427583654758633134993827","seed":758848418971429550738420521803240482696799827800664427583654758633134993827,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3745362339 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_full_random.3745362339' seed=758848418971429550738420521803240482696799827800664427583654758633134993827 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=758848418971429550738420521803240482696799827800664427583654758633134993827 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"3.gpio_stress_all_with_rand_reset.107677066579957098347677683510811312876893911112315985498316385463519055174467","seed":107677066579957098347677683510811312876893911112315985498316385463519055174467,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3805797187 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_stress_all_with_rand_reset.3805797187' seed=107677066579957098347677683510811312876893911112315985498316385463519055174467 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=107677066579957098347677683510811312876893911112315985498316385463519055174467 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_rw","qual_name":"3.gpio_csr_rw.72224950070037512723120593067587609433138784159541952924710432339482207706596","seed":72224950070037512723120593067587609433138784159541952924710432339482207706596,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_csr_rw/latest run_opts='+do_clear_all_interrupts=0 +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1949687268 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.gpio_csr_rw.1949687268' seed=72224950070037512723120593067587609433138784159541952924710432339482207706596 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=72224950070037512723120593067587609433138784159541952924710432339482207706596 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_same_csr_outstanding","qual_name":"3.gpio_same_csr_outstanding.63282817277625392838685281081815521191315143717078389084476477929695368972999","seed":63282817277625392838685281081815521191315143717078389084476477929695368972999,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_same_csr_outstanding/latest run_opts='+do_clear_all_interrupts=0 +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2005142215 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.gpio_same_csr_outstanding.2005142215' seed=63282817277625392838685281081815521191315143717078389084476477929695368972999 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=63282817277625392838685281081815521191315143717078389084476477929695368972999 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_mem_rw_with_rand_reset","qual_name":"3.gpio_csr_mem_rw_with_rand_reset.72183751328558315092336193020882136939781865336341644970937385210491512390419","seed":72183751328558315092336193020882136939781865336341644970937385210491512390419,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_csr_mem_rw_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4053631763 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.gpio_csr_mem_rw_with_rand_reset.4053631763' seed=72183751328558315092336193020882136939781865336341644970937385210491512390419 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=72183751328558315092336193020882136939781865336341644970937385210491512390419 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"3.gpio_tl_intg_err.108249366714351476022471589561163745631091088545170738874917381037613909068305","seed":108249366714351476022471589561163745631091088545170738874917381037613909068305,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=9488913 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.gpio_tl_intg_err.9488913' seed=108249366714351476022471589561163745631091088545170738874917381037613909068305 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=108249366714351476022471589561163745631091088545170738874917381037613909068305 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"3.gpio_smoke_en_cdc_prim.21147885109935654797768501136380669652303361795408227049813770773245437363492","seed":21147885109935654797768501136380669652303361795408227049813770773245437363492,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1356809508 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 3.gpio_smoke_en_cdc_prim.1356809508' seed=21147885109935654797768501136380669652303361795408227049813770773245437363492 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=21147885109935654797768501136380669652303361795408227049813770773245437363492 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"3.gpio_smoke_no_pullup_pulldown_en_cdc_prim.65101638309199076814229296850517978948327118513723116309671452414833849021206","seed":65101638309199076814229296850517978948327118513723116309671452414833849021206,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3639358230 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 3.gpio_smoke_no_pullup_pulldown_en_cdc_prim.3639358230' seed=65101638309199076814229296850517978948327118513723116309671452414833849021206 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=65101638309199076814229296850517978948327118513723116309671452414833849021206 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"3.gpio_rand_straps.85983238643049190353171217023393416285375895130035752372045046395686301880581","seed":85983238643049190353171217023393416285375895130035752372045046395686301880581,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2520142085 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_rand_straps.2520142085' seed=85983238643049190353171217023393416285375895130035752372045046395686301880581 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=85983238643049190353171217023393416285375895130035752372045046395686301880581 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_sec_cm","qual_name":"3.gpio_sec_cm.18555308938651799700506027351436351771752660162746387451977004674465330081373","seed":18555308938651799700506027351436351771752660162746387451977004674465330081373,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3238506077 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_sec_cm.3238506077' seed=18555308938651799700506027351436351771752660162746387451977004674465330081373 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=18555308938651799700506027351436351771752660162746387451977004674465330081373 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"3.gpio_tl_errors.29845333216267476544247930963677496980766082110896044109549178028809781113489","seed":29845333216267476544247930963677496980766082110896044109549178028809781113489,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1314779793 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.gpio_tl_errors.1314779793' seed=29845333216267476544247930963677496980766082110896044109549178028809781113489 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=29845333216267476544247930963677496980766082110896044109549178028809781113489 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"3.gpio_intr_test.46783592804696392406795503697072441638477973113589420181234874011305269403326","seed":46783592804696392406795503697072441638477973113589420181234874011305269403326,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1489641150 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.gpio_intr_test.1489641150' seed=46783592804696392406795503697072441638477973113589420181234874011305269403326 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=46783592804696392406795503697072441638477973113589420181234874011305269403326 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"3.gpio_alert_test.113862928161570376243091478075598915109819861064042347743314405139836164474929","seed":113862928161570376243091478075598915109819861064042347743314405139836164474929,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2432272433 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.gpio_alert_test.2432272433' seed=113862928161570376243091478075598915109819861064042347743314405139836164474929 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=113862928161570376243091478075598915109819861064042347743314405139836164474929 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke","qual_name":"4.gpio_smoke.21893524329724703881457765992348272594364604006644365888984011527378035600460","seed":21893524329724703881457765992348272594364604006644365888984011527378035600460,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=694217804 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_smoke.694217804' seed=21893524329724703881457765992348272594364604006644365888984011527378035600460 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=21893524329724703881457765992348272594364604006644365888984011527378035600460 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"4.gpio_smoke_no_pullup_pulldown.69887418535047815752797449149971095227135752115803634302382413601708428199119","seed":69887418535047815752797449149971095227135752115803634302382413601708428199119,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2538833103 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_smoke_no_pullup_pulldown.2538833103' seed=69887418535047815752797449149971095227135752115803634302382413601708428199119 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=69887418535047815752797449149971095227135752115803634302382413601708428199119 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"4.gpio_inp_prd_cnt.57504430700942957883669578031116826882252292107850607637213591625293456855007","seed":57504430700942957883669578031116826882252292107850607637213591625293456855007,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3925200863 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_inp_prd_cnt.3925200863' seed=57504430700942957883669578031116826882252292107850607637213591625293456855007 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=57504430700942957883669578031116826882252292107850607637213591625293456855007 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"4.gpio_random_dout_din.2517908694544101578982247382680858556317755946263851172705043361579393803441","seed":2517908694544101578982247382680858556317755946263851172705043361579393803441,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=160359601 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_random_dout_din.160359601' seed=2517908694544101578982247382680858556317755946263851172705043361579393803441 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=2517908694544101578982247382680858556317755946263851172705043361579393803441 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"4.gpio_random_dout_din_no_pullup_pulldown.868098006814253179216033056055456412887074953695261261874487496882382913451","seed":868098006814253179216033056055456412887074953695261261874487496882382913451,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2568175531 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_random_dout_din_no_pullup_pulldown.2568175531' seed=868098006814253179216033056055456412887074953695261261874487496882382913451 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=868098006814253179216033056055456412887074953695261261874487496882382913451 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"4.gpio_dout_din_regs_random_rw.39557273329309902780991041051029940644634825163478435129180867122495914632710","seed":39557273329309902780991041051029940644634825163478435129180867122495914632710,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1034806790 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_dout_din_regs_random_rw.1034806790' seed=39557273329309902780991041051029940644634825163478435129180867122495914632710 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=39557273329309902780991041051029940644634825163478435129180867122495914632710 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"4.gpio_intr_rand_pgm.28123400957545561342475054792370817429229420440517210018548805508246093441620","seed":28123400957545561342475054792370817429229420440517210018548805508246093441620,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4217121364 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_intr_rand_pgm.4217121364' seed=28123400957545561342475054792370817429229420440517210018548805508246093441620 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=28123400957545561342475054792370817429229420440517210018548805508246093441620 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"4.gpio_rand_intr_trigger.64974237594359017774878263259233027457576988583771214062805329912357582864909","seed":64974237594359017774878263259233027457576988583771214062805329912357582864909,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3874554381 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_rand_intr_trigger.3874554381' seed=64974237594359017774878263259233027457576988583771214062805329912357582864909 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=64974237594359017774878263259233027457576988583771214062805329912357582864909 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"4.gpio_intr_with_filter_rand_intr_event.31882247758111146097569239680958273114128014492680205136436220646587488399759","seed":31882247758111146097569239680958273114128014492680205136436220646587488399759,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2222322063 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_intr_with_filter_rand_intr_event.2222322063' seed=31882247758111146097569239680958273114128014492680205136436220646587488399759 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=31882247758111146097569239680958273114128014492680205136436220646587488399759 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"4.gpio_filter_stress.95230845042963236028246754868658072145593147815462476903488230164634120284970","seed":95230845042963236028246754868658072145593147815462476903488230164634120284970,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=295234346 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_filter_stress.295234346' seed=95230845042963236028246754868658072145593147815462476903488230164634120284970 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=95230845042963236028246754868658072145593147815462476903488230164634120284970 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"4.gpio_random_long_reg_writes_reg_reads.24359862771765659606504554277348370501071182354693406067463870392528043675029","seed":24359862771765659606504554277348370501071182354693406067463870392528043675029,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1760464277 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_random_long_reg_writes_reg_reads.1760464277' seed=24359862771765659606504554277348370501071182354693406067463870392528043675029 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=24359862771765659606504554277348370501071182354693406067463870392528043675029 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"4.gpio_full_random.41839326083912407571667261497180798020314662453297276921287256455070211888036","seed":41839326083912407571667261497180798020314662453297276921287256455070211888036,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2744112036 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_full_random.2744112036' seed=41839326083912407571667261497180798020314662453297276921287256455070211888036 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=41839326083912407571667261497180798020314662453297276921287256455070211888036 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"4.gpio_stress_all_with_rand_reset.56004616243483300278342806063173797627741731616138760079496831260778298731494","seed":56004616243483300278342806063173797627741731616138760079496831260778298731494,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=458615782 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_stress_all_with_rand_reset.458615782' seed=56004616243483300278342806063173797627741731616138760079496831260778298731494 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=56004616243483300278342806063173797627741731616138760079496831260778298731494 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_rw","qual_name":"4.gpio_csr_rw.91531389442998948389048231459151903451279568337998257383130180589605649496857","seed":91531389442998948389048231459151903451279568337998257383130180589605649496857,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_csr_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_csr_rw/latest run_opts='+do_clear_all_interrupts=0 +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2181413657 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.gpio_csr_rw.2181413657' seed=91531389442998948389048231459151903451279568337998257383130180589605649496857 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=91531389442998948389048231459151903451279568337998257383130180589605649496857 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_csr_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_same_csr_outstanding","qual_name":"4.gpio_same_csr_outstanding.101625999215752397022014089523729030052088896466358963672081436570943233562246","seed":101625999215752397022014089523729030052088896466358963672081436570943233562246,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_same_csr_outstanding/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_same_csr_outstanding/latest run_opts='+do_clear_all_interrupts=0 +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2757072518 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.gpio_same_csr_outstanding.2757072518' seed=101625999215752397022014089523729030052088896466358963672081436570943233562246 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=101625999215752397022014089523729030052088896466358963672081436570943233562246 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_same_csr_outstanding/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_csr_mem_rw_with_rand_reset","qual_name":"4.gpio_csr_mem_rw_with_rand_reset.68412051528882920095210077231816049322245931954480211473157691302203795052574","seed":68412051528882920095210077231816049322245931954480211473157691302203795052574,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_csr_mem_rw_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1117394974 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.gpio_csr_mem_rw_with_rand_reset.1117394974' seed=68412051528882920095210077231816049322245931954480211473157691302203795052574 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=68412051528882920095210077231816049322245931954480211473157691302203795052574 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_csr_mem_rw_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"4.gpio_tl_intg_err.7665557505923152502851476188140743696110423381072901270919239951929311622710","seed":7665557505923152502851476188140743696110423381072901270919239951929311622710,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4286969398 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.gpio_tl_intg_err.4286969398' seed=7665557505923152502851476188140743696110423381072901270919239951929311622710 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=7665557505923152502851476188140743696110423381072901270919239951929311622710 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"4.gpio_smoke_en_cdc_prim.35998151458005955958388209833931930398468079479722910716641451863218412079773","seed":35998151458005955958388209833931930398468079479722910716641451863218412079773,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=594037405 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 4.gpio_smoke_en_cdc_prim.594037405' seed=35998151458005955958388209833931930398468079479722910716641451863218412079773 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=35998151458005955958388209833931930398468079479722910716641451863218412079773 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"4.gpio_smoke_no_pullup_pulldown_en_cdc_prim.1568059261325409320152308003569002326765852650170786609605805789091337334781","seed":1568059261325409320152308003569002326765852650170786609605805789091337334781,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3707760637 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 4.gpio_smoke_no_pullup_pulldown_en_cdc_prim.3707760637' seed=1568059261325409320152308003569002326765852650170786609605805789091337334781 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=1568059261325409320152308003569002326765852650170786609605805789091337334781 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"4.gpio_rand_straps.41161784633045126875797868972714241941160635232292014358851461025182581482584","seed":41161784633045126875797868972714241941160635232292014358851461025182581482584,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=863200344 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_rand_straps.863200344' seed=41161784633045126875797868972714241941160635232292014358851461025182581482584 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=41161784633045126875797868972714241941160635232292014358851461025182581482584 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_sec_cm","qual_name":"4.gpio_sec_cm.108496215647856491760428977483542625290324901424290184495012646874962144450414","seed":108496215647856491760428977483542625290324901424290184495012646874962144450414,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_sec_cm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_sec_cm/latest run_opts='+run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2764494702 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_sec_cm.2764494702' seed=108496215647856491760428977483542625290324901424290184495012646874962144450414 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=108496215647856491760428977483542625290324901424290184495012646874962144450414 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_sec_cm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"4.gpio_tl_errors.32904531933292438260387932033453631272572320423140182972296560816750485779461","seed":32904531933292438260387932033453631272572320423140182972296560816750485779461,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3857396741 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.gpio_tl_errors.3857396741' seed=32904531933292438260387932033453631272572320423140182972296560816750485779461 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=32904531933292438260387932033453631272572320423140182972296560816750485779461 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"4.gpio_intr_test.4675713167992434248742046119390902876304371521007846620465791615080753408998","seed":4675713167992434248742046119390902876304371521007846620465791615080753408998,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2773101542 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.gpio_intr_test.2773101542' seed=4675713167992434248742046119390902876304371521007846620465791615080753408998 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=4675713167992434248742046119390902876304371521007846620465791615080753408998 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"4.gpio_alert_test.60386210198292817863044915721811088291164409760696982928118122961187814397715","seed":60386210198292817863044915721811088291164409760696982928118122961187814397715,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=49174291 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.gpio_alert_test.49174291' seed=60386210198292817863044915721811088291164409760696982928118122961187814397715 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=60386210198292817863044915721811088291164409760696982928118122961187814397715 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/4.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke","qual_name":"5.gpio_smoke.62929470874149129587450203208061176078511301000651532422625438002200526144771","seed":62929470874149129587450203208061176078511301000651532422625438002200526144771,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2014790915 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_smoke.2014790915' seed=62929470874149129587450203208061176078511301000651532422625438002200526144771 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=62929470874149129587450203208061176078511301000651532422625438002200526144771 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"5.gpio_smoke_no_pullup_pulldown.41261463615509849022009275507256908249747540489292842372501915786966856742478","seed":41261463615509849022009275507256908249747540489292842372501915786966856742478,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1923200590 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_smoke_no_pullup_pulldown.1923200590' seed=41261463615509849022009275507256908249747540489292842372501915786966856742478 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=41261463615509849022009275507256908249747540489292842372501915786966856742478 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"5.gpio_inp_prd_cnt.34638170031436438207623195401634842619510133633744781807577132482796644741852","seed":34638170031436438207623195401634842619510133633744781807577132482796644741852,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2426417884 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_inp_prd_cnt.2426417884' seed=34638170031436438207623195401634842619510133633744781807577132482796644741852 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=34638170031436438207623195401634842619510133633744781807577132482796644741852 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"5.gpio_random_dout_din.100534025432772394892142927653789490421982746135294880006738864677491256039348","seed":100534025432772394892142927653789490421982746135294880006738864677491256039348,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1033869236 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_random_dout_din.1033869236' seed=100534025432772394892142927653789490421982746135294880006738864677491256039348 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=100534025432772394892142927653789490421982746135294880006738864677491256039348 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"5.gpio_random_dout_din_no_pullup_pulldown.81274471819849487790278214177351263265088030918415925550384031548250017168439","seed":81274471819849487790278214177351263265088030918415925550384031548250017168439,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=307166263 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_random_dout_din_no_pullup_pulldown.307166263' seed=81274471819849487790278214177351263265088030918415925550384031548250017168439 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=81274471819849487790278214177351263265088030918415925550384031548250017168439 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"5.gpio_dout_din_regs_random_rw.2059369773803258027407900964917746003638738334528540892517164345642039652497","seed":2059369773803258027407900964917746003638738334528540892517164345642039652497,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4238094481 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_dout_din_regs_random_rw.4238094481' seed=2059369773803258027407900964917746003638738334528540892517164345642039652497 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=2059369773803258027407900964917746003638738334528540892517164345642039652497 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"5.gpio_intr_rand_pgm.107276448277704214978778346656216763719407098872119566243967331527666497654205","seed":107276448277704214978778346656216763719407098872119566243967331527666497654205,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1701481917 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_intr_rand_pgm.1701481917' seed=107276448277704214978778346656216763719407098872119566243967331527666497654205 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=107276448277704214978778346656216763719407098872119566243967331527666497654205 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"5.gpio_rand_intr_trigger.44799275040343346871220754777704968077161325100098200262657909453850522349532","seed":44799275040343346871220754777704968077161325100098200262657909453850522349532,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1801646044 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_rand_intr_trigger.1801646044' seed=44799275040343346871220754777704968077161325100098200262657909453850522349532 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=44799275040343346871220754777704968077161325100098200262657909453850522349532 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"5.gpio_intr_with_filter_rand_intr_event.19707629478988832562060487757082801849115839674331135805434624240084973674226","seed":19707629478988832562060487757082801849115839674331135805434624240084973674226,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4212285170 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_intr_with_filter_rand_intr_event.4212285170' seed=19707629478988832562060487757082801849115839674331135805434624240084973674226 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=19707629478988832562060487757082801849115839674331135805434624240084973674226 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"5.gpio_filter_stress.35529047706670705209291319066412756596361484404771085776214430285591764773492","seed":35529047706670705209291319066412756596361484404771085776214430285591764773492,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=951298676 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_filter_stress.951298676' seed=35529047706670705209291319066412756596361484404771085776214430285591764773492 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=35529047706670705209291319066412756596361484404771085776214430285591764773492 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"5.gpio_random_long_reg_writes_reg_reads.35169933158657393843145558782019083835586473660450957874357549121917410473812","seed":35169933158657393843145558782019083835586473660450957874357549121917410473812,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2740320084 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_random_long_reg_writes_reg_reads.2740320084' seed=35169933158657393843145558782019083835586473660450957874357549121917410473812 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=35169933158657393843145558782019083835586473660450957874357549121917410473812 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"5.gpio_full_random.28622305998024842878933262470769017698863614469887971723084050326263166924881","seed":28622305998024842878933262470769017698863614469887971723084050326263166924881,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2896164945 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_full_random.2896164945' seed=28622305998024842878933262470769017698863614469887971723084050326263166924881 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=28622305998024842878933262470769017698863614469887971723084050326263166924881 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"5.gpio_stress_all_with_rand_reset.41875315283098400444749116371331177543502991999538591320753803147654834028180","seed":41875315283098400444749116371331177543502991999538591320753803147654834028180,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=280362644 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_stress_all_with_rand_reset.280362644' seed=41875315283098400444749116371331177543502991999538591320753803147654834028180 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=41875315283098400444749116371331177543502991999538591320753803147654834028180 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"5.gpio_tl_intg_err.63291171933800584931334777217684711945820675854455128198557050688493291806751","seed":63291171933800584931334777217684711945820675854455128198557050688493291806751,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1093640223 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.gpio_tl_intg_err.1093640223' seed=63291171933800584931334777217684711945820675854455128198557050688493291806751 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=63291171933800584931334777217684711945820675854455128198557050688493291806751 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"5.gpio_smoke_en_cdc_prim.88683633323986442806295976773549552351148256343811376806841078541046925130420","seed":88683633323986442806295976773549552351148256343811376806841078541046925130420,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2240182964 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 5.gpio_smoke_en_cdc_prim.2240182964' seed=88683633323986442806295976773549552351148256343811376806841078541046925130420 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=88683633323986442806295976773549552351148256343811376806841078541046925130420 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"5.gpio_smoke_no_pullup_pulldown_en_cdc_prim.39372198346811440020229519763905174633992162335973959519642672939562151726139","seed":39372198346811440020229519763905174633992162335973959519642672939562151726139,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=730090555 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 5.gpio_smoke_no_pullup_pulldown_en_cdc_prim.730090555' seed=39372198346811440020229519763905174633992162335973959519642672939562151726139 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=39372198346811440020229519763905174633992162335973959519642672939562151726139 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"5.gpio_rand_straps.62678861993571833150701477623922396561760775685921630728421958994901983624072","seed":62678861993571833150701477623922396561760775685921630728421958994901983624072,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3331914632 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_rand_straps.3331914632' seed=62678861993571833150701477623922396561760775685921630728421958994901983624072 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=62678861993571833150701477623922396561760775685921630728421958994901983624072 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"5.gpio_tl_errors.71426283522213624263165637786811512936075630298716263010787047884445362243342","seed":71426283522213624263165637786811512936075630298716263010787047884445362243342,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1304512270 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.gpio_tl_errors.1304512270' seed=71426283522213624263165637786811512936075630298716263010787047884445362243342 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=71426283522213624263165637786811512936075630298716263010787047884445362243342 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"5.gpio_intr_test.110377607890986878821830912807145041802757627472875446882120660741453722787075","seed":110377607890986878821830912807145041802757627472875446882120660741453722787075,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3852836099 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.gpio_intr_test.3852836099' seed=110377607890986878821830912807145041802757627472875446882120660741453722787075 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=110377607890986878821830912807145041802757627472875446882120660741453722787075 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"5.gpio_alert_test.96753430999894637135987875460378847808314489474768094193302226806532613431759","seed":96753430999894637135987875460378847808314489474768094193302226806532613431759,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3854655951 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.gpio_alert_test.3854655951' seed=96753430999894637135987875460378847808314489474768094193302226806532613431759 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=96753430999894637135987875460378847808314489474768094193302226806532613431759 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke","qual_name":"6.gpio_smoke.32187308520071165940593705019199853016502360882525577491992629586446043300441","seed":32187308520071165940593705019199853016502360882525577491992629586446043300441,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1093648985 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_smoke.1093648985' seed=32187308520071165940593705019199853016502360882525577491992629586446043300441 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=32187308520071165940593705019199853016502360882525577491992629586446043300441 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"6.gpio_smoke_no_pullup_pulldown.110396823728617775070362678336475502291506756570109253573644853877300068181013","seed":110396823728617775070362678336475502291506756570109253573644853877300068181013,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=688219157 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_smoke_no_pullup_pulldown.688219157' seed=110396823728617775070362678336475502291506756570109253573644853877300068181013 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=110396823728617775070362678336475502291506756570109253573644853877300068181013 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"6.gpio_inp_prd_cnt.54561338098188212628600069403885630276219812821230391864418083972219660736580","seed":54561338098188212628600069403885630276219812821230391864418083972219660736580,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=942217284 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_inp_prd_cnt.942217284' seed=54561338098188212628600069403885630276219812821230391864418083972219660736580 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=54561338098188212628600069403885630276219812821230391864418083972219660736580 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"6.gpio_random_dout_din.33208000170832236951020492747989559131955910887053427135673488677896545727039","seed":33208000170832236951020492747989559131955910887053427135673488677896545727039,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4168446527 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_random_dout_din.4168446527' seed=33208000170832236951020492747989559131955910887053427135673488677896545727039 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=33208000170832236951020492747989559131955910887053427135673488677896545727039 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"6.gpio_random_dout_din_no_pullup_pulldown.5450694070674745217182175587857713007478907465079491741361527857884979372220","seed":5450694070674745217182175587857713007478907465079491741361527857884979372220,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=842637500 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_random_dout_din_no_pullup_pulldown.842637500' seed=5450694070674745217182175587857713007478907465079491741361527857884979372220 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=5450694070674745217182175587857713007478907465079491741361527857884979372220 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"6.gpio_dout_din_regs_random_rw.111605559444454992116345612581523109689739078754373684952671153065515324599748","seed":111605559444454992116345612581523109689739078754373684952671153065515324599748,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3395612100 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_dout_din_regs_random_rw.3395612100' seed=111605559444454992116345612581523109689739078754373684952671153065515324599748 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=111605559444454992116345612581523109689739078754373684952671153065515324599748 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"6.gpio_intr_rand_pgm.34174221746756679036893402898596991317543231868908981244204228582659658789180","seed":34174221746756679036893402898596991317543231868908981244204228582659658789180,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=804696380 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_intr_rand_pgm.804696380' seed=34174221746756679036893402898596991317543231868908981244204228582659658789180 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=34174221746756679036893402898596991317543231868908981244204228582659658789180 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"6.gpio_rand_intr_trigger.38883322639089949596300961709838351631800728849526362779976224092985933036594","seed":38883322639089949596300961709838351631800728849526362779976224092985933036594,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1599208498 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_rand_intr_trigger.1599208498' seed=38883322639089949596300961709838351631800728849526362779976224092985933036594 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=38883322639089949596300961709838351631800728849526362779976224092985933036594 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"6.gpio_intr_with_filter_rand_intr_event.55560993667858146560221475989988013391087490451281619114986362591718276898771","seed":55560993667858146560221475989988013391087490451281619114986362591718276898771,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3016531923 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_intr_with_filter_rand_intr_event.3016531923' seed=55560993667858146560221475989988013391087490451281619114986362591718276898771 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=55560993667858146560221475989988013391087490451281619114986362591718276898771 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"6.gpio_filter_stress.71616591969119635616583597319230486523356159658820782013449329559346184604169","seed":71616591969119635616583597319230486523356159658820782013449329559346184604169,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=71453193 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_filter_stress.71453193' seed=71616591969119635616583597319230486523356159658820782013449329559346184604169 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=71616591969119635616583597319230486523356159658820782013449329559346184604169 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"6.gpio_random_long_reg_writes_reg_reads.66527483380532810770389504657295831460582733039659147507748985203728986516227","seed":66527483380532810770389504657295831460582733039659147507748985203728986516227,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3283200771 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_random_long_reg_writes_reg_reads.3283200771' seed=66527483380532810770389504657295831460582733039659147507748985203728986516227 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=66527483380532810770389504657295831460582733039659147507748985203728986516227 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"6.gpio_full_random.49643861263530300451369089986126012763948218693262447615825150557751410608869","seed":49643861263530300451369089986126012763948218693262447615825150557751410608869,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1034341093 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_full_random.1034341093' seed=49643861263530300451369089986126012763948218693262447615825150557751410608869 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=49643861263530300451369089986126012763948218693262447615825150557751410608869 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"6.gpio_stress_all_with_rand_reset.59573737339720457374158309438660825807410561995770706508371320874603494227800","seed":59573737339720457374158309438660825807410561995770706508371320874603494227800,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1680064344 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_stress_all_with_rand_reset.1680064344' seed=59573737339720457374158309438660825807410561995770706508371320874603494227800 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=59573737339720457374158309438660825807410561995770706508371320874603494227800 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"6.gpio_tl_intg_err.12195304328374978297730631450525303105095782270679599918799723119429043083249","seed":12195304328374978297730631450525303105095782270679599918799723119429043083249,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1814550513 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.gpio_tl_intg_err.1814550513' seed=12195304328374978297730631450525303105095782270679599918799723119429043083249 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=12195304328374978297730631450525303105095782270679599918799723119429043083249 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"6.gpio_smoke_en_cdc_prim.105330289524816188215559882641744318705810178324254267852936378790857531888549","seed":105330289524816188215559882641744318705810178324254267852936378790857531888549,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=947557285 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 6.gpio_smoke_en_cdc_prim.947557285' seed=105330289524816188215559882641744318705810178324254267852936378790857531888549 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=105330289524816188215559882641744318705810178324254267852936378790857531888549 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"6.gpio_smoke_no_pullup_pulldown_en_cdc_prim.71460294648395575471092578744100747351780055600644962963100939058739197216058","seed":71460294648395575471092578744100747351780055600644962963100939058739197216058,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=637764922 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 6.gpio_smoke_no_pullup_pulldown_en_cdc_prim.637764922' seed=71460294648395575471092578744100747351780055600644962963100939058739197216058 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=71460294648395575471092578744100747351780055600644962963100939058739197216058 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"6.gpio_rand_straps.74374796907583176035874004309121596136262959775455271444741999848769733483729","seed":74374796907583176035874004309121596136262959775455271444741999848769733483729,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3322371281 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_rand_straps.3322371281' seed=74374796907583176035874004309121596136262959775455271444741999848769733483729 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=74374796907583176035874004309121596136262959775455271444741999848769733483729 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"6.gpio_tl_errors.107326020311889415112628904217099587908591474214659788187635034069328489877540","seed":107326020311889415112628904217099587908591474214659788187635034069328489877540,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3461091364 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.gpio_tl_errors.3461091364' seed=107326020311889415112628904217099587908591474214659788187635034069328489877540 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=107326020311889415112628904217099587908591474214659788187635034069328489877540 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"6.gpio_intr_test.5654061191041734268428398450252872687222651227147385142523565731794744991387","seed":5654061191041734268428398450252872687222651227147385142523565731794744991387,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1995923099 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.gpio_intr_test.1995923099' seed=5654061191041734268428398450252872687222651227147385142523565731794744991387 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=5654061191041734268428398450252872687222651227147385142523565731794744991387 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"6.gpio_alert_test.10272747386246179094920051713002370518444483310178065502899341536633066413836","seed":10272747386246179094920051713002370518444483310178065502899341536633066413836,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=782294796 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.gpio_alert_test.782294796' seed=10272747386246179094920051713002370518444483310178065502899341536633066413836 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=10272747386246179094920051713002370518444483310178065502899341536633066413836 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke","qual_name":"7.gpio_smoke.53383690358357786032942904036444315323192615841025051485727704287204758820896","seed":53383690358357786032942904036444315323192615841025051485727704287204758820896,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1352439840 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_smoke.1352439840' seed=53383690358357786032942904036444315323192615841025051485727704287204758820896 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=53383690358357786032942904036444315323192615841025051485727704287204758820896 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"7.gpio_smoke_no_pullup_pulldown.81383994354711605506877774815328906150106844971687785466028814636625256584527","seed":81383994354711605506877774815328906150106844971687785466028814636625256584527,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1688278351 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_smoke_no_pullup_pulldown.1688278351' seed=81383994354711605506877774815328906150106844971687785466028814636625256584527 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=81383994354711605506877774815328906150106844971687785466028814636625256584527 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"7.gpio_inp_prd_cnt.39165929171449979915932698160636474947042021277379063320093726496268034703909","seed":39165929171449979915932698160636474947042021277379063320093726496268034703909,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=556728869 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_inp_prd_cnt.556728869' seed=39165929171449979915932698160636474947042021277379063320093726496268034703909 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=39165929171449979915932698160636474947042021277379063320093726496268034703909 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"7.gpio_random_dout_din.49364302644102776603993487486864113393886066331732437322350113091653691074238","seed":49364302644102776603993487486864113393886066331732437322350113091653691074238,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1514759870 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_random_dout_din.1514759870' seed=49364302644102776603993487486864113393886066331732437322350113091653691074238 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=49364302644102776603993487486864113393886066331732437322350113091653691074238 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"7.gpio_random_dout_din_no_pullup_pulldown.35618120861104775766737939962472725284760605348008027257942546756919586897023","seed":35618120861104775766737939962472725284760605348008027257942546756919586897023,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=772717695 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_random_dout_din_no_pullup_pulldown.772717695' seed=35618120861104775766737939962472725284760605348008027257942546756919586897023 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=35618120861104775766737939962472725284760605348008027257942546756919586897023 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"7.gpio_dout_din_regs_random_rw.53540035306090410674813939301250017518644569344843285393196810861942193695299","seed":53540035306090410674813939301250017518644569344843285393196810861942193695299,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=193374787 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_dout_din_regs_random_rw.193374787' seed=53540035306090410674813939301250017518644569344843285393196810861942193695299 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=53540035306090410674813939301250017518644569344843285393196810861942193695299 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"7.gpio_intr_rand_pgm.48053687309237168392533025255490229610708421408138485448498932985502434232885","seed":48053687309237168392533025255490229610708421408138485448498932985502434232885,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1521912373 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_intr_rand_pgm.1521912373' seed=48053687309237168392533025255490229610708421408138485448498932985502434232885 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=48053687309237168392533025255490229610708421408138485448498932985502434232885 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"7.gpio_rand_intr_trigger.48367867081043610917967396173294252005275111775549111997165457365037428517683","seed":48367867081043610917967396173294252005275111775549111997165457365037428517683,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=204483379 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_rand_intr_trigger.204483379' seed=48367867081043610917967396173294252005275111775549111997165457365037428517683 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=48367867081043610917967396173294252005275111775549111997165457365037428517683 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"7.gpio_intr_with_filter_rand_intr_event.14478668428708864921795261839502560283998563778472435570576365150023367846562","seed":14478668428708864921795261839502560283998563778472435570576365150023367846562,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=483453602 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_intr_with_filter_rand_intr_event.483453602' seed=14478668428708864921795261839502560283998563778472435570576365150023367846562 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=14478668428708864921795261839502560283998563778472435570576365150023367846562 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"7.gpio_filter_stress.17151401400369751318327951768652390146378627658051540913172311111073312457766","seed":17151401400369751318327951768652390146378627658051540913172311111073312457766,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=910869542 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_filter_stress.910869542' seed=17151401400369751318327951768652390146378627658051540913172311111073312457766 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=17151401400369751318327951768652390146378627658051540913172311111073312457766 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"7.gpio_random_long_reg_writes_reg_reads.20763623730107773052617621697070987683698364709570434127294781653785821321461","seed":20763623730107773052617621697070987683698364709570434127294781653785821321461,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2171607285 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_random_long_reg_writes_reg_reads.2171607285' seed=20763623730107773052617621697070987683698364709570434127294781653785821321461 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=20763623730107773052617621697070987683698364709570434127294781653785821321461 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"7.gpio_full_random.52353983658031298306357332618170086904567745704654409146537834961081170979357","seed":52353983658031298306357332618170086904567745704654409146537834961081170979357,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4118604317 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_full_random.4118604317' seed=52353983658031298306357332618170086904567745704654409146537834961081170979357 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=52353983658031298306357332618170086904567745704654409146537834961081170979357 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"7.gpio_stress_all_with_rand_reset.104203798241232867346339242011965613303431641470451173215571512783984062158339","seed":104203798241232867346339242011965613303431641470451173215571512783984062158339,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1777653251 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_stress_all_with_rand_reset.1777653251' seed=104203798241232867346339242011965613303431641470451173215571512783984062158339 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=104203798241232867346339242011965613303431641470451173215571512783984062158339 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"7.gpio_tl_intg_err.100334562805184034829352110901725595200275390467777988963983670197036490335491","seed":100334562805184034829352110901725595200275390467777988963983670197036490335491,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3663897859 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.gpio_tl_intg_err.3663897859' seed=100334562805184034829352110901725595200275390467777988963983670197036490335491 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=100334562805184034829352110901725595200275390467777988963983670197036490335491 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"7.gpio_smoke_en_cdc_prim.67320054507423295915073253601490685450030885221772689202985469925655039177096","seed":67320054507423295915073253601490685450030885221772689202985469925655039177096,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2792878472 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 7.gpio_smoke_en_cdc_prim.2792878472' seed=67320054507423295915073253601490685450030885221772689202985469925655039177096 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=67320054507423295915073253601490685450030885221772689202985469925655039177096 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"7.gpio_smoke_no_pullup_pulldown_en_cdc_prim.36508158895540578793923100509194942066146512903219079251004947317206841598828","seed":36508158895540578793923100509194942066146512903219079251004947317206841598828,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3470304108 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 7.gpio_smoke_no_pullup_pulldown_en_cdc_prim.3470304108' seed=36508158895540578793923100509194942066146512903219079251004947317206841598828 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=36508158895540578793923100509194942066146512903219079251004947317206841598828 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"7.gpio_rand_straps.91656068891674970646493662419349080483754688798807192165644755773440226207254","seed":91656068891674970646493662419349080483754688798807192165644755773440226207254,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3087771158 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_rand_straps.3087771158' seed=91656068891674970646493662419349080483754688798807192165644755773440226207254 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=91656068891674970646493662419349080483754688798807192165644755773440226207254 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"7.gpio_tl_errors.104424802103773626752665351083141934091070511180326419735809128254300041442134","seed":104424802103773626752665351083141934091070511180326419735809128254300041442134,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1447490390 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.gpio_tl_errors.1447490390' seed=104424802103773626752665351083141934091070511180326419735809128254300041442134 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=104424802103773626752665351083141934091070511180326419735809128254300041442134 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"7.gpio_intr_test.23419923215021196842191304972877357976613063330469480021311897937530221910180","seed":23419923215021196842191304972877357976613063330469480021311897937530221910180,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=620386468 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.gpio_intr_test.620386468' seed=23419923215021196842191304972877357976613063330469480021311897937530221910180 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=23419923215021196842191304972877357976613063330469480021311897937530221910180 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"7.gpio_alert_test.88436439609047288508553982065690734512376291906974370177723736410005548324020","seed":88436439609047288508553982065690734512376291906974370177723736410005548324020,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=600593588 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.gpio_alert_test.600593588' seed=88436439609047288508553982065690734512376291906974370177723736410005548324020 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=88436439609047288508553982065690734512376291906974370177723736410005548324020 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke","qual_name":"8.gpio_smoke.23389194031790004545362294491305165632170875339624752251367701007214957996241","seed":23389194031790004545362294491305165632170875339624752251367701007214957996241,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2143987921 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_smoke.2143987921' seed=23389194031790004545362294491305165632170875339624752251367701007214957996241 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=23389194031790004545362294491305165632170875339624752251367701007214957996241 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"8.gpio_smoke_no_pullup_pulldown.77181162009640844273538762492199235572001314321486196508780483436467432177507","seed":77181162009640844273538762492199235572001314321486196508780483436467432177507,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2666774371 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_smoke_no_pullup_pulldown.2666774371' seed=77181162009640844273538762492199235572001314321486196508780483436467432177507 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=77181162009640844273538762492199235572001314321486196508780483436467432177507 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"8.gpio_inp_prd_cnt.71376883280316449351124954467424022373169809046097270755473228918872758315909","seed":71376883280316449351124954467424022373169809046097270755473228918872758315909,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2361944965 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_inp_prd_cnt.2361944965' seed=71376883280316449351124954467424022373169809046097270755473228918872758315909 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=71376883280316449351124954467424022373169809046097270755473228918872758315909 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"8.gpio_random_dout_din.41697642565904055798516004070465984305337597575098812771899646715956169470832","seed":41697642565904055798516004070465984305337597575098812771899646715956169470832,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3793417072 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_random_dout_din.3793417072' seed=41697642565904055798516004070465984305337597575098812771899646715956169470832 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=41697642565904055798516004070465984305337597575098812771899646715956169470832 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"8.gpio_random_dout_din_no_pullup_pulldown.74145894322250914744940951441779163177625709344912161938891944087815338318318","seed":74145894322250914744940951441779163177625709344912161938891944087815338318318,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3327121902 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_random_dout_din_no_pullup_pulldown.3327121902' seed=74145894322250914744940951441779163177625709344912161938891944087815338318318 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=74145894322250914744940951441779163177625709344912161938891944087815338318318 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"8.gpio_dout_din_regs_random_rw.27466658853481859705867182831204374240854254877313610924305343892419517431731","seed":27466658853481859705867182831204374240854254877313610924305343892419517431731,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3823976371 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_dout_din_regs_random_rw.3823976371' seed=27466658853481859705867182831204374240854254877313610924305343892419517431731 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=27466658853481859705867182831204374240854254877313610924305343892419517431731 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"8.gpio_intr_rand_pgm.105140555668488256105928259536955061726111501681499762131199308773890922034117","seed":105140555668488256105928259536955061726111501681499762131199308773890922034117,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2163127237 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_intr_rand_pgm.2163127237' seed=105140555668488256105928259536955061726111501681499762131199308773890922034117 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=105140555668488256105928259536955061726111501681499762131199308773890922034117 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"8.gpio_rand_intr_trigger.112962560300706948675671984152411186337686854313612415630611037559288395144297","seed":112962560300706948675671984152411186337686854313612415630611037559288395144297,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2335906921 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_rand_intr_trigger.2335906921' seed=112962560300706948675671984152411186337686854313612415630611037559288395144297 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=112962560300706948675671984152411186337686854313612415630611037559288395144297 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"8.gpio_intr_with_filter_rand_intr_event.114268981726960011080385447367011689411621842201692135963529961179734396562199","seed":114268981726960011080385447367011689411621842201692135963529961179734396562199,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3666275095 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_intr_with_filter_rand_intr_event.3666275095' seed=114268981726960011080385447367011689411621842201692135963529961179734396562199 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=114268981726960011080385447367011689411621842201692135963529961179734396562199 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"8.gpio_filter_stress.94857289956798263651286577382108887947928512383381947440376552192086956154978","seed":94857289956798263651286577382108887947928512383381947440376552192086956154978,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=531472482 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_filter_stress.531472482' seed=94857289956798263651286577382108887947928512383381947440376552192086956154978 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=94857289956798263651286577382108887947928512383381947440376552192086956154978 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"8.gpio_random_long_reg_writes_reg_reads.32426937050044789212766358236424667123509791457372552495578805724935739639787","seed":32426937050044789212766358236424667123509791457372552495578805724935739639787,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1419216875 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_random_long_reg_writes_reg_reads.1419216875' seed=32426937050044789212766358236424667123509791457372552495578805724935739639787 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=32426937050044789212766358236424667123509791457372552495578805724935739639787 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"8.gpio_full_random.103178533277618622752915798581987843265794423872895707951941758742115502434090","seed":103178533277618622752915798581987843265794423872895707951941758742115502434090,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=681223978 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_full_random.681223978' seed=103178533277618622752915798581987843265794423872895707951941758742115502434090 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=103178533277618622752915798581987843265794423872895707951941758742115502434090 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"8.gpio_stress_all_with_rand_reset.27445375750388906883014304763951088473504896480190360362654635208462000774056","seed":27445375750388906883014304763951088473504896480190360362654635208462000774056,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=395893672 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_stress_all_with_rand_reset.395893672' seed=27445375750388906883014304763951088473504896480190360362654635208462000774056 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=27445375750388906883014304763951088473504896480190360362654635208462000774056 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"8.gpio_tl_intg_err.99764402849966582300228953236889863938558566771941039865130440636369132950683","seed":99764402849966582300228953236889863938558566771941039865130440636369132950683,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3148977307 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.gpio_tl_intg_err.3148977307' seed=99764402849966582300228953236889863938558566771941039865130440636369132950683 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=99764402849966582300228953236889863938558566771941039865130440636369132950683 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"8.gpio_smoke_en_cdc_prim.91736061581316931777615353343359591910115045217093301740938500089282381944352","seed":91736061581316931777615353343359591910115045217093301740938500089282381944352,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=809702944 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 8.gpio_smoke_en_cdc_prim.809702944' seed=91736061581316931777615353343359591910115045217093301740938500089282381944352 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=91736061581316931777615353343359591910115045217093301740938500089282381944352 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"8.gpio_smoke_no_pullup_pulldown_en_cdc_prim.40734686981122582569594295270974688455498518041408782543998409032870775391760","seed":40734686981122582569594295270974688455498518041408782543998409032870775391760,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=658408976 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 8.gpio_smoke_no_pullup_pulldown_en_cdc_prim.658408976' seed=40734686981122582569594295270974688455498518041408782543998409032870775391760 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=40734686981122582569594295270974688455498518041408782543998409032870775391760 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"8.gpio_rand_straps.96409024838700424924465290243255426173562660852581253677158487751301411249213","seed":96409024838700424924465290243255426173562660852581253677158487751301411249213,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=624041021 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_rand_straps.624041021' seed=96409024838700424924465290243255426173562660852581253677158487751301411249213 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=96409024838700424924465290243255426173562660852581253677158487751301411249213 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"8.gpio_tl_errors.18299394220255863693653617357443163760919814152695120541337521752766066267756","seed":18299394220255863693653617357443163760919814152695120541337521752766066267756,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2092504684 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.gpio_tl_errors.2092504684' seed=18299394220255863693653617357443163760919814152695120541337521752766066267756 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=18299394220255863693653617357443163760919814152695120541337521752766066267756 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"8.gpio_intr_test.26129805416177369333102768734881781131622036014067837364896078080563405554441","seed":26129805416177369333102768734881781131622036014067837364896078080563405554441,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3693511433 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.gpio_intr_test.3693511433' seed=26129805416177369333102768734881781131622036014067837364896078080563405554441 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=26129805416177369333102768734881781131622036014067837364896078080563405554441 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"8.gpio_alert_test.108558568235465938516454478638414174882771976215277010667982134710362028798336","seed":108558568235465938516454478638414174882771976215277010667982134710362028798336,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2193781120 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.gpio_alert_test.2193781120' seed=108558568235465938516454478638414174882771976215277010667982134710362028798336 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=108558568235465938516454478638414174882771976215277010667982134710362028798336 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke","qual_name":"9.gpio_smoke.98037474829258568942378213024295313807431969321399723045775381063042762833939","seed":98037474829258568942378213024295313807431969321399723045775381063042762833939,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4056186899 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_smoke.4056186899' seed=98037474829258568942378213024295313807431969321399723045775381063042762833939 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=98037474829258568942378213024295313807431969321399723045775381063042762833939 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown","qual_name":"9.gpio_smoke_no_pullup_pulldown.67742103319313142520179137049387348182251683335851701801748734172163905293327","seed":67742103319313142520179137049387348182251683335851701801748734172163905293327,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4183690255 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_smoke_no_pullup_pulldown.4183690255' seed=67742103319313142520179137049387348182251683335851701801748734172163905293327 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=67742103319313142520179137049387348182251683335851701801748734172163905293327 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"9.gpio_inp_prd_cnt.52330348213816067652526204303609681710957781593462295668352538275203794037978","seed":52330348213816067652526204303609681710957781593462295668352538275203794037978,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3012259034 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_inp_prd_cnt.3012259034' seed=52330348213816067652526204303609681710957781593462295668352538275203794037978 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=52330348213816067652526204303609681710957781593462295668352538275203794037978 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din","qual_name":"9.gpio_random_dout_din.55683262594343622893830460435916110043579429357307414682247031609801903006337","seed":55683262594343622893830460435916110043579429357307414682247031609801903006337,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_random_dout_din/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_random_dout_din/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4086653569 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_random_dout_din.4086653569' seed=55683262594343622893830460435916110043579429357307414682247031609801903006337 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=55683262594343622893830460435916110043579429357307414682247031609801903006337 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_random_dout_din/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_dout_din_no_pullup_pulldown","qual_name":"9.gpio_random_dout_din_no_pullup_pulldown.115151137883997162303260561591221133301331936522908050167405200725176895561117","seed":115151137883997162303260561591221133301331936522908050167405200725176895561117,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_random_dout_din_no_pullup_pulldown/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_random_dout_din_no_pullup_pulldown/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4293549469 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_random_dout_din_no_pullup_pulldown.4293549469' seed=115151137883997162303260561591221133301331936522908050167405200725176895561117 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=115151137883997162303260561591221133301331936522908050167405200725176895561117 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_random_dout_din_no_pullup_pulldown/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_dout_din_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_dout_din_regs_random_rw","qual_name":"9.gpio_dout_din_regs_random_rw.115600542491548846047478064466830879668057418717863224309602247848931998170253","seed":115600542491548846047478064466830879668057418717863224309602247848931998170253,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_dout_din_regs_random_rw/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_dout_din_regs_random_rw/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3992845453 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_dout_din_regs_random_rw.3992845453' seed=115600542491548846047478064466830879668057418717863224309602247848931998170253 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=115600542491548846047478064466830879668057418717863224309602247848931998170253 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_dout_din_regs_random_rw/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_dout_din_regs_random_rw_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_rand_pgm","qual_name":"9.gpio_intr_rand_pgm.20323373677130002852280177965928895634694287286880892795673907372556672210807","seed":20323373677130002852280177965928895634694287286880892795673907372556672210807,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_intr_rand_pgm/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_intr_rand_pgm/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3425081207 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_intr_rand_pgm.3425081207' seed=20323373677130002852280177965928895634694287286880892795673907372556672210807 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=20323373677130002852280177965928895634694287286880892795673907372556672210807 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_intr_rand_pgm/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_rand_pgm_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_intr_trigger","qual_name":"9.gpio_rand_intr_trigger.102072767182807909443276620443808615410302625937140384009473837108285233971","seed":102072767182807909443276620443808615410302625937140384009473837108285233971,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_rand_intr_trigger/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_rand_intr_trigger/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=792812339 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_intr_trigger_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_rand_intr_trigger.792812339' seed=102072767182807909443276620443808615410302625937140384009473837108285233971 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=102072767182807909443276620443808615410302625937140384009473837108285233971 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_rand_intr_trigger/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_intr_trigger_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_with_filter_rand_intr_event","qual_name":"9.gpio_intr_with_filter_rand_intr_event.10999485141939920203097634965297032930696582482192524829261959541921948279433","seed":10999485141939920203097634965297032930696582482192524829261959541921948279433,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_intr_with_filter_rand_intr_event/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_intr_with_filter_rand_intr_event/latest run_opts='+en_scb=0 +zero_delays=1 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3991315081 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_with_filter_rand_intr_event_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_intr_with_filter_rand_intr_event.3991315081' seed=10999485141939920203097634965297032930696582482192524829261959541921948279433 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=10999485141939920203097634965297032930696582482192524829261959541921948279433 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_intr_with_filter_rand_intr_event/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_intr_with_filter_rand_intr_event_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_filter_stress","qual_name":"9.gpio_filter_stress.19902679197486257863641245574839772651031666858901224282090598851092123005264","seed":19902679197486257863641245574839772651031666858901224282090598851092123005264,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_filter_stress/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_filter_stress/latest run_opts='+en_scb=0 +do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=952152400 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_filter_stress_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_filter_stress.952152400' seed=19902679197486257863641245574839772651031666858901224282090598851092123005264 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=19902679197486257863641245574839772651031666858901224282090598851092123005264 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_filter_stress/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_filter_stress_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_random_long_reg_writes_reg_reads","qual_name":"9.gpio_random_long_reg_writes_reg_reads.96013451002712904633371833194405449987651482569048169549123350432299537331498","seed":96013451002712904633371833194405449987651482569048169549123350432299537331498,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_random_long_reg_writes_reg_reads/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_random_long_reg_writes_reg_reads/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3203069226 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_random_long_reg_writes_reg_reads.3203069226' seed=96013451002712904633371833194405449987651482569048169549123350432299537331498 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=96013451002712904633371833194405449987651482569048169549123350432299537331498 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_random_long_reg_writes_reg_reads/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_random_long_reg_writes_reg_reads_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_full_random","qual_name":"9.gpio_full_random.26836443553177830972348511906569376195104902931969725384342084965454610947479","seed":26836443553177830972348511906569376195104902931969725384342084965454610947479,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_full_random/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_full_random/latest run_opts='+do_clear_all_interrupts=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3906723223 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_full_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_full_random.3906723223' seed=26836443553177830972348511906569376195104902931969725384342084965454610947479 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=26836443553177830972348511906569376195104902931969725384342084965454610947479 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_full_random/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_full_random_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_stress_all_with_rand_reset","qual_name":"9.gpio_stress_all_with_rand_reset.31319525416965968321095082779147511788284123110102373248662475118585277082889","seed":31319525416965968321095082779147511788284123110102373248662475118585277082889,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_stress_all_with_rand_reset/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_stress_all_with_rand_reset/latest run_opts='+do_clear_all_interrupts=0 +run_stress_all_with_rand_reset +test_timeout_ns=10000000000 +stress_seq=gpio_stress_all_vseq +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=305687817 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_stress_all_with_rand_reset.305687817' seed=31319525416965968321095082779147511788284123110102373248662475118585277082889 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=31319525416965968321095082779147511788284123110102373248662475118585277082889 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_stress_all_with_rand_reset/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"9.gpio_tl_intg_err.65171406999612769077398561031924784556813549832292846232107696736512587888279","seed":65171406999612769077398561031924784556813549832292846232107696736512587888279,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=346322583 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.gpio_tl_intg_err.346322583' seed=65171406999612769077398561031924784556813549832292846232107696736512587888279 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=65171406999612769077398561031924784556813549832292846232107696736512587888279 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_en_cdc_prim","qual_name":"9.gpio_smoke_en_cdc_prim.78960635965497456587855902634222149528713378403991872909557060723231046336743","seed":78960635965497456587855902634222149528713378403991872909557060723231046336743,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke_en_cdc_prim/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3939860711 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 9.gpio_smoke_en_cdc_prim.3939860711' seed=78960635965497456587855902634222149528713378403991872909557060723231046336743 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=78960635965497456587855902634222149528713378403991872909557060723231046336743 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_smoke_no_pullup_pulldown_en_cdc_prim","qual_name":"9.gpio_smoke_no_pullup_pulldown_en_cdc_prim.80015595472873649088881990508676872063377508400043610363975394225136494209216","seed":80015595472873649088881990508676872063377508400043610363975394225136494209216,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/en_cdc_prims/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest run_opts='+no_pullup_pulldown=1 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=318793920 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -cm_log /dev/null -cm_name 9.gpio_smoke_no_pullup_pulldown_en_cdc_prim.318793920' seed=80015595472873649088881990508676872063377508400043610363975394225136494209216 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=80015595472873649088881990508676872063377508400043610363975394225136494209216 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_smoke_no_pullup_pulldown_en_cdc_prim/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_smoke_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_rand_straps","qual_name":"9.gpio_rand_straps.44837307932841882257619789984424973666479904984414711404372007510248218434944","seed":44837307932841882257619789984424973666479904984414711404372007510248218434944,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_rand_straps/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_rand_straps/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3591118208 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_rand_straps_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_rand_straps.3591118208' seed=44837307932841882257619789984424973666479904984414711404372007510248218434944 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=44837307932841882257619789984424973666479904984414711404372007510248218434944 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_rand_straps/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_rand_straps_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"9.gpio_tl_errors.32396217581166187966376227324047255187497138738341268052088475123700244303027","seed":32396217581166187966376227324047255187497138738341268052088475123700244303027,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3360574643 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.gpio_tl_errors.3360574643' seed=32396217581166187966376227324047255187497138738341268052088475123700244303027 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=32396217581166187966376227324047255187497138738341268052088475123700244303027 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_intr_test","qual_name":"9.gpio_intr_test.103048841306055762254861164331956917309922019478165776638175155770757264191481","seed":103048841306055762254861164331956917309922019478165776638175155770757264191481,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_intr_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_intr_test/latest run_opts='+run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4248580089 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.gpio_intr_test.4248580089' seed=103048841306055762254861164331956917309922019478165776638175155770757264191481 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=103048841306055762254861164331956917309922019478165776638175155770757264191481 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_intr_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_alert_test","qual_name":"9.gpio_alert_test.65592679161190409354911613916139367030352700832722974939379725185468158407941","seed":65592679161190409354911613916139367030352700832722974939379725185468158407941,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_alert_test/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_alert_test/latest run_opts='+run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2512876805 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.gpio_alert_test.2512876805' seed=65592679161190409354911613916139367030352700832722974939379725185468158407941 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=65592679161190409354911613916139367030352700832722974939379725185468158407941 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_alert_test/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"10.gpio_inp_prd_cnt.30084422803547894662093590689430173264651318396648326105384622987580594251963","seed":30084422803547894662093590689430173264651318396648326105384622987580594251963,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/10.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/10.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=208464059 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.gpio_inp_prd_cnt.208464059' seed=30084422803547894662093590689430173264651318396648326105384622987580594251963 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=30084422803547894662093590689430173264651318396648326105384622987580594251963 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/10.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"10.gpio_tl_intg_err.44674926003740841386334560833232097271294358885136176636103436539178087547843","seed":44674926003740841386334560833232097271294358885136176636103436539178087547843,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/10.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/10.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1865352131 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.gpio_tl_intg_err.1865352131' seed=44674926003740841386334560833232097271294358885136176636103436539178087547843 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=44674926003740841386334560833232097271294358885136176636103436539178087547843 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/10.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"10.gpio_tl_errors.95515251612860720536786217630952410500477237299306659055796567376408391788099","seed":95515251612860720536786217630952410500477237299306659055796567376408391788099,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/10.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/10.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=779167299 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.gpio_tl_errors.779167299' seed=95515251612860720536786217630952410500477237299306659055796567376408391788099 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=95515251612860720536786217630952410500477237299306659055796567376408391788099 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/10.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"11.gpio_inp_prd_cnt.57856114751600350029708484288712023402513346432449134058064041520397115770248","seed":57856114751600350029708484288712023402513346432449134058064041520397115770248,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/11.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/11.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1078248840 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.gpio_inp_prd_cnt.1078248840' seed=57856114751600350029708484288712023402513346432449134058064041520397115770248 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=57856114751600350029708484288712023402513346432449134058064041520397115770248 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/11.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"11.gpio_tl_intg_err.68991403508356201249747286706503431429004070476803301886619771822073106834795","seed":68991403508356201249747286706503431429004070476803301886619771822073106834795,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/11.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/11.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1390585195 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.gpio_tl_intg_err.1390585195' seed=68991403508356201249747286706503431429004070476803301886619771822073106834795 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=68991403508356201249747286706503431429004070476803301886619771822073106834795 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/11.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"11.gpio_tl_errors.60989681152469782818411269536723480728649644183976379334795649156779989373393","seed":60989681152469782818411269536723480728649644183976379334795649156779989373393,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/11.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/11.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3457782225 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.gpio_tl_errors.3457782225' seed=60989681152469782818411269536723480728649644183976379334795649156779989373393 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=60989681152469782818411269536723480728649644183976379334795649156779989373393 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/11.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"12.gpio_inp_prd_cnt.3111332786660644612456199355349852146130633078727641942653722310988120377505","seed":3111332786660644612456199355349852146130633078727641942653722310988120377505,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/12.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/12.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3961178273 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.gpio_inp_prd_cnt.3961178273' seed=3111332786660644612456199355349852146130633078727641942653722310988120377505 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=3111332786660644612456199355349852146130633078727641942653722310988120377505 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/12.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"12.gpio_tl_intg_err.105293510255777115480379485944996574186248407934521342172241488296016482300372","seed":105293510255777115480379485944996574186248407934521342172241488296016482300372,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/12.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/12.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3058594260 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.gpio_tl_intg_err.3058594260' seed=105293510255777115480379485944996574186248407934521342172241488296016482300372 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=105293510255777115480379485944996574186248407934521342172241488296016482300372 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/12.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"12.gpio_tl_errors.56772646776973604339573481207303915822515219001420771498369649331410687118716","seed":56772646776973604339573481207303915822515219001420771498369649331410687118716,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/12.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/12.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1759923580 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.gpio_tl_errors.1759923580' seed=56772646776973604339573481207303915822515219001420771498369649331410687118716 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=56772646776973604339573481207303915822515219001420771498369649331410687118716 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/12.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"13.gpio_inp_prd_cnt.57931595612637455533166471801322306363511220273244868380686670408710401455050","seed":57931595612637455533166471801322306363511220273244868380686670408710401455050,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/13.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/13.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3578164170 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.gpio_inp_prd_cnt.3578164170' seed=57931595612637455533166471801322306363511220273244868380686670408710401455050 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=57931595612637455533166471801322306363511220273244868380686670408710401455050 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/13.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"13.gpio_tl_intg_err.29887484220526425234140746325998719775757148022800287201068859937419981709145","seed":29887484220526425234140746325998719775757148022800287201068859937419981709145,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/13.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/13.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1078157145 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.gpio_tl_intg_err.1078157145' seed=29887484220526425234140746325998719775757148022800287201068859937419981709145 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=29887484220526425234140746325998719775757148022800287201068859937419981709145 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/13.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"13.gpio_tl_errors.103413606913562220430387898875767301130030486192479451691525244120636571423015","seed":103413606913562220430387898875767301130030486192479451691525244120636571423015,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/13.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/13.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3726807335 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.gpio_tl_errors.3726807335' seed=103413606913562220430387898875767301130030486192479451691525244120636571423015 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=103413606913562220430387898875767301130030486192479451691525244120636571423015 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/13.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"14.gpio_inp_prd_cnt.82084698182677599154845249171774891293192546021019095802823001598037086791502","seed":82084698182677599154845249171774891293192546021019095802823001598037086791502,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/14.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/14.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3416352590 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.gpio_inp_prd_cnt.3416352590' seed=82084698182677599154845249171774891293192546021019095802823001598037086791502 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=82084698182677599154845249171774891293192546021019095802823001598037086791502 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/14.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"14.gpio_tl_intg_err.92671191657962253481629546572449559348507094969955908678010585344643274081453","seed":92671191657962253481629546572449559348507094969955908678010585344643274081453,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/14.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/14.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4147086509 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.gpio_tl_intg_err.4147086509' seed=92671191657962253481629546572449559348507094969955908678010585344643274081453 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=92671191657962253481629546572449559348507094969955908678010585344643274081453 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/14.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"14.gpio_tl_errors.96793399444676395644184133697027716782124073174511502200423109740479188649348","seed":96793399444676395644184133697027716782124073174511502200423109740479188649348,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/14.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/14.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=952190340 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.gpio_tl_errors.952190340' seed=96793399444676395644184133697027716782124073174511502200423109740479188649348 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=96793399444676395644184133697027716782124073174511502200423109740479188649348 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/14.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"15.gpio_inp_prd_cnt.107207779005672210903801422243721370350309763691340231209312033791624561221760","seed":107207779005672210903801422243721370350309763691340231209312033791624561221760,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/15.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/15.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2614812800 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.gpio_inp_prd_cnt.2614812800' seed=107207779005672210903801422243721370350309763691340231209312033791624561221760 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=107207779005672210903801422243721370350309763691340231209312033791624561221760 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/15.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"15.gpio_tl_intg_err.81930458473232823654928525325502311206757602801563925628586834950964371087475","seed":81930458473232823654928525325502311206757602801563925628586834950964371087475,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/15.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/15.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4103954547 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.gpio_tl_intg_err.4103954547' seed=81930458473232823654928525325502311206757602801563925628586834950964371087475 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=81930458473232823654928525325502311206757602801563925628586834950964371087475 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/15.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"15.gpio_tl_errors.10898628881226531430912433349812131278729237640708289098775357737132116633317","seed":10898628881226531430912433349812131278729237640708289098775357737132116633317,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/15.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/15.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=348350181 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.gpio_tl_errors.348350181' seed=10898628881226531430912433349812131278729237640708289098775357737132116633317 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=10898628881226531430912433349812131278729237640708289098775357737132116633317 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/15.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"16.gpio_inp_prd_cnt.84728571352889822986194006027855616405057262325238967220856459224750862949273","seed":84728571352889822986194006027855616405057262325238967220856459224750862949273,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/16.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/16.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1914755993 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.gpio_inp_prd_cnt.1914755993' seed=84728571352889822986194006027855616405057262325238967220856459224750862949273 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=84728571352889822986194006027855616405057262325238967220856459224750862949273 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/16.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"16.gpio_tl_intg_err.61158719961720216428737778070086531739593077164534479425822907779582046480451","seed":61158719961720216428737778070086531739593077164534479425822907779582046480451,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/16.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/16.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2750654531 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.gpio_tl_intg_err.2750654531' seed=61158719961720216428737778070086531739593077164534479425822907779582046480451 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=61158719961720216428737778070086531739593077164534479425822907779582046480451 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/16.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"16.gpio_tl_errors.13227627210271620849155651039602851659995173450877109705968949236554111889644","seed":13227627210271620849155651039602851659995173450877109705968949236554111889644,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/16.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/16.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3177689324 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.gpio_tl_errors.3177689324' seed=13227627210271620849155651039602851659995173450877109705968949236554111889644 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=13227627210271620849155651039602851659995173450877109705968949236554111889644 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/16.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"17.gpio_inp_prd_cnt.45088740482092327767739859294129363996125562265811258864456982584277044460856","seed":45088740482092327767739859294129363996125562265811258864456982584277044460856,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/17.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/17.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2872999224 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.gpio_inp_prd_cnt.2872999224' seed=45088740482092327767739859294129363996125562265811258864456982584277044460856 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=45088740482092327767739859294129363996125562265811258864456982584277044460856 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/17.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"17.gpio_tl_intg_err.34584747156097096975871970023436795299943878904329662611196866321085073831929","seed":34584747156097096975871970023436795299943878904329662611196866321085073831929,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/17.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/17.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3618748409 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.gpio_tl_intg_err.3618748409' seed=34584747156097096975871970023436795299943878904329662611196866321085073831929 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=34584747156097096975871970023436795299943878904329662611196866321085073831929 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/17.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"17.gpio_tl_errors.57137508573034171173916245889433845014076902849629684502186015119921099861697","seed":57137508573034171173916245889433845014076902849629684502186015119921099861697,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/17.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/17.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2526572225 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.gpio_tl_errors.2526572225' seed=57137508573034171173916245889433845014076902849629684502186015119921099861697 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=57137508573034171173916245889433845014076902849629684502186015119921099861697 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/17.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"18.gpio_inp_prd_cnt.115074427956824128124118790857337783164455342870324730962846576433481960996217","seed":115074427956824128124118790857337783164455342870324730962846576433481960996217,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/18.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/18.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2628074873 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.gpio_inp_prd_cnt.2628074873' seed=115074427956824128124118790857337783164455342870324730962846576433481960996217 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=115074427956824128124118790857337783164455342870324730962846576433481960996217 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/18.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"18.gpio_tl_intg_err.16521688382371210072350155264745178533505797566176886592211126216665190516346","seed":16521688382371210072350155264745178533505797566176886592211126216665190516346,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/18.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/18.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1691764346 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.gpio_tl_intg_err.1691764346' seed=16521688382371210072350155264745178533505797566176886592211126216665190516346 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=16521688382371210072350155264745178533505797566176886592211126216665190516346 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/18.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"18.gpio_tl_errors.76120734641122583072984505330974751151964420662825133580223840362459303301776","seed":76120734641122583072984505330974751151964420662825133580223840362459303301776,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/18.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/18.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1291113104 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.gpio_tl_errors.1291113104' seed=76120734641122583072984505330974751151964420662825133580223840362459303301776 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=76120734641122583072984505330974751151964420662825133580223840362459303301776 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/18.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"19.gpio_inp_prd_cnt.104617824862796812094621501614794707580039890809212696955899610834038347510552","seed":104617824862796812094621501614794707580039890809212696955899610834038347510552,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/19.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/19.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3145184024 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.gpio_inp_prd_cnt.3145184024' seed=104617824862796812094621501614794707580039890809212696955899610834038347510552 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=104617824862796812094621501614794707580039890809212696955899610834038347510552 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/19.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"19.gpio_tl_intg_err.40416671531435943740378872865538035863156042865575314341959389708675167610808","seed":40416671531435943740378872865538035863156042865575314341959389708675167610808,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/19.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/19.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=436004792 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.gpio_tl_intg_err.436004792' seed=40416671531435943740378872865538035863156042865575314341959389708675167610808 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=40416671531435943740378872865538035863156042865575314341959389708675167610808 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/19.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"19.gpio_tl_errors.107167548614569226186953177604147327268629680226789296067392936148046079111809","seed":107167548614569226186953177604147327268629680226789296067392936148046079111809,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/19.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/19.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1689825921 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.gpio_tl_errors.1689825921' seed=107167548614569226186953177604147327268629680226789296067392936148046079111809 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=107167548614569226186953177604147327268629680226789296067392936148046079111809 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/19.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"20.gpio_inp_prd_cnt.42477163698303811165484783005819217444466429103112936078411366582595368966631","seed":42477163698303811165484783005819217444466429103112936078411366582595368966631,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/20.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/20.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=471521767 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.gpio_inp_prd_cnt.471521767' seed=42477163698303811165484783005819217444466429103112936078411366582595368966631 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=42477163698303811165484783005819217444466429103112936078411366582595368966631 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/20.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"20.gpio_tl_intg_err.73498612239219224387121705612536386240134608104729412111066335969483626044913","seed":73498612239219224387121705612536386240134608104729412111066335969483626044913,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/20.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/20.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2450447857 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 20.gpio_tl_intg_err.2450447857' seed=73498612239219224387121705612536386240134608104729412111066335969483626044913 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=73498612239219224387121705612536386240134608104729412111066335969483626044913 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/20.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"20.gpio_tl_errors.77684807251182325088041611768657212384385775204808756748467604926523204742604","seed":77684807251182325088041611768657212384385775204808756748467604926523204742604,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/20.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/20.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1304473036 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 20.gpio_tl_errors.1304473036' seed=77684807251182325088041611768657212384385775204808756748467604926523204742604 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=77684807251182325088041611768657212384385775204808756748467604926523204742604 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/20.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"21.gpio_inp_prd_cnt.46571342918331793031997284929969863603945150726045532588266150197539589044669","seed":46571342918331793031997284929969863603945150726045532588266150197539589044669,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/21.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/21.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4072651197 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.gpio_inp_prd_cnt.4072651197' seed=46571342918331793031997284929969863603945150726045532588266150197539589044669 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=46571342918331793031997284929969863603945150726045532588266150197539589044669 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/21.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"21.gpio_tl_intg_err.86131636318265873009678059036452183957064361454835861667223346583596296943552","seed":86131636318265873009678059036452183957064361454835861667223346583596296943552,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/21.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/21.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1581103040 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 21.gpio_tl_intg_err.1581103040' seed=86131636318265873009678059036452183957064361454835861667223346583596296943552 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=86131636318265873009678059036452183957064361454835861667223346583596296943552 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/21.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"21.gpio_tl_errors.80280867138783484625684442461554247669575304829219362460429496584723705963930","seed":80280867138783484625684442461554247669575304829219362460429496584723705963930,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/21.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/21.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3312788890 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 21.gpio_tl_errors.3312788890' seed=80280867138783484625684442461554247669575304829219362460429496584723705963930 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=80280867138783484625684442461554247669575304829219362460429496584723705963930 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/21.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"22.gpio_inp_prd_cnt.7314500256231605186480955417888395083645517949451699407625098343251696050426","seed":7314500256231605186480955417888395083645517949451699407625098343251696050426,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/22.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/22.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3320471802 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.gpio_inp_prd_cnt.3320471802' seed=7314500256231605186480955417888395083645517949451699407625098343251696050426 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=7314500256231605186480955417888395083645517949451699407625098343251696050426 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/22.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"22.gpio_tl_intg_err.33085187482461971831115785769519834474567353413444066148088542159082143286751","seed":33085187482461971831115785769519834474567353413444066148088542159082143286751,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/22.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/22.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1875314143 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 22.gpio_tl_intg_err.1875314143' seed=33085187482461971831115785769519834474567353413444066148088542159082143286751 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=33085187482461971831115785769519834474567353413444066148088542159082143286751 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/22.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"22.gpio_tl_errors.8470648035693598620531268494250396451793178546623721517173095926041555761683","seed":8470648035693598620531268494250396451793178546623721517173095926041555761683,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/22.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/22.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1079507475 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 22.gpio_tl_errors.1079507475' seed=8470648035693598620531268494250396451793178546623721517173095926041555761683 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=8470648035693598620531268494250396451793178546623721517173095926041555761683 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/22.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"23.gpio_inp_prd_cnt.6497542504865360373935386673372924748569343430477036215508396491703549540748","seed":6497542504865360373935386673372924748569343430477036215508396491703549540748,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/23.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/23.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=423999884 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.gpio_inp_prd_cnt.423999884' seed=6497542504865360373935386673372924748569343430477036215508396491703549540748 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=6497542504865360373935386673372924748569343430477036215508396491703549540748 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/23.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"23.gpio_tl_intg_err.4294575476190039154122364385847456578904990680123502534145863224470468623083","seed":4294575476190039154122364385847456578904990680123502534145863224470468623083,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/23.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/23.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1931016939 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 23.gpio_tl_intg_err.1931016939' seed=4294575476190039154122364385847456578904990680123502534145863224470468623083 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=4294575476190039154122364385847456578904990680123502534145863224470468623083 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/23.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"23.gpio_tl_errors.82562403696857049159302505278988698230096779630554689833195473903109934009889","seed":82562403696857049159302505278988698230096779630554689833195473903109934009889,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/23.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/23.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3864907297 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 23.gpio_tl_errors.3864907297' seed=82562403696857049159302505278988698230096779630554689833195473903109934009889 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=82562403696857049159302505278988698230096779630554689833195473903109934009889 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/23.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"24.gpio_inp_prd_cnt.106027097575549731326896771427892191252999591104287821049971147274355416372427","seed":106027097575549731326896771427892191252999591104287821049971147274355416372427,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/24.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/24.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3909752011 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.gpio_inp_prd_cnt.3909752011' seed=106027097575549731326896771427892191252999591104287821049971147274355416372427 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=106027097575549731326896771427892191252999591104287821049971147274355416372427 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/24.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_intg_err","qual_name":"24.gpio_tl_intg_err.7154591563988021847291840281560019545746278188075306200764087081037323635580","seed":7154591563988021847291840281560019545746278188075306200764087081037323635580,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/24.gpio_tl_intg_err/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/24.gpio_tl_intg_err/latest run_opts='+do_clear_all_interrupts=0 +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3720940412 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 24.gpio_tl_intg_err.3720940412' seed=7154591563988021847291840281560019545746278188075306200764087081037323635580 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=7154591563988021847291840281560019545746278188075306200764087081037323635580 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/24.gpio_tl_intg_err/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_tl_errors","qual_name":"24.gpio_tl_errors.71836035159634315261722911645654438083121380393044016468537779079675748758558","seed":71836035159634315261722911645654438083121380393044016468537779079675748758558,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/24.gpio_tl_errors/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/cover_reg_top/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/24.gpio_tl_errors/latest run_opts='+run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2852074526 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 24.gpio_tl_errors.2852074526' seed=71836035159634315261722911645654438083121380393044016468537779079675748758558 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=71836035159634315261722911645654438083121380393044016468537779079675748758558 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/24.gpio_tl_errors/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_common_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"25.gpio_inp_prd_cnt.78956718991446129697678811360932016455325286743667691795179064454510548646008","seed":78956718991446129697678811360932016455325286743667691795179064454510548646008,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/25.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/25.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1580759160 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.gpio_inp_prd_cnt.1580759160' seed=78956718991446129697678811360932016455325286743667691795179064454510548646008 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=78956718991446129697678811360932016455325286743667691795179064454510548646008 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/25.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"26.gpio_inp_prd_cnt.84240791583849785109561916570606640972038079612626557127595177657320946800094","seed":84240791583849785109561916570606640972038079612626557127595177657320946800094,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/26.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/26.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2123634142 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.gpio_inp_prd_cnt.2123634142' seed=84240791583849785109561916570606640972038079612626557127595177657320946800094 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=84240791583849785109561916570606640972038079612626557127595177657320946800094 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/26.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"27.gpio_inp_prd_cnt.35537951082333515205416598180476785540490055601880823456070883781054339940953","seed":35537951082333515205416598180476785540490055601880823456070883781054339940953,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/27.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/27.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1686045273 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.gpio_inp_prd_cnt.1686045273' seed=35537951082333515205416598180476785540490055601880823456070883781054339940953 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=35537951082333515205416598180476785540490055601880823456070883781054339940953 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/27.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"28.gpio_inp_prd_cnt.1836119862951425653314752954763434478455064192536462927734531985714699943645","seed":1836119862951425653314752954763434478455064192536462927734531985714699943645,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/28.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/28.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3260923613 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.gpio_inp_prd_cnt.3260923613' seed=1836119862951425653314752954763434478455064192536462927734531985714699943645 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=1836119862951425653314752954763434478455064192536462927734531985714699943645 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/28.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"29.gpio_inp_prd_cnt.52154152467317630713578773378180254057844630117961416987352424356702199108058","seed":52154152467317630713578773378180254057844630117961416987352424356702199108058,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/29.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/29.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1627541978 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.gpio_inp_prd_cnt.1627541978' seed=52154152467317630713578773378180254057844630117961416987352424356702199108058 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=52154152467317630713578773378180254057844630117961416987352424356702199108058 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/29.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"30.gpio_inp_prd_cnt.17405447346074820082476175442067581612693169087559843055814991235426827782961","seed":17405447346074820082476175442067581612693169087559843055814991235426827782961,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/30.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/30.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=137513777 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.gpio_inp_prd_cnt.137513777' seed=17405447346074820082476175442067581612693169087559843055814991235426827782961 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=17405447346074820082476175442067581612693169087559843055814991235426827782961 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/30.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"31.gpio_inp_prd_cnt.13864494390565147010030435624018807335879957606588710391688009929674684406082","seed":13864494390565147010030435624018807335879957606588710391688009929674684406082,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/31.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/31.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1433180482 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.gpio_inp_prd_cnt.1433180482' seed=13864494390565147010030435624018807335879957606588710391688009929674684406082 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=13864494390565147010030435624018807335879957606588710391688009929674684406082 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/31.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"32.gpio_inp_prd_cnt.63628624707310970702956289997737644060680913022984275626488347578198031312521","seed":63628624707310970702956289997737644060680913022984275626488347578198031312521,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/32.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/32.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1043572361 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.gpio_inp_prd_cnt.1043572361' seed=63628624707310970702956289997737644060680913022984275626488347578198031312521 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=63628624707310970702956289997737644060680913022984275626488347578198031312521 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/32.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"33.gpio_inp_prd_cnt.30589863149405383020133351236028719585461194771313470823483718048356908201416","seed":30589863149405383020133351236028719585461194771313470823483718048356908201416,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/33.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/33.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2703029704 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.gpio_inp_prd_cnt.2703029704' seed=30589863149405383020133351236028719585461194771313470823483718048356908201416 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=30589863149405383020133351236028719585461194771313470823483718048356908201416 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/33.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"34.gpio_inp_prd_cnt.83006588508163057261664541335024813298492373667950548643833843907379516373669","seed":83006588508163057261664541335024813298492373667950548643833843907379516373669,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/34.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/34.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2276162213 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.gpio_inp_prd_cnt.2276162213' seed=83006588508163057261664541335024813298492373667950548643833843907379516373669 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=83006588508163057261664541335024813298492373667950548643833843907379516373669 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/34.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"35.gpio_inp_prd_cnt.30105297561456043813324281357305014126175157585073705143456658391117263101649","seed":30105297561456043813324281357305014126175157585073705143456658391117263101649,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/35.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/35.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3929890513 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.gpio_inp_prd_cnt.3929890513' seed=30105297561456043813324281357305014126175157585073705143456658391117263101649 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=30105297561456043813324281357305014126175157585073705143456658391117263101649 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/35.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"36.gpio_inp_prd_cnt.5914192389148973068097671951383315345681798749168403529842547366267863666343","seed":5914192389148973068097671951383315345681798749168403529842547366267863666343,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/36.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/36.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=9670311 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.gpio_inp_prd_cnt.9670311' seed=5914192389148973068097671951383315345681798749168403529842547366267863666343 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=5914192389148973068097671951383315345681798749168403529842547366267863666343 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/36.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"37.gpio_inp_prd_cnt.92387648527430578883243318206648790188526121161180967154637341877832513579873","seed":92387648527430578883243318206648790188526121161180967154637341877832513579873,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/37.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/37.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3265358689 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.gpio_inp_prd_cnt.3265358689' seed=92387648527430578883243318206648790188526121161180967154637341877832513579873 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=92387648527430578883243318206648790188526121161180967154637341877832513579873 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/37.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"38.gpio_inp_prd_cnt.76253383321651668338356978997082326398496788983446741163059421681034659273731","seed":76253383321651668338356978997082326398496788983446741163059421681034659273731,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/38.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/38.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=5151747 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.gpio_inp_prd_cnt.5151747' seed=76253383321651668338356978997082326398496788983446741163059421681034659273731 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=76253383321651668338356978997082326398496788983446741163059421681034659273731 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/38.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"39.gpio_inp_prd_cnt.14012049895643209933863561221478711379480206618567879112927016024108739571776","seed":14012049895643209933863561221478711379480206618567879112927016024108739571776,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/39.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/39.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1029681216 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.gpio_inp_prd_cnt.1029681216' seed=14012049895643209933863561221478711379480206618567879112927016024108739571776 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=14012049895643209933863561221478711379480206618567879112927016024108739571776 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/39.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"40.gpio_inp_prd_cnt.22857548146951866150714115156670289218288955935275279470194798864352213175347","seed":22857548146951866150714115156670289218288955935275279470194798864352213175347,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/40.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/40.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1407945779 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.gpio_inp_prd_cnt.1407945779' seed=22857548146951866150714115156670289218288955935275279470194798864352213175347 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=22857548146951866150714115156670289218288955935275279470194798864352213175347 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/40.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"41.gpio_inp_prd_cnt.110519549307380339467105470918023560854685201222315892915919678360285666279070","seed":110519549307380339467105470918023560854685201222315892915919678360285666279070,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/41.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/41.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2193292958 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.gpio_inp_prd_cnt.2193292958' seed=110519549307380339467105470918023560854685201222315892915919678360285666279070 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=110519549307380339467105470918023560854685201222315892915919678360285666279070 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/41.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"42.gpio_inp_prd_cnt.74845604467907245634952017846474100255574912433225485064860283809898525653834","seed":74845604467907245634952017846474100255574912433225485064860283809898525653834,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/42.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/42.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2186050378 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.gpio_inp_prd_cnt.2186050378' seed=74845604467907245634952017846474100255574912433225485064860283809898525653834 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=74845604467907245634952017846474100255574912433225485064860283809898525653834 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/42.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"43.gpio_inp_prd_cnt.67701732658653853128247383158118693756451173030510183614504671250871546947836","seed":67701732658653853128247383158118693756451173030510183614504671250871546947836,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/43.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/43.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3243911420 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.gpio_inp_prd_cnt.3243911420' seed=67701732658653853128247383158118693756451173030510183614504671250871546947836 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=67701732658653853128247383158118693756451173030510183614504671250871546947836 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/43.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"44.gpio_inp_prd_cnt.66052102811196242349499409846697341993644778332121049494831506696315106670373","seed":66052102811196242349499409846697341993644778332121049494831506696315106670373,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/44.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/44.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2655696677 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.gpio_inp_prd_cnt.2655696677' seed=66052102811196242349499409846697341993644778332121049494831506696315106670373 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=66052102811196242349499409846697341993644778332121049494831506696315106670373 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/44.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"45.gpio_inp_prd_cnt.89708397147801991242533706544458576976782792944415012255315732938753531715731","seed":89708397147801991242533706544458576976782792944415012255315732938753531715731,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/45.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/45.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=466362515 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.gpio_inp_prd_cnt.466362515' seed=89708397147801991242533706544458576976782792944415012255315732938753531715731 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=89708397147801991242533706544458576976782792944415012255315732938753531715731 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/45.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"46.gpio_inp_prd_cnt.99967704867113215157785768553923571892248370930093780256208023306639891499332","seed":99967704867113215157785768553923571892248370930093780256208023306639891499332,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/46.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/46.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3974367556 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.gpio_inp_prd_cnt.3974367556' seed=99967704867113215157785768553923571892248370930093780256208023306639891499332 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=99967704867113215157785768553923571892248370930093780256208023306639891499332 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/46.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"47.gpio_inp_prd_cnt.8381873343270465389502529540595359457043006261379050769512395273119904364757","seed":8381873343270465389502529540595359457043006261379050769512395273119904364757,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/47.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/47.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2647193813 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.gpio_inp_prd_cnt.2647193813' seed=8381873343270465389502529540595359457043006261379050769512395273119904364757 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=8381873343270465389502529540595359457043006261379050769512395273119904364757 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/47.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"48.gpio_inp_prd_cnt.80167204912185601464161135934179558762804826666525025483152963283180977411796","seed":80167204912185601464161135934179558762804826666525025483152963283180977411796,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/48.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/48.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2021938900 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.gpio_inp_prd_cnt.2021938900' seed=80167204912185601464161135934179558762804826666525025483152963283180977411796 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=80167204912185601464161135934179558762804826666525025483152963283180977411796 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/48.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]},{"name":"gpio_inp_prd_cnt","qual_name":"49.gpio_inp_prd_cnt.37445099306010661096482919239160761666931566137558254372393816205332195957808","seed":37445099306010661096482919239160761666931566137558254372393816205332195957808,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/49.gpio_inp_prd_cnt/latest/run.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk run build_seed=None post_run_cmds='' pre_run_cmds='' proj_root=/nightly/current_run/opentitan run_cmd=/nightly/current_run/scratch/master/gpio-sim-vcs/default/simv run_dir=/nightly/current_run/scratch/master/gpio-sim-vcs/49.gpio_inp_prd_cnt/latest run_opts='+cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /nightly/current_run/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=5626928 -xlrm hier_inst_seed -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_inp_prd_cnt_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.gpio_inp_prd_cnt.5626928' seed=37445099306010661096482919239160761666931566137558254372393816205332195957808 sw_build_cmd='python /nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py --sw-images='\"'\"''\"'\"' --sw-build-opts='\"'\"''\"'\"' --sw-build-device= --seed=37445099306010661096482919239160761666931566137558254372393816205332195957808 --run-dir=/nightly/current_run/scratch/master/gpio-sim-vcs/49.gpio_inp_prd_cnt/latest' sw_build_device='' sw_build_opts='' sw_images='' uvm_test=gpio_base_test uvm_test_seq=gpio_inp_prd_cnt_vseq\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:50: pre_run] Error 126\n"]}],"UVM_ERROR (gpio_scoreboard.sv:243) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])":[{"name":"gpio_stress_all","qual_name":"3.gpio_stress_all.89062418549260491418383244357959760012256594034259181385820432169080232814615","seed":89062418549260491418383244357959760012256594034259181385820432169080232814615,"line":875,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/3.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 1842852462 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"5.gpio_stress_all.17683659592895929746793917439870382318277743054067244359113158287561627501799","seed":17683659592895929746793917439870382318277743054067244359113158287561627501799,"line":1817,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/5.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 5007240565 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"6.gpio_stress_all.34664715838295455600638656631505443532308015862541743007743649587063735188620","seed":34664715838295455600638656631505443532308015862541743007743649587063735188620,"line":1254,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/6.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 5941933589 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"7.gpio_stress_all.35516657198794626306869157713527035286190945974007512531111205310613373823473","seed":35516657198794626306869157713527035286190945974007512531111205310613373823473,"line":762,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/7.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 2316100663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"8.gpio_stress_all.85958182836301357764861056492682161049026751599855069284505866465189110783169","seed":85958182836301357764861056492682161049026751599855069284505866465189110783169,"line":797,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/8.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 3145914685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"gpio_stress_all","qual_name":"9.gpio_stress_all.54044500296907984511511944710988254055723600191921490194819304621384729214157","seed":54044500296907984511511944710988254055723600191921490194819304621384729214157,"line":1092,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/9.gpio_stress_all/latest/run.log","log_context":["UVM_INFO @ 5629806755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Job returned a non-zero exit code: *":[{"name":"gpio","qual_name":"cov_merge","seed":null,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/cov_merge/merged.vdb/cov_merge.log","log_context":["[Executing]:\n","make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk cov_merge cov_merge_cmd=urg cov_merge_opts='-lca -full64 -noreport +urg+lic+wait -merge_across_libs -show tests -flex_merge union -dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/default.vdb -dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/cover_reg_top.vdb -dir /nightly/current_run/scratch/master/gpio-sim-vcs/coverage/en_cdc_prims.vdb -dbname /nightly/current_run/scratch/master/gpio-sim-vcs/cov_merge/merged.vdb'\n","\n","/usr/bin/env: ‘bash’: Input/output error\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:109: cov_merge] Error 126\n"]}],"Job cancelled because one of its dependencies failed or was killed.":[{"name":"gpio","qual_name":"cov_report","seed":null,"line":null,"log_path":"/nightly/current_run/scratch/master/gpio-sim-vcs/cov_report/cov_report.log","log_context":[]}]}},"passed":4,"total":303,"percent":1.3201320132013201}