AON_TIMER Simulation Results

Saturday February 08 2025 23:09:58 UTC

GitHub Revision: c12958f63b

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	2.380s	761.100us	50	50	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	2.680s	1.011ms	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	2.090s	459.026us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	11.350s	10.064ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	2.110s	640.089us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	2.230s	500.680us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	2.090s	459.026us	20	20	100.00
		aon_timer_csr_aliasing	2.110s	640.089us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.960s	508.327us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.790s	424.201us	5	5	100.00
V1		TOTAL			115	115	100.00
V2	prescaler	aon_timer_prescaler	44.110s	47.403ms	50	50	100.00
V2	jump	aon_timer_jump	2.350s	730.719us	50	50	100.00
V2	stress_all	aon_timer_stress_all	7.823m	589.972ms	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.100s	359.196us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	2.880s	577.246us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	2.880s	577.246us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	2.680s	1.011ms	5	5	100.00
		aon_timer_csr_rw	2.090s	459.026us	20	20	100.00
		aon_timer_csr_aliasing	2.110s	640.089us	5	5	100.00
		aon_timer_same_csr_outstanding	5.600s	2.558ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	2.680s	1.011ms	5	5	100.00
		aon_timer_csr_rw	2.090s	459.026us	20	20	100.00
		aon_timer_csr_aliasing	2.110s	640.089us	5	5	100.00
		aon_timer_same_csr_outstanding	5.600s	2.558ms	20	20	100.00
V2		TOTAL			240	240	100.00
V2S	tl_intg_err	aon_timer_sec_cm	12.530s	7.992ms	5	5	100.00
		aon_timer_tl_intg_err	17.320s	8.425ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	17.320s	8.425ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	30.990s	25.775ms	50	50	100.00
V3		TOTAL			50	50	100.00
	Unmapped tests	aon_timer_alert_test	1.900s	398.436us	50	50	100.00
		TOTAL			480	480	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.20	99.47	96.79	100.00	--	98.39	99.52	95.01