c12958f63b| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | kmac_smoke | 44.530s | 15.176ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | kmac_csr_hw_reset | 1.930s | 456.678us | 5 | 5 | 100.00 |
| V1 | csr_rw | kmac_csr_rw | 2.100s | 49.126us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | kmac_csr_bit_bash | 13.620s | 1.444ms | 5 | 5 | 100.00 |
| V1 | csr_aliasing | kmac_csr_aliasing | 7.100s | 3.419ms | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | kmac_csr_mem_rw_with_rand_reset | 2.790s | 86.255us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | kmac_csr_rw | 2.100s | 49.126us | 20 | 20 | 100.00 |
| kmac_csr_aliasing | 7.100s | 3.419ms | 5 | 5 | 100.00 | ||
| V1 | mem_walk | kmac_mem_walk | 1.780s | 12.425us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | kmac_mem_partial_access | 2.180s | 370.425us | 5 | 5 | 100.00 |
| V1 | TOTAL | 115 | 115 | 100.00 | |||
| V2 | long_msg_and_output | kmac_long_msg_and_output | 46.546m | 632.688ms | 50 | 50 | 100.00 |
| V2 | burst_write | kmac_burst_write | 10.792m | 140.493ms | 50 | 50 | 100.00 |
| V2 | test_vectors | kmac_test_vectors_sha3_224 | 25.909m | 610.830ms | 5 | 5 | 100.00 |
| kmac_test_vectors_sha3_256 | 21.002m | 60.296ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_384 | 16.305m | 92.235ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_512 | 11.716m | 73.505ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_128 | 28.793m | 105.104ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_256 | 15.822m | 17.258ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac | 4.500s | 213.516us | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac_xof | 4.520s | 352.005us | 5 | 5 | 100.00 | ||
| V2 | sideload | kmac_sideload | 4.363m | 36.451ms | 50 | 50 | 100.00 |
| V2 | app | kmac_app | 4.040m | 162.989ms | 50 | 50 | 100.00 |
| V2 | app_with_partial_data | kmac_app_with_partial_data | 3.464m | 35.721ms | 10 | 10 | 100.00 |
| V2 | entropy_refresh | kmac_entropy_refresh | 3.451m | 64.605ms | 50 | 50 | 100.00 |
| V2 | error | kmac_error | 4.742m | 22.367ms | 50 | 50 | 100.00 |
| V2 | key_error | kmac_key_error | 7.340s | 1.158ms | 50 | 50 | 100.00 |
| V2 | sideload_invalid | kmac_sideload_invalid | 1.315m | 10.022ms | 37 | 50 | 74.00 |
| V2 | edn_timeout_error | kmac_edn_timeout_error | 22.260s | 1.444ms | 20 | 20 | 100.00 |
| V2 | entropy_mode_error | kmac_entropy_mode_error | 27.390s | 2.141ms | 20 | 20 | 100.00 |
| V2 | entropy_ready_error | kmac_entropy_ready_error | 46.580s | 9.008ms | 10 | 10 | 100.00 |
| V2 | lc_escalation | kmac_lc_escalation | 21.840s | 771.287us | 50 | 50 | 100.00 |
| V2 | stress_all | kmac_stress_all | 21.506m | 28.072ms | 50 | 50 | 100.00 |
| V2 | intr_test | kmac_intr_test | 1.950s | 25.545us | 50 | 50 | 100.00 |
| V2 | alert_test | kmac_alert_test | 3.700s | 46.901us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | kmac_tl_errors | 3.620s | 178.311us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | kmac_tl_errors | 3.620s | 178.311us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | kmac_csr_hw_reset | 1.930s | 456.678us | 5 | 5 | 100.00 |
| kmac_csr_rw | 2.100s | 49.126us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 7.100s | 3.419ms | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 2.970s | 882.360us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | kmac_csr_hw_reset | 1.930s | 456.678us | 5 | 5 | 100.00 |
| kmac_csr_rw | 2.100s | 49.126us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 7.100s | 3.419ms | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 2.970s | 882.360us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 727 | 740 | 98.24 | |||
| V2S | shadow_reg_update_error | kmac_shadow_reg_errors | 3.250s | 118.725us | 10 | 20 | 50.00 |
| V2S | shadow_reg_read_clear_staged_value | kmac_shadow_reg_errors | 3.250s | 118.725us | 10 | 20 | 50.00 |
| V2S | shadow_reg_storage_error | kmac_shadow_reg_errors | 3.250s | 118.725us | 10 | 20 | 50.00 |
| V2S | shadowed_reset_glitch | kmac_shadow_reg_errors | 3.250s | 118.725us | 10 | 20 | 50.00 |
| V2S | shadow_reg_update_error_with_csr_rw | kmac_shadow_reg_errors_with_csr_rw | 6.940s | 2.143ms | 9 | 20 | 45.00 |
| V2S | tl_intg_err | kmac_sec_cm | 7.449m | 50.853ms | 5 | 5 | 100.00 |
| kmac_tl_intg_err | 9.130s | 1.987ms | 14 | 20 | 70.00 | ||
| V2S | sec_cm_bus_integrity | kmac_tl_intg_err | 9.130s | 1.987ms | 14 | 20 | 70.00 |
| V2S | sec_cm_lc_escalate_en_intersig_mubi | kmac_lc_escalation | 21.840s | 771.287us | 50 | 50 | 100.00 |
| V2S | sec_cm_sw_key_key_masking | kmac_smoke | 44.530s | 15.176ms | 50 | 50 | 100.00 |
| V2S | sec_cm_key_sideload | kmac_sideload | 4.363m | 36.451ms | 50 | 50 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_shadow | kmac_shadow_reg_errors | 3.250s | 118.725us | 10 | 20 | 50.00 |
| V2S | sec_cm_fsm_sparse | kmac_sec_cm | 7.449m | 50.853ms | 5 | 5 | 100.00 |
| V2S | sec_cm_ctr_redun | kmac_sec_cm | 7.449m | 50.853ms | 5 | 5 | 100.00 |
| V2S | sec_cm_packer_ctr_redun | kmac_sec_cm | 7.449m | 50.853ms | 5 | 5 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_regwen | kmac_smoke | 44.530s | 15.176ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_global_esc | kmac_lc_escalation | 21.840s | 771.287us | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_local_esc | kmac_sec_cm | 7.449m | 50.853ms | 5 | 5 | 100.00 |
| V2S | sec_cm_absorbed_ctrl_mubi | kmac_mubi | 3.230m | 29.732ms | 10 | 10 | 100.00 |
| V2S | sec_cm_sw_cmd_ctrl_sparse | kmac_smoke | 44.530s | 15.176ms | 50 | 50 | 100.00 |
| V2S | TOTAL | 48 | 75 | 64.00 | |||
| V3 | stress_all_with_rand_reset | kmac_stress_all_with_rand_reset | 2.019m | 9.577ms | 8 | 10 | 80.00 |
| V3 | TOTAL | 8 | 10 | 80.00 | |||
| TOTAL | 898 | 940 | 95.53 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 93.73 | 97.54 | 94.39 | 100.00 | 72.73 | 95.99 | 99.34 | 96.15 |
UVM_FATAL (alert_receiver_driver.sv:145) [driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q has 17 failures:
0.kmac_shadow_reg_errors.92252158010703257454125502792886554955550202657093725293964252250905840680921
Line 86, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/0.kmac_shadow_reg_errors/latest/run.log
UVM_FATAL @ 276500066 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 276500066 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.kmac_shadow_reg_errors.16140283927156467126949107793428288147820410957038305226567289343339177152284
Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/2.kmac_shadow_reg_errors/latest/run.log
UVM_FATAL @ 22589144 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 22589144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 8 more failures.
0.kmac_shadow_reg_errors_with_csr_rw.57621810177749235478290041397273205922715111089889426810866668019001673564622
Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/0.kmac_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_FATAL @ 35417685 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 35417685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.kmac_shadow_reg_errors_with_csr_rw.55230469063391670151916984537176097397725536877569203028062176128316021964251
Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/1.kmac_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_FATAL @ 50905340 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 50905340 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 5 more failures.
Offending '(d2h.d_error || ((d2h.d_data & *) == (exp_vals[*] & *)))' has 10 failures:
1.kmac_tl_intg_err.71498450728895239857091247886468084587137376560107936180011995858516515696390
Line 82, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/1.kmac_tl_intg_err/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[48] & 'hffffffff)))'
UVM_ERROR @ 9611813 ps: (kmac_csr_assert_fpv.sv:537) [ASSERT FAILED] prefix_9_rd_A
UVM_INFO @ 9611813 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.kmac_tl_intg_err.60551528571329339359733218254344824112442986998383625726720253238810832110894
Line 98, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/2.kmac_tl_intg_err/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[45] & 'hffffffff)))'
UVM_ERROR @ 56603332 ps: (kmac_csr_assert_fpv.sv:522) [ASSERT FAILED] prefix_6_rd_A
UVM_INFO @ 56603332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 4 more failures.
5.kmac_shadow_reg_errors_with_csr_rw.53059310230729717959555654501010233026888291590445891288665372250077191002157
Line 86, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/5.kmac_shadow_reg_errors_with_csr_rw/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[40] & 'hffffffff)))'
UVM_ERROR @ 22604222 ps: (kmac_csr_assert_fpv.sv:497) [ASSERT FAILED] prefix_1_rd_A
UVM_INFO @ 22604222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
14.kmac_shadow_reg_errors_with_csr_rw.14603250220533118085864750767074585712372464150328254173342941157488400596366
Line 86, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/14.kmac_shadow_reg_errors_with_csr_rw/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffff03ff) == (exp_vals[4] & 'hffff03ff)))'
UVM_ERROR @ 29592408 ps: (kmac_csr_assert_fpv.sv:487) [ASSERT FAILED] entropy_period_rd_A
UVM_INFO @ 29592408 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 2 failures:
13.kmac_sideload_invalid.82591836511360591727695722119851696308799223338278053336395273109271315718386
Line 73, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/13.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10011459412 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3e4f0000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10011459412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
34.kmac_sideload_invalid.40153404636566538107400862800901651100492468642636307076176011033683331887573
Line 73, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/34.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10036666457 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x8c3d4000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10036666457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:890) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 1 failures:
2.kmac_stress_all_with_rand_reset.1435736665857867236041193704890819125234820873921668231619524299954782328949
Line 86, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/2.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 4471397046 ps: (cip_base_vseq.sv:890) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 4471397046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (kmac_scoreboard.sv:1202) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: kmac_reg_block.err_code has 1 failures:
3.kmac_stress_all_with_rand_reset.11718715628897484170010637549775022610876558696466320523530043532229129829652
Line 129, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/3.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1608441260 ps: (kmac_scoreboard.sv:1202) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2147483768 [0x80000078]) reg name: kmac_reg_block.err_code
UVM_INFO @ 1608441260 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11) has 1 failures:
8.kmac_sideload_invalid.22468208374934217491869358280347640049820365584233491681410318213579876379315
Line 83, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/8.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10319377276 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xbd9e1000, Comparison=CompareOpEq, exp_data=0x1, call_count=11)
UVM_INFO @ 10319377276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=16) has 1 failures:
9.kmac_sideload_invalid.113427470982192687133906382916536166689698022536612913038975045509126668111879
Line 90, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/9.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10353226074 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xc15ee000, Comparison=CompareOpEq, exp_data=0x1, call_count=16)
UVM_INFO @ 10353226074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=17) has 1 failures:
15.kmac_sideload_invalid.100077917315820719234375120457346452880891750118693181682812612504531075062241
Line 90, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/15.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10253611389 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x5f499000, Comparison=CompareOpEq, exp_data=0x1, call_count=17)
UVM_INFO @ 10253611389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=10) has 1 failures:
18.kmac_sideload_invalid.23249801895006045649129796430471010472476475508484385959644486189616308650396
Line 82, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/18.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10611529900 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xfd055000, Comparison=CompareOpEq, exp_data=0x1, call_count=10)
UVM_INFO @ 10611529900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) has 1 failures:
22.kmac_sideload_invalid.59489281240437562076448108936459324523310126900479199349503329754721891920536
Line 80, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/22.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10071844326 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xb509e000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)
UVM_INFO @ 10071844326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 1 failures:
23.kmac_sideload_invalid.112693337413738844614611834306615993639171568422013219573050360215398314322803
Line 74, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/23.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10022268607 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x5ed07000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10022268607 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=12) has 1 failures:
25.kmac_sideload_invalid.44419535322458238052602395176489359931886373271412661846236317817514757904542
Line 83, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/25.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10084329497 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x1066b000, Comparison=CompareOpEq, exp_data=0x1, call_count=12)
UVM_INFO @ 10084329497 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=14) has 1 failures:
31.kmac_sideload_invalid.87991634826145454878266788863903838152454272232981067636625824021941744550910
Line 88, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/31.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10106111806 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x42687000, Comparison=CompareOpEq, exp_data=0x1, call_count=14)
UVM_INFO @ 10106111806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=29) has 1 failures:
40.kmac_sideload_invalid.102174221339005372126745539003302964373814577198316216846038653774470830409664
Line 103, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/40.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10544959060 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x4861f000, Comparison=CompareOpEq, exp_data=0x1, call_count=29)
UVM_INFO @ 10544959060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) has 1 failures:
46.kmac_sideload_invalid.62140942522621480972935446148451056203294234191767614957591143287534948939603
Line 75, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/46.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10258436170 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x6f638000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10258436170 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) has 1 failures:
49.kmac_sideload_invalid.62774004769869614941382821608291069999775895273808150127421534360883331387532
Line 77, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/49.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10136386587 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x161a9000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 10136386587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---