KMAC/UNMASKED Simulation Results

Sunday March 23 2025 00:10:17 UTC

GitHub Revision: `27fc640f8d`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	kmac_smoke	1.033m	2.702ms	50	50	100.00
V1	csr_hw_reset	kmac_csr_hw_reset	2.550s	42.151us	5	5	100.00
V1	csr_rw	kmac_csr_rw	2.670s	30.528us	20	20	100.00
V1	csr_bit_bash	kmac_csr_bit_bash	17.930s	12.021ms	5	5	100.00
V1	csr_aliasing	kmac_csr_aliasing	8.530s	893.643us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	kmac_csr_mem_rw_with_rand_reset	3.900s	302.902us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	kmac_csr_rw	2.670s	30.528us	20	20	100.00
		kmac_csr_aliasing	8.530s	893.643us	5	5	100.00
V1	mem_walk	kmac_mem_walk	2.180s	11.181us	5	5	100.00
V1	mem_partial_access	kmac_mem_partial_access	2.880s	126.928us	5	5	100.00
V1		TOTAL			115	115	100.00
V2	long_msg_and_output	kmac_long_msg_and_output	48.335m	565.695ms	50	50	100.00
V2	burst_write	kmac_burst_write	12.864m	197.184ms	50	50	100.00
V2	test_vectors	kmac_test_vectors_sha3_224	31.826m	376.553ms	5	5	100.00
		kmac_test_vectors_sha3_256	35.390m	119.674ms	5	5	100.00
		kmac_test_vectors_sha3_384	15.000m	13.354ms	5	5	100.00
		kmac_test_vectors_sha3_512	13.677m	126.944ms	5	5	100.00
		kmac_test_vectors_shake_128	28.169m	33.603ms	5	5	100.00
		kmac_test_vectors_shake_256	27.027m	389.471ms	5	5	100.00
		kmac_test_vectors_kmac	4.090s	100.505us	5	5	100.00
		kmac_test_vectors_kmac_xof	4.250s	349.921us	5	5	100.00
V2	sideload	kmac_sideload	6.740m	21.226ms	50	50	100.00
V2	app	kmac_app	6.484m	76.725ms	50	50	100.00
V2	app_with_partial_data	kmac_app_with_partial_data	5.915m	74.050ms	10	10	100.00
V2	entropy_refresh	kmac_entropy_refresh	5.287m	63.195ms	50	50	100.00
V2	error	kmac_error	5.964m	28.805ms	50	50	100.00
V2	key_error	kmac_key_error	16.110s	9.299ms	50	50	100.00
V2	sideload_invalid	kmac_sideload_invalid	2.553m	10.062ms	31	50	62.00
V2	edn_timeout_error	kmac_edn_timeout_error	42.080s	1.986ms	20	20	100.00
V2	entropy_mode_error	kmac_entropy_mode_error	37.620s	5.466ms	20	20	100.00
V2	entropy_ready_error	kmac_entropy_ready_error	1.205m	8.070ms	10	10	100.00
V2	lc_escalation	kmac_lc_escalation	49.950s	9.457ms	50	50	100.00
V2	stress_all	kmac_stress_all	29.044m	151.777ms	50	50	100.00
V2	intr_test	kmac_intr_test	2.360s	28.587us	50	50	100.00
V2	alert_test	kmac_alert_test	2.280s	13.967us	50	50	100.00
V2	tl_d_oob_addr_access	kmac_tl_errors	5.070s	145.862us	20	20	100.00
V2	tl_d_illegal_access	kmac_tl_errors	5.070s	145.862us	20	20	100.00
V2	tl_d_outstanding_access	kmac_csr_hw_reset	2.550s	42.151us	5	5	100.00
		kmac_csr_rw	2.670s	30.528us	20	20	100.00
		kmac_csr_aliasing	8.530s	893.643us	5	5	100.00
		kmac_same_csr_outstanding	3.750s	175.248us	20	20	100.00
V2	tl_d_partial_access	kmac_csr_hw_reset	2.550s	42.151us	5	5	100.00
		kmac_csr_rw	2.670s	30.528us	20	20	100.00
		kmac_csr_aliasing	8.530s	893.643us	5	5	100.00
		kmac_same_csr_outstanding	3.750s	175.248us	20	20	100.00
V2		TOTAL			721	740	97.43
V2S	shadow_reg_update_error	kmac_shadow_reg_errors	3.150s	285.039us	9	20	45.00
V2S	shadow_reg_read_clear_staged_value	kmac_shadow_reg_errors	3.150s	285.039us	9	20	45.00
V2S	shadow_reg_storage_error	kmac_shadow_reg_errors	3.150s	285.039us	9	20	45.00
V2S	shadowed_reset_glitch	kmac_shadow_reg_errors	3.150s	285.039us	9	20	45.00
V2S	shadow_reg_update_error_with_csr_rw	kmac_shadow_reg_errors_with_csr_rw	4.640s	106.143us	5	20	25.00
V2S	tl_intg_err	kmac_sec_cm	40.060s	3.104ms	5	5	100.00
		kmac_tl_intg_err	5.170s	731.306us	16	20	80.00
V2S	sec_cm_bus_integrity	kmac_tl_intg_err	5.170s	731.306us	16	20	80.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	kmac_lc_escalation	49.950s	9.457ms	50	50	100.00
V2S	sec_cm_sw_key_key_masking	kmac_smoke	1.033m	2.702ms	50	50	100.00
V2S	sec_cm_key_sideload	kmac_sideload	6.740m	21.226ms	50	50	100.00
V2S	sec_cm_cfg_shadowed_config_shadow	kmac_shadow_reg_errors	3.150s	285.039us	9	20	45.00
V2S	sec_cm_fsm_sparse	kmac_sec_cm	40.060s	3.104ms	5	5	100.00
V2S	sec_cm_ctr_redun	kmac_sec_cm	40.060s	3.104ms	5	5	100.00
V2S	sec_cm_packer_ctr_redun	kmac_sec_cm	40.060s	3.104ms	5	5	100.00
V2S	sec_cm_cfg_shadowed_config_regwen	kmac_smoke	1.033m	2.702ms	50	50	100.00
V2S	sec_cm_fsm_global_esc	kmac_lc_escalation	49.950s	9.457ms	50	50	100.00
V2S	sec_cm_fsm_local_esc	kmac_sec_cm	40.060s	3.104ms	5	5	100.00
V2S	sec_cm_absorbed_ctrl_mubi	kmac_mubi	4.433m	15.267ms	10	10	100.00
V2S	sec_cm_sw_cmd_ctrl_sparse	kmac_smoke	1.033m	2.702ms	50	50	100.00
V2S		TOTAL			45	75	60.00
V3	stress_all_with_rand_reset	kmac_stress_all_with_rand_reset	2.746m	3.094ms	3	10	30.00
V3		TOTAL			3	10	30.00
		TOTAL			884	940	94.04

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
93.62	97.60	94.42	100.00	71.90	95.98	99.34	96.13

Failure Buckets

UVM_FATAL (alert_receiver_driver.sv:145) [driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q has 17 failures:

Test kmac_shadow_reg_errors has 11 failures.

2.kmac_shadow_reg_errors.108842565821029535234936830500327382565187970324412750142235127413543380359038
Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/2.kmac_shadow_reg_errors/latest/run.log

  UVM_FATAL @  21397444 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
  UVM_INFO @  21397444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

4.kmac_shadow_reg_errors.95319985628318272089794232647541515002310287604369509122425157118951397832013
Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/4.kmac_shadow_reg_errors/latest/run.log

  UVM_FATAL @   5261114 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
  UVM_INFO @   5261114 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 9 more failures.

Test kmac_shadow_reg_errors_with_csr_rw has 6 failures.

2.kmac_shadow_reg_errors_with_csr_rw.6849551846579329592335175338074357741345663330693542666698165290703876636709
Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/2.kmac_shadow_reg_errors_with_csr_rw/latest/run.log

  UVM_FATAL @  17178022 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
  UVM_INFO @  17178022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

4.kmac_shadow_reg_errors_with_csr_rw.65410989166138795966773430983101099255895566941980840067351825408558832177124
Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/4.kmac_shadow_reg_errors_with_csr_rw/latest/run.log

  UVM_FATAL @  68581324 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
  UVM_INFO @  68581324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 4 more failures.

Offending '(d2h.d_error || ((d2h.d_data & *) == (exp_vals[*] & *)))' has 11 failures:

Test kmac_tl_intg_err has 4 failures.

0.kmac_tl_intg_err.53202076731682546648221435304758380544455481324790314688255921958819242650335
Line 86, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/0.kmac_tl_intg_err/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[45] & 'hffffffff)))'
  UVM_ERROR @  77999926 ps: (kmac_csr_assert_fpv.sv:522) [ASSERT FAILED] prefix_6_rd_A
  UVM_INFO @  77999926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

14.kmac_tl_intg_err.99881610234251038028457497554674125209952809702326043564755773063954752998686
Line 82, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/14.kmac_tl_intg_err/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffff03ff) == (exp_vals[4] & 'hffff03ff)))'
  UVM_ERROR @  18186537 ps: (kmac_csr_assert_fpv.sv:487) [ASSERT FAILED] entropy_period_rd_A
  UVM_INFO @  18186537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

Test kmac_shadow_reg_errors_with_csr_rw has 7 failures.

1.kmac_shadow_reg_errors_with_csr_rw.91914725822021592932475761371076679144206337642761715033981509934420182080862
Line 86, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/1.kmac_shadow_reg_errors_with_csr_rw/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[47] & 'hffffffff)))'
  UVM_ERROR @  48237648 ps: (kmac_csr_assert_fpv.sv:532) [ASSERT FAILED] prefix_8_rd_A
  UVM_INFO @  48237648 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

5.kmac_shadow_reg_errors_with_csr_rw.50959559640804971409596713297982438728415286647866853108779506486206231889795
Line 86, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/5.kmac_shadow_reg_errors_with_csr_rw/latest/run.log

      Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[44] & 'hffffffff)))'
  UVM_ERROR @  15141039 ps: (kmac_csr_assert_fpv.sv:517) [ASSERT FAILED] prefix_5_rd_A
  UVM_INFO @  15141039 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 5 more failures.

UVM_ERROR (kmac_scoreboard.sv:1202) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: kmac_reg_block.err_code has 7 failures:
- Test kmac_stress_all_with_rand_reset has 7 failures.
  - 3.kmac_stress_all_with_rand_reset.13944325665914349148546957704298529950070022349647344143000696380755690748917
    Line 297, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/3.kmac_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 3093877704 ps: (kmac_scoreboard.sv:1202) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2147483688 [0x80000028]) reg name: kmac_reg_block.err_code
  UVM_INFO @ 3093877704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 4.kmac_stress_all_with_rand_reset.50097399176593379516346104891958717063030701397244850344247286871187797976999
    Line 142, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/4.kmac_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 957307555 ps: (kmac_scoreboard.sv:1202) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 2147483768 [0x80000078]) reg name: kmac_reg_block.err_code
  UVM_INFO @ 957307555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 5 more failures.
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) has 4 failures:
- Test kmac_sideload_invalid has 4 failures.
  - 9.kmac_sideload_invalid.85095520198218919781896999082039520587757786869825872731125441956361594947727
    Line 76, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/9.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10074299991 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd8e50000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
  UVM_INFO @ 10074299991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 16.kmac_sideload_invalid.61258686936974021607601797573159244913375965551850860413169695653492078569991
    Line 77, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/16.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10118075481 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xca918000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
  UVM_INFO @ 10118075481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 2 more failures.
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 3 failures:
- Test kmac_sideload_invalid has 3 failures.
  - 5.kmac_sideload_invalid.1215369744543884570171808994079295565720419120304992272855650695922750743387
    Line 73, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/5.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10017211133 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf69ac000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
  UVM_INFO @ 10017211133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 14.kmac_sideload_invalid.4425871830759380500382707784823301257798614184124625610589170567655888737854
    Line 73, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/14.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10012606436 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xeab04000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
  UVM_INFO @ 10012606436 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 1 more failures.
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=10) has 2 failures:
- Test kmac_sideload_invalid has 2 failures.
  - 12.kmac_sideload_invalid.55774512642415504695436675216417313367370277102367138155532777951246906243021
    Line 81, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/12.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10070172280 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xb79d5000, Comparison=CompareOpEq, exp_data=0x1, call_count=10)
  UVM_INFO @ 10070172280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 35.kmac_sideload_invalid.114798945420002011107401154951582956140290057568476770064264493177341722397301
    Line 83, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/35.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10230824531 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x77bb7000, Comparison=CompareOpEq, exp_data=0x1, call_count=10)
  UVM_INFO @ 10230824531 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (cip_base_vseq.sv:969) [kmac_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault_err does not trigger! has 2 failures:
- Test kmac_shadow_reg_errors_with_csr_rw has 2 failures.
  - 17.kmac_shadow_reg_errors_with_csr_rw.42280264948188885809611392457222269810946357918433262790079068944727572439898
    Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/17.kmac_shadow_reg_errors_with_csr_rw/latest/run.log
```
  UVM_ERROR @  30742322 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
  UVM_INFO @  30742322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 18.kmac_shadow_reg_errors_with_csr_rw.23483120599047027987025605168207127042820694539736767482205739168839868060627
    Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/18.kmac_shadow_reg_errors_with_csr_rw/latest/run.log
```
  UVM_ERROR @  36004770 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
  UVM_INFO @  36004770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=13) has 2 failures:
- Test kmac_sideload_invalid has 2 failures.
  - 24.kmac_sideload_invalid.37458193043069016945684230165449530752014777137307734976795468238760054789577
    Line 87, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/24.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10076445677 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x2db91000, Comparison=CompareOpEq, exp_data=0x1, call_count=13)
  UVM_INFO @ 10076445677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 41.kmac_sideload_invalid.8053397182495415273353768962338437354239102053734330020564876650413240654690
    Line 85, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/41.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10222694725 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x1c4fd000, Comparison=CompareOpEq, exp_data=0x1, call_count=13)
  UVM_INFO @ 10222694725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7) has 1 failures:
- Test kmac_sideload_invalid has 1 failures.
  - 1.kmac_sideload_invalid.23064862998338357471509162591555853790303345018438117174910164263712325543158
    Line 79, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/1.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10037446440 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x46d5d000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)
  UVM_INFO @ 10037446440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=31) has 1 failures:
- Test kmac_sideload_invalid has 1 failures.
  - 2.kmac_sideload_invalid.65425567942751833524204062528647633379666275507777090904806879341197176944455
    Line 107, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/2.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10912254286 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3f57a000, Comparison=CompareOpEq, exp_data=0x1, call_count=31)
  UVM_INFO @ 10912254286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=17) has 1 failures:
- Test kmac_sideload_invalid has 1 failures.
  - 7.kmac_sideload_invalid.90771346948903234504111154476779744378992241091384813078379779428081098318185
    Line 90, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/7.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10109618834 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x6621000, Comparison=CompareOpEq, exp_data=0x1, call_count=17)
  UVM_INFO @ 10109618834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) has 1 failures:
- Test kmac_sideload_invalid has 1 failures.
  - 8.kmac_sideload_invalid.62263544540127409499827376308328272221193064050161451124291434535833094365693
    Line 79, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/8.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10244147510 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x62fcf000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)
  UVM_INFO @ 10244147510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 1 failures:
- Test kmac_sideload_invalid has 1 failures.
  - 10.kmac_sideload_invalid.19563000140292623689114375650769875460503396203813031411895834334464313136143
    Line 74, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/10.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10151024522 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x91ad7000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @ 10151024522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=16) has 1 failures:
- Test kmac_sideload_invalid has 1 failures.
  - 30.kmac_sideload_invalid.105938667566485136418790804945530199670308649239391251892877656147187817627821
    Line 91, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/30.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10061596926 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3400f000, Comparison=CompareOpEq, exp_data=0x1, call_count=16)
  UVM_INFO @ 10061596926 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) has 1 failures:
- Test kmac_sideload_invalid has 1 failures.
  - 36.kmac_sideload_invalid.67321704402850826403445794418647811694622295685385348461644753521386028010459
    Line 77, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/36.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10037825636 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd12bf000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
  UVM_INFO @ 10037825636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) has 1 failures:
- Test kmac_sideload_invalid has 1 failures.
  - 44.kmac_sideload_invalid.2480972416195502141624772151553763669126512876837192040895576743444275365543
    Line 76, in log /nightly/runs/scratch/master/kmac_unmasked-sim-vcs/44.kmac_sideload_invalid/latest/run.log
```
  UVM_FATAL @ 10037060468 ps: (csr_utils_pkg.sv:624) [csr_utils::csr_spinwait] timeout kmac_reg_block.intr_state.kmac_done (addr=0x9bd51000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
  UVM_INFO @ 10037060468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```