| V1 |
smoke |
aon_timer_smoke |
3.080s |
530.658us |
5 |
5 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
3.350s |
955.921us |
5 |
5 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
3.090s |
473.935us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
10.350s |
7.192ms |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
2.680s |
425.669us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
2.860s |
382.418us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
3.090s |
473.935us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.680s |
425.669us |
5 |
5 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
2.790s |
377.292us |
5 |
5 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
2.830s |
397.858us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
70 |
70 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.090m |
37.322ms |
15 |
15 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.710s |
645.274us |
5 |
5 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.347m |
61.996ms |
15 |
15 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
2.790s |
422.821us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
3.310s |
748.638us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
3.310s |
748.638us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
3.350s |
955.921us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
3.090s |
473.935us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.680s |
425.669us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.390s |
2.274ms |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
3.350s |
955.921us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
3.090s |
473.935us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.680s |
425.669us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.390s |
2.274ms |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
125 |
125 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
12.590s |
8.249ms |
5 |
5 |
100.00 |
|
|
aon_timer_tl_intg_err |
12.710s |
8.013ms |
20 |
20 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
12.710s |
8.013ms |
20 |
20 |
100.00 |
| V2S |
|
TOTAL |
|
|
25 |
25 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
2.700s |
557.966us |
5 |
5 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
2.630s |
606.297us |
5 |
5 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
6.650s |
3.493ms |
5 |
5 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.660s |
630.576us |
10 |
10 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
15.220s |
4.153ms |
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
35.040s |
21.396ms |
15 |
15 |
100.00 |
| V3 |
|
TOTAL |
|
|
45 |
45 |
100.00 |
|
Unmapped tests |
aon_timer_alert_test |
3.000s |
468.111us |
50 |
50 |
100.00 |
|
|
TOTAL |
|
|
315 |
315 |
100.00 |